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([78.10.206.53]) by smtp.gmail.com with ESMTPSA id k7-20020a2e9207000000b00262fae1ffe6sm540752ljg.110.2022.10.13.09.52.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Oct 2022 09:52:27 -0700 (PDT) From: =?UTF-8?q?Micha=C5=82=20Grzelak?= To: devicetree@vger.kernel.org Cc: mw@semihalf.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@semihalf.com, =?UTF-8?q?Micha=C5=82=20Grzelak?= Subject: [PATCH v4 1/3] dt-bindings: net: marvell,pp2: convert to json-schema Date: Thu, 13 Oct 2022 18:51:32 +0200 Message-Id: <20221013165134.78234-2-mig@semihalf.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221013165134.78234-1-mig@semihalf.com> References: <20221013165134.78234-1-mig@semihalf.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the marvell,pp2 bindings from text to proper schema. Move 'marvell,system-controller' and 'dma-coherent' properties from port up to the controller node, to match what is actually done in DT. Rename all subnodes to match "^(ethernet-)?port@[0-9]+$" and deprecate port-id in favour of 'reg'. Signed-off-by: Micha=C5=82 Grzelak --- .../devicetree/bindings/net/marvell,pp2.yaml | 288 ++++++++++++++++++ .../devicetree/bindings/net/marvell-pp2.txt | 141 --------- MAINTAINERS | 2 +- 3 files changed, 289 insertions(+), 142 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/marvell,pp2.yaml delete mode 100644 Documentation/devicetree/bindings/net/marvell-pp2.txt diff --git a/Documentation/devicetree/bindings/net/marvell,pp2.yaml b/Docum= entation/devicetree/bindings/net/marvell,pp2.yaml new file mode 100644 index 000000000000..c4b27338d740 --- /dev/null +++ b/Documentation/devicetree/bindings/net/marvell,pp2.yaml @@ -0,0 +1,288 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/marvell,pp2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell CN913X / Marvell Armada 375, 7K, 8K Ethernet Controller + +maintainers: + - Marcin Wojtas + - Russell King + +description: | + Marvell Armada 375 Ethernet Controller (PPv2.1) + Marvell Armada 7K/8K Ethernet Controller (PPv2.2) + Marvell CN913X Ethernet Controller (PPv2.3) + +properties: + compatible: + enum: + - marvell,armada-375-pp2 + - marvell,armada-7k-pp22 + + reg: + minItems: 3 + maxItems: 4 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + minItems: 2 + items: + - description: main controller clock + - description: GOP clock + - description: MG clock + - description: MG Core clock + - description: AXI clock + + clock-names: + minItems: 2 + items: + - const: pp_clk + - const: gop_clk + - const: mg_clk + - const: mg_core_clk + - const: axi_clk + + dma-coherent: true + + marvell,system-controller: + $ref: /schemas/types.yaml#/definitions/phandle + description: a phandle to the system controller. + +patternProperties: + '^(ethernet-)?port@[0-9]+$': + type: object + description: subnode for each ethernet port. + $ref: ethernet-controller.yaml# + unevaluatedProperties: false + + properties: + reg: + $ref: /schemas/types.yaml#/definitions/uint32 + description: ID of the port from the MAC point of view. + + interrupts: + minItems: 1 + maxItems: 10 + description: interrupt(s) for the port + + interrupt-names: + minItems: 1 + items: + - const: hif0 + - const: hif1 + - const: hif2 + - const: hif3 + - const: hif4 + - const: hif5 + - const: hif6 + - const: hif7 + - const: hif8 + - const: link + + description: > + if more than a single interrupt for is given, must be the + name associated to the interrupts listed. Valid names are: + "hifX", with X in [0..8], and "link". The names "tx-cpu0", + "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported + for backward compatibility but shouldn't be used for new + additions. + + phys: + $ref: /schemas/phy/phy-consumer.yaml#/properties/phys + description: Generic PHY, providing serdes lanes. + + port-id: + $ref: /schemas/types.yaml#/definitions/uint32 + deprecated: true + description: > + ID of the port from the MAC point of view. + Legacy binding for backward compatibility. + + marvell,loopback: + $ref: /schemas/types.yaml#/definitions/flag + description: port is loopback mode. + + gop-port-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + only for marvell,armada-7k-pp22, ID of the port from the + GOP (Group Of Ports) point of view. This ID is used to index the + per-port registers in the second register area. + + required: + - reg + - interrupts + - port-id + - phy-mode + +required: + - compatible + - reg + - clocks + - clock-names + +allOf: + - if: + properties: + compatible: + const: marvell,armada-7k-pp22 + then: + properties: + reg: + items: + - description: Packet Processor registers + - description: Networking interfaces registers + - description: CM3 address space used for TX Flow Control + + clocks: + minItems: 5 + + clock-names: + minItems: 5 + + patternProperties: + '^(ethernet-)?port@[0-9]+$': + required: + - gop-port-id + + required: + - marvell,system-controller + else: + properties: + reg: + items: + - description: Packet Processor registers + - description: LMS registers + - description: Register area per eth0 + - description: Register area per eth1 + + clocks: + maxItems: 2 + + clock-names: + maxItems: 2 + + patternProperties: + '^(ethernet-)?port@[0-9]+$': + properties: + gop-port-id: false + +additionalProperties: false + +examples: + - | + // For Armada 375 variant + #include + #include + + ethernet@f0000 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "marvell,armada-375-pp2"; + reg =3D <0xf0000 0xa000>, + <0xc0000 0x3060>, + <0xc4000 0x100>, + <0xc5000 0x100>; + clocks =3D <&gateclk 3>, <&gateclk 19>; + clock-names =3D "pp_clk", "gop_clk"; + + ethernet-port@0 { + interrupts =3D ; + reg =3D <0>; + port-id =3D <0>; /* For backward compatibility. */ + phy =3D <&phy0>; + phy-mode =3D "rgmii-id"; + }; + + ethernet-port@1 { + interrupts =3D ; + reg =3D <1>; + port-id =3D <1>; /* For backward compatibility. */ + phy =3D <&phy3>; + phy-mode =3D "gmii"; + }; + }; + + - | + // For Armada 7k/8k and Cn913x variants + #include + #include + + ethernet@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "marvell,armada-7k-pp22"; + reg =3D <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>; + clocks =3D <&cp0_clk 1 3>, <&cp0_clk 1 9>, + <&cp0_clk 1 5>, <&cp0_clk 1 6>, <&cp0_clk 1 18>; + clock-names =3D "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_c= lk"; + marvell,system-controller =3D <&cp0_syscon0>; + + ethernet-port@0 { + interrupts =3D , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "hif0", "hif1", "hif2", "hif3", "hif4", + "hif5", "hif6", "hif7", "hif8", "link"; + phy-mode =3D "10gbase-r"; + phys =3D <&cp0_comphy4 0>; + reg =3D <0>; + port-id =3D <0>; /* For backward compatibility. */ + gop-port-id =3D <0>; + }; + + ethernet-port@1 { + interrupts =3D , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "hif0", "hif1", "hif2", "hif3", "hif4", + "hif5", "hif6", "hif7", "hif8", "link"; + phy-mode =3D "rgmii-id"; + reg =3D <1>; + port-id =3D <1>; /* For backward compatibility. */ + gop-port-id =3D <2>; + }; + + ethernet-port@2 { + interrupts =3D , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "hif0", "hif1", "hif2", "hif3", "hif4", + "hif5", "hif6", "hif7", "hif8", "link"; + phy-mode =3D "2500base-x"; + managed =3D "in-band-status"; + phys =3D <&cp0_comphy5 2>; + sfp =3D <&sfp_eth3>; + reg =3D <2>; + port-id =3D <2>; /* For backward compatibility. */ + gop-port-id =3D <3>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt b/Docume= ntation/devicetree/bindings/net/marvell-pp2.txt deleted file mode 100644 index ce15c173f43f..000000000000 --- a/Documentation/devicetree/bindings/net/marvell-pp2.txt +++ /dev/null @@ -1,141 +0,0 @@ -* Marvell Armada 375 Ethernet Controller (PPv2.1) - Marvell Armada 7K/8K Ethernet Controller (PPv2.2) - Marvell CN913X Ethernet Controller (PPv2.3) - -Required properties: - -- compatible: should be one of: - "marvell,armada-375-pp2" - "marvell,armada-7k-pp2" -- reg: addresses and length of the register sets for the device. - For "marvell,armada-375-pp2", must contain the following register - sets: - - common controller registers - - LMS registers - - one register area per Ethernet port - For "marvell,armada-7k-pp2" used by 7K/8K and CN913X, must contain the f= ollowing register - sets: - - packet processor registers - - networking interfaces registers - - CM3 address space used for TX Flow Control - -- clocks: pointers to the reference clocks for this device, consequently: - - main controller clock (for both armada-375-pp2 and armada-7k-pp2) - - GOP clock (for both armada-375-pp2 and armada-7k-pp2) - - MG clock (only for armada-7k-pp2) - - MG Core clock (only for armada-7k-pp2) - - AXI clock (only for armada-7k-pp2) -- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk", - "mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2). - -The ethernet ports are represented by subnodes. At least one port is -required. - -Required properties (port): - -- interrupts: interrupt(s) for the port -- port-id: ID of the port from the MAC point of view -- gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the - GOP (Group Of Ports) point of view. This ID is used to index the - per-port registers in the second register area. -- phy-mode: See ethernet.txt file in the same directory - -Optional properties (port): - -- marvell,loopback: port is loopback mode -- phy: a phandle to a phy node defining the PHY address (as the reg - property, a single integer). -- interrupt-names: if more than a single interrupt for is given, must be t= he - name associated to the interrupts listed. Valid names a= re: - "hifX", with X in [0..8], and "link". The names "tx-cpu= 0", - "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are sup= ported - for backward compatibility but shouldn't be used for new - additions. -- marvell,system-controller: a phandle to the system controller. - -Example for marvell,armada-375-pp2: - -ethernet@f0000 { - compatible =3D "marvell,armada-375-pp2"; - reg =3D <0xf0000 0xa000>, - <0xc0000 0x3060>, - <0xc4000 0x100>, - <0xc5000 0x100>; - clocks =3D <&gateclk 3>, <&gateclk 19>; - clock-names =3D "pp_clk", "gop_clk"; - - eth0: eth0@c4000 { - interrupts =3D ; - port-id =3D <0>; - phy =3D <&phy0>; - phy-mode =3D "gmii"; - }; - - eth1: eth1@c5000 { - interrupts =3D ; - port-id =3D <1>; - phy =3D <&phy3>; - phy-mode =3D "gmii"; - }; -}; - -Example for marvell,armada-7k-pp2: - -cpm_ethernet: ethernet@0 { - compatible =3D "marvell,armada-7k-pp22"; - reg =3D <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>; - clocks =3D <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, - <&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>; - clock-names =3D "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk"; - - eth0: eth0 { - interrupts =3D , - , - , - , - , - , - , - , - , - ; - interrupt-names =3D "hif0", "hif1", "hif2", "hif3", "hif4", - "hif5", "hif6", "hif7", "hif8", "link"; - port-id =3D <0>; - gop-port-id =3D <0>; - }; - - eth1: eth1 { - interrupts =3D , - , - , - , - , - , - , - , - , - ; - interrupt-names =3D "hif0", "hif1", "hif2", "hif3", "hif4", - "hif5", "hif6", "hif7", "hif8", "link"; - port-id =3D <1>; - gop-port-id =3D <2>; - }; - - eth2: eth2 { - interrupts =3D , - , - , - , - , - , - , - , - , - ; - interrupt-names =3D "hif0", "hif1", "hif2", "hif3", "hif4", - "hif5", "hif6", "hif7", "hif8", "link"; - port-id =3D <2>; - gop-port-id =3D <3>; - }; -}; diff --git a/MAINTAINERS b/MAINTAINERS index e68a0804394d..51da1b56d87e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12292,7 +12292,7 @@ M: Marcin Wojtas M: Russell King L: netdev@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/net/marvell-pp2.txt +F: Documentation/devicetree/bindings/net/marvell,pp2.yaml F: drivers/net/ethernet/marvell/mvpp2/ =20 MARVELL MWIFIEX WIRELESS DRIVER --=20 2.37.3 From nobody Tue Apr 7 07:51:16 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45A0CC433FE for ; Thu, 13 Oct 2022 16:52:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229905AbiJMQwq (ORCPT ); Thu, 13 Oct 2022 12:52:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229874AbiJMQwf (ORCPT ); Thu, 13 Oct 2022 12:52:35 -0400 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8228C10A7D6 for ; Thu, 13 Oct 2022 09:52:31 -0700 (PDT) Received: by mail-lj1-x229.google.com with SMTP id by36so3073840ljb.4 for ; Thu, 13 Oct 2022 09:52:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BWIwo+mIwSXhxLgpwwdJO6e+2GcvcXvg+9gu/sbvq84=; b=Xi5DZ5qK+qk1qquLLkpXhdYUNmdfgyLafBxDhrB9rpscC/EIrl+UVUQguUo0PzTfq5 8K9wmjiGS3GJvD8GrzFFMXpqMchc/FBU7Jaz1btWIhp/ZB54mbEal084Svq3VEEF3UXF WUcXAqfju0Af83SfunDSrm2pXxwj4YqGvARML/gBSRq4TntIOyjk51zX14Kym9RRyVD5 pDqgpGuLwl99Q0pHv+D8QIWvxCtZhnYiWlwN44KdXBACx6nb+jh5+4CHmMcwd66xW5Uj UPXDX0PefoIkPA98z6cxVXiQOPv9LESdB1DVb4Eeab6Us2nrXxi11nlmqM+TkysLl6De qwLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BWIwo+mIwSXhxLgpwwdJO6e+2GcvcXvg+9gu/sbvq84=; b=N6Cb296yrjohqpaXN3dJrhIeEEfRS6FsEAHop51tDsgyXbKAACH58cwd6EC1LxgtvI YDQGUSa2wPd9U0Ao6WVG5oXAhxxa01PgiPZJdnH0VC6iowYyhRP1aEv3ihvU3NbBI6l7 qU8GVV8koSaYjyKK+mF66IpCUHUh8tTj22mNt7vqrmoIFUrAn/ivleILY1NCb2mpcRSY uxPSi+fSL8mUyPt/PSTHIKxoMR9aoybnZlyHNNBfmM6i76mx1W89zz+X1B9CEKOY9XjW LKrHpyw5I4IAWZcnHtMVm1m/yYitGCtigGIDeg7Sy5MTbrux52xrAZdrG8AGoZ30t1aV GXOQ== X-Gm-Message-State: ACrzQf16gozYY6z9HKjFjA89HDpco0cJvP05Nkv3TDUSY3KAszk8qsdC kJqbmHzdXnven6oC8+DuWqeA3Q== X-Google-Smtp-Source: AMsMyM63g/W8O1g5lvdBVlFYJvInzSl0E+zJLeXuYwVpee2XRfgYaxeUhNgdwVvtEu+yzg0nEPLNJg== X-Received: by 2002:a05:651c:1685:b0:26e:e61:9c3f with SMTP id bd5-20020a05651c168500b0026e0e619c3fmr290114ljb.477.1665679949349; Thu, 13 Oct 2022 09:52:29 -0700 (PDT) Received: from fedora.. ([78.10.206.53]) by smtp.gmail.com with ESMTPSA id k7-20020a2e9207000000b00262fae1ffe6sm540752ljg.110.2022.10.13.09.52.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Oct 2022 09:52:29 -0700 (PDT) From: =?UTF-8?q?Micha=C5=82=20Grzelak?= To: devicetree@vger.kernel.org Cc: mw@semihalf.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@semihalf.com Subject: [PATCH v4 2/3] arm64: dts: marvell: Update network description to match schema Date: Thu, 13 Oct 2022 18:51:33 +0200 Message-Id: <20221013165134.78234-3-mig@semihalf.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221013165134.78234-1-mig@semihalf.com> References: <20221013165134.78234-1-mig@semihalf.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Marcin Wojtas Update the PP2 ethernet ports subnodes' names to match schema enforced by the marvell,pp2.yaml contents. Add new required properties ('reg') which contains information about the port ID, keeping 'port-id' ones for backward compatibility. Signed-off-by: Marcin Wojtas --- arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boo= t/dts/marvell/armada-cp11x.dtsi index d6c0990a267d..7d0043824f2a 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi @@ -58,6 +58,8 @@ config-space@CP11X_BASE { ranges =3D <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>; =20 CP11X_LABEL(ethernet): ethernet@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; compatible =3D "marvell,armada-7k-pp22"; reg =3D <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>; clocks =3D <&CP11X_LABEL(clk) 1 3>, <&CP11X_LABEL(clk) 1 9>, @@ -69,7 +71,7 @@ CP11X_LABEL(ethernet): ethernet@0 { status =3D "disabled"; dma-coherent; =20 - CP11X_LABEL(eth0): eth0 { + CP11X_LABEL(eth0): ethernet-port@0 { interrupts =3D <39 IRQ_TYPE_LEVEL_HIGH>, <43 IRQ_TYPE_LEVEL_HIGH>, <47 IRQ_TYPE_LEVEL_HIGH>, @@ -83,12 +85,13 @@ CP11X_LABEL(eth0): eth0 { interrupt-names =3D "hif0", "hif1", "hif2", "hif3", "hif4", "hif5", "hif6", "hif7", "hif8", "link"; - port-id =3D <0>; + reg =3D <0>; + port-id =3D <0>; /* For backward compatibility. */ gop-port-id =3D <0>; status =3D "disabled"; }; =20 - CP11X_LABEL(eth1): eth1 { + CP11X_LABEL(eth1): ethernet-port@1 { interrupts =3D <40 IRQ_TYPE_LEVEL_HIGH>, <44 IRQ_TYPE_LEVEL_HIGH>, <48 IRQ_TYPE_LEVEL_HIGH>, @@ -102,12 +105,13 @@ CP11X_LABEL(eth1): eth1 { interrupt-names =3D "hif0", "hif1", "hif2", "hif3", "hif4", "hif5", "hif6", "hif7", "hif8", "link"; - port-id =3D <1>; + reg =3D <1>; + port-id =3D <1>; /* For backward compatibility. */ gop-port-id =3D <2>; status =3D "disabled"; }; =20 - CP11X_LABEL(eth2): eth2 { + CP11X_LABEL(eth2): ethernet-port@2 { interrupts =3D <41 IRQ_TYPE_LEVEL_HIGH>, <45 IRQ_TYPE_LEVEL_HIGH>, <49 IRQ_TYPE_LEVEL_HIGH>, @@ -121,7 +125,8 @@ CP11X_LABEL(eth2): eth2 { interrupt-names =3D "hif0", "hif1", "hif2", "hif3", "hif4", "hif5", "hif6", "hif7", "hif8", "link"; - port-id =3D <2>; + reg =3D <2>; + port-id =3D <2>; /* For backward compatibility. */ gop-port-id =3D <3>; status =3D "disabled"; }; --=20 2.37.3 From nobody Tue Apr 7 07:51:16 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C8F8C433FE for ; Thu, 13 Oct 2022 16:52:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229924AbiJMQwv (ORCPT ); Thu, 13 Oct 2022 12:52:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229892AbiJMQwi (ORCPT ); Thu, 13 Oct 2022 12:52:38 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6219910A7D8 for ; Thu, 13 Oct 2022 09:52:33 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id r14so3418779lfm.2 for ; Thu, 13 Oct 2022 09:52:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6hw2W+lQ+Hv9z48dDP42SJngsa6TM787Uybb56JTsIU=; b=ghoFwQTxBbVHDWGz3pu/fVVdmZGCPWS90lwX3nEcU8o2Y1zv1+S4YKeTSmNESQTc6v iRO5UImZPCZP7qu1ZfLC/j5rrFtvoEEBjvZgBQVPzI9DvpXQ8FkeuIVOBWkHDpc5fmP3 1ATgRGOtOgU4JBqWGKYdqSQcOfHDgp5bnC5faThbh8oATv2pgFgKboonbacHOIbATQJH rH0Es23nJMcEAS+3TJgRAAUeQ8cvn5VePMhUIbrmhr5EpxIprUUWmAY9Dey+gsSVNWvn 0E9i+lfXJe5ueJbmHYTiUe/1xqkCkFG1xyudg29Km7t5TTfV8UF0ovgJ8Nc407m2itT1 01Gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6hw2W+lQ+Hv9z48dDP42SJngsa6TM787Uybb56JTsIU=; b=I50Djl09vFJI3yBCXYfteQ9aSV+Dpa/3SqI78tq1Ve1PKO4MPvlEqeLkfNURsj8a4G NnrCIgk/1TjCupr+NQedOpfFz88is1cyoS0tCB6b8+KAWM8Nm4uPwI6a8xXli3cq9Uik GiUFIHqrr766q6SlA+QxejKP2PSDfH/u7QAis8TSbWPBwizvzgtwVDCLlsa/z5ojeL8u EFvKk4j/tpTZkSnbtBX/mHflpzczWsL4Jh5Uy6bhu5U7wFviGCS4begazYU6g6nWfMT2 mV2DCRb4EXwMlGDZj7WEpJp5iavzmcH69mGrTm0+71A0ptVmG8w0F0Ug8PMhCJs/hMVL SwVA== X-Gm-Message-State: ACrzQf1N45+JqpoNC6Mx+CSLXgmB0PLDQF8CtWdAGNFDLG78bM4PT7n2 o5iV2raWUoFnUxgPcg49POA/YA== X-Google-Smtp-Source: AMsMyM4gcJcA8tRARkMMAurN5cSMCEOxM2sdSbaTGrQZ+dBknfKwag6sQfZLDND3tnv8+yEOEtRERQ== X-Received: by 2002:a05:6512:33cb:b0:4a4:2bee:5c8b with SMTP id d11-20020a05651233cb00b004a42bee5c8bmr205014lfg.237.1665679950541; Thu, 13 Oct 2022 09:52:30 -0700 (PDT) Received: from fedora.. ([78.10.206.53]) by smtp.gmail.com with ESMTPSA id k7-20020a2e9207000000b00262fae1ffe6sm540752ljg.110.2022.10.13.09.52.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Oct 2022 09:52:30 -0700 (PDT) From: =?UTF-8?q?Micha=C5=82=20Grzelak?= To: devicetree@vger.kernel.org Cc: mw@semihalf.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@semihalf.com Subject: [PATCH v4 3/3] ARM: dts: armada-375: Update network description to match schema Date: Thu, 13 Oct 2022 18:51:34 +0200 Message-Id: <20221013165134.78234-4-mig@semihalf.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221013165134.78234-1-mig@semihalf.com> References: <20221013165134.78234-1-mig@semihalf.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Marcin Wojtas Update the PP2 ethernet ports subnodes' names to match schema enforced by the marvell,pp2.yaml contents. Add new required properties ('reg') which contains information about the port ID, keeping 'port-id' ones for backward compatibility. Signed-off-by: Marcin Wojtas --- arch/arm/boot/dts/armada-375.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-3= 75.dtsi index 929deaf312a5..9fbe0cfec48f 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -178,6 +178,8 @@ mdio: mdio@c0054 { =20 /* Network controller */ ethernet: ethernet@f0000 { + #address-cells =3D <1>; + #size-cells =3D <0>; compatible =3D "marvell,armada-375-pp2"; reg =3D <0xf0000 0xa000>, /* Packet Processor regs */ <0xc0000 0x3060>, /* LMS regs */ @@ -187,15 +189,17 @@ ethernet: ethernet@f0000 { clock-names =3D "pp_clk", "gop_clk"; status =3D "disabled"; =20 - eth0: eth0 { + eth0: ethernet-port@0 { interrupts =3D ; - port-id =3D <0>; + reg =3D <0>; + port-id =3D <0>; /* For backward compatibility. */ status =3D "disabled"; }; =20 - eth1: eth1 { + eth1: ethernet-port@1 { interrupts =3D ; - port-id =3D <1>; + reg =3D <1>; + port-id =3D <1>; /* For backward compatibility. */ status =3D "disabled"; }; }; --=20 2.37.3