From nobody Tue Apr 7 06:37:57 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49EC4C433FE for ; Wed, 12 Oct 2022 11:14:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229436AbiJLLNa (ORCPT ); Wed, 12 Oct 2022 07:13:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229693AbiJLLNI (ORCPT ); Wed, 12 Oct 2022 07:13:08 -0400 Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ADAEFC2C96 for ; Wed, 12 Oct 2022 04:13:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1665573181; bh=jQXI5aEReKrw+ZRZjXWpuy3D8HVFbu5pIl125t8w5MA=; h=From:To:Cc:Subject:Date:From; b=YInqk2tXDllQoaKT8SucQez+0E2IhD+nG3xXtlMN3R1btmb5/JqcpxxxIK//2m/ib INpXBiREeIuwhCsrF1PyMWMFcLviOZxsoscEoMPhulmLn4rdSrsit+2KSF8Vhdz2nC YoxTD/DCAKibg5q494Tnp0z2P7dnez0l05hUsIVE= Received: from ld50.lan (unknown [101.88.135.226]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id 334E1600CF; Wed, 12 Oct 2022 19:12:59 +0800 (CST) From: WANG Xuerui To: Huacai Chen Cc: WANG Xuerui , loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH] LoongArch: Expose LBT features in cpuinfo and ELF HWCAP Date: Wed, 12 Oct 2022 19:12:54 +0800 Message-Id: <20221012111254.3194431-1-kernel@xen0n.name> X-Mailer: git-send-email 2.38.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: WANG Xuerui Although proper context switching support for LBT is not present yet, this fixes an apparent oversight where other similarly not-yet-supported features e.g. LSX, LASX, Crypto, or LVZ are being reported but the LBT ones are not. Fixes: 628c3bb40e9a ("LoongArch: Add boot and setup routines") Signed-off-by: WANG Xuerui Cc: loongarch@lists.linux.dev Cc: linux-kernel@vger.kernel.org --- arch/loongarch/kernel/cpu-probe.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/loongarch/kernel/cpu-probe.c b/arch/loongarch/kernel/cpu-= probe.c index 529ab8f44ec6..82de5264d2c9 100644 --- a/arch/loongarch/kernel/cpu-probe.c +++ b/arch/loongarch/kernel/cpu-probe.c @@ -123,6 +123,18 @@ static void cpu_probe_common(struct cpuinfo_loongarch = *c) c->options |=3D LOONGARCH_CPU_LVZ; elf_hwcap |=3D HWCAP_LOONGARCH_LVZ; } + if (config & CPUCFG2_X86BT) { + c->options |=3D LOONGARCH_CPU_LBT_X86; + elf_hwcap |=3D HWCAP_LOONGARCH_LBT_X86; + } + if (config & CPUCFG2_ARMBT) { + c->options |=3D LOONGARCH_CPU_LBT_ARM; + elf_hwcap |=3D HWCAP_LOONGARCH_LBT_ARM; + } + if (config & CPUCFG2_MIPSBT) { + c->options |=3D LOONGARCH_CPU_LBT_MIPS; + elf_hwcap |=3D HWCAP_LOONGARCH_LBT_MIPS; + } =20 config =3D read_cpucfg(LOONGARCH_CPUCFG6); if (config & CPUCFG6_PMP) --=20 2.38.0