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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT046.mail.protection.outlook.com (10.13.172.121) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5709.10 via Frontend Transport; Sun, 9 Oct 2022 07:11:35 +0000 Received: from pyuan-Cloudripper.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Sun, 9 Oct 2022 02:11:32 -0500 From: Perry Yuan To: , , CC: , , , , , , , , , Perry Yuan Subject: [PATCH v2 8/9] cpufreq: amd_pstate: implement amd pstate cpu online and offline callback Date: Sun, 9 Oct 2022 15:10:32 +0800 Message-ID: <20221009071033.21170-9-Perry.Yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221009071033.21170-1-Perry.Yuan@amd.com> References: <20221009071033.21170-1-Perry.Yuan@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT046:EE_|PH7PR12MB6761:EE_ X-MS-Office365-Filtering-Correlation-Id: 7e23a09c-d815-4a9c-6960-08daa9c580b9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Oct 2022 07:11:35.8851 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7e23a09c-d815-4a9c-6960-08daa9c580b9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT046.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6761 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The patch adds online and offline driver callback support to allow cpu core= s go offline and help to restore the previous working states when core goes back online later for EPP driver mode. Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 101 ++++++++++++++++++++++++++++++++++- 1 file changed, 100 insertions(+), 1 deletion(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 98fb4a31791e..1a3ecc2e148a 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -116,7 +116,8 @@ struct amd_aperf_mperf { * @cppc_cap1_cached: Cached value of the last CPPC Capabilities MSR * @update_util: Cpufreq utility callback information * @sample: the stored performance sample - + * @suspended: Whether or not the driver has been suspended. + * * The amd_cpudata is key private data for each CPU thread in AMD P-State,= and * represents all the attributes and goals that AMD P-State requests at ru= ntime. */ @@ -156,6 +157,7 @@ struct amd_cpudata { u64 cppc_cap1_cached; struct update_util_data update_util; struct amd_aperf_mperf sample; + bool suspended; }; =20 /** @@ -216,6 +218,9 @@ static DEFINE_SPINLOCK(amd_pstate_cpu_lock); static bool cppc_boost __read_mostly; struct kobject *amd_pstate_kobj; =20 +/* the flag whether the pstate driver is exiting */ +static bool pstate_exiting; + #ifdef CONFIG_ACPI_CPPC_LIB static s16 amd_pstate_get_epp(struct amd_cpudata *cpudata, u64 cppc_req_ca= ched) { @@ -1378,6 +1383,96 @@ static int amd_pstate_epp_set_policy(struct cpufreq_= policy *policy) return 0; } =20 +static void amd_pstate_epp_reenable(struct amd_cpudata *cpudata) +{ + struct cppc_perf_ctrls perf_ctrls; + u64 value, max_perf; + int ret; + + ret =3D amd_pstate_enable(true); + if (ret) + pr_err("failed to enable amd pstate during resume, return %d\n", ret); + + value =3D READ_ONCE(cpudata->cppc_req_cached); + max_perf =3D READ_ONCE(cpudata->highest_perf); + + if (boot_cpu_has(X86_FEATURE_CPPC)) { + wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value); + } else { + perf_ctrls.max_perf =3D max_perf; + perf_ctrls.energy_perf =3D AMD_CPPC_ENERGY_PERF_PREF(cpudata->epp_cached= ); + cppc_set_perf(cpudata->cpu, &perf_ctrls); + } +} + +static int amd_pstate_epp_cpu_online(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata =3D all_cpu_data[policy->cpu]; + + pr_debug("AMD CPU Core %d going online\n", cpudata->cpu); + + if (epp_enabled) { + amd_pstate_epp_reenable(cpudata); + cpudata->suspended =3D false; + } + + return 0; +} + +static void amd_pstate_epp_offline(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata =3D all_cpu_data[policy->cpu]; + struct cppc_perf_ctrls perf_ctrls; + int min_perf; + u64 value; + + min_perf =3D READ_ONCE(cpudata->lowest_perf); + value =3D READ_ONCE(cpudata->cppc_req_cached); + + mutex_lock(&amd_pstate_limits_lock); + if (boot_cpu_has(X86_FEATURE_CPPC)) { + cpudata->epp_policy =3D CPUFREQ_POLICY_UNKNOWN; + + /* Set max perf same as min perf */ + value &=3D ~AMD_CPPC_MAX_PERF(~0L); + value |=3D AMD_CPPC_MAX_PERF(min_perf); + value &=3D ~AMD_CPPC_MIN_PERF(~0L); + value |=3D AMD_CPPC_MIN_PERF(min_perf); + wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value); + } else { + perf_ctrls.desired_perf =3D 0; + perf_ctrls.max_perf =3D min_perf; + perf_ctrls.energy_perf =3D AMD_CPPC_ENERGY_PERF_PREF(AMD_CPPC_EPP_POWERS= AVE); + cppc_set_perf(cpudata->cpu, &perf_ctrls); + } + mutex_unlock(&amd_pstate_limits_lock); +} + +static int amd_pstate_cpu_offline(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata =3D all_cpu_data[policy->cpu]; + + pr_debug("AMD CPU Core %d going offline\n", cpudata->cpu); + + if (cpudata->suspended) + return 0; + + if (pstate_exiting) + return 0; + + if (epp_enabled) + amd_pstate_epp_offline(policy); + + return 0; +} + +static int amd_pstate_epp_cpu_offline(struct cpufreq_policy *policy) +{ + amd_pstate_clear_update_util_hook(policy->cpu); + + return amd_pstate_cpu_offline(policy); +} + static void amd_pstate_verify_cpu_policy(struct amd_cpudata *cpudata, struct cpufreq_policy_data *policy) { @@ -1412,6 +1507,8 @@ static struct cpufreq_driver amd_pstate_epp_driver = =3D { .init =3D amd_pstate_epp_cpu_init, .exit =3D amd_pstate_epp_cpu_exit, .update_limits =3D amd_pstate_epp_update_limits, + .offline =3D amd_pstate_epp_cpu_offline, + .online =3D amd_pstate_epp_cpu_online, .name =3D "amd_pstate_epp", .attr =3D amd_pstate_epp_attr, }; @@ -1481,6 +1578,7 @@ static int __init amd_pstate_init(void) pr_err("amd-pstate: Sysfs attribute export failed with error %d.\n", ret); } + pstate_exiting =3D false; =20 return ret; } @@ -1495,6 +1593,7 @@ static void __exit amd_pstate_exit(void) { unsigned int cpu; =20 + pstate_exiting =3D true; cpufreq_unregister_driver(default_pstate_driver); =20 amd_pstate_enable(false); --=20 2.34.1