From nobody Sat Sep 21 14:43:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAE19C433F5 for ; Fri, 7 Oct 2022 09:34:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229700AbiJGJe4 (ORCPT ); Fri, 7 Oct 2022 05:34:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229825AbiJGJev (ORCPT ); Fri, 7 Oct 2022 05:34:51 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C82DC1580F; Fri, 7 Oct 2022 02:34:47 -0700 (PDT) X-UUID: 973fee03c0bc4daca44f34e35f60894a-20221007 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=BPhLfownkzStNRPo/4QdpYB3nG30WqCa+eRBTrww2X4=; b=H7Lv73fuTPTJYDOVAr1D4Z8k0AEYioS1IxfJjuelYAKnPpEroJvC0bYhfQRS0m20rWIYXiCXP/DyufRLVLhculnpPetHxA30kvekEXzbBCWvcxkc6Uk4KTsn98t1a21qe+YklLxY3GBHAT7150LBR6ACLdgGKv1GRqwvSdRwoiE=; X-CID-P-RULE: Spam_GS6885AD X-CID-O-INFO: VERSION:1.1.11,REQID:46794042-985c-4c52-baca-fb03ac038141,IP:0,U RL:25,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS6885AD,AC TION:quarantine,TS:125 X-CID-INFO: VERSION:1.1.11,REQID:46794042-985c-4c52-baca-fb03ac038141,IP:0,URL :25,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTI ON:quarantine,TS:125 X-CID-META: VersionHash:39a5ff1,CLOUDID:33d039e1-2948-402a-a6e4-b5d31fe11eb7,B ulkID:2210071734442RONJUHW,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48|823| 824,TC:nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:nil,QS:nil,BEC:n il,COL:0 X-UUID: 973fee03c0bc4daca44f34e35f60894a-20221007 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 770923611; Fri, 07 Oct 2022 17:34:44 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 7 Oct 2022 17:34:42 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Fri, 7 Oct 2022 17:34:42 +0800 From: Allen-KH Cheng To: Wim Van Sebroeck , Guenter Roeck , Krzysztof Kozlowski , "Matthias Brugger" , Rob Herring , CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2 5/8] dt-bindings: watchdog: mediatek: Convert mtk-wdt to json-schema Date: Fri, 7 Oct 2022 17:34:34 +0800 Message-ID: <20221007093437.12228-6-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221007093437.12228-1-allen-kh.cheng@mediatek.com> References: <20221007093437.12228-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: AngeloGioacchino Del Regno Convert the MediaTek watchdog bindings to schema. The original binding only had 4 without a fallback but there is a reset controller on the "mediatek,mt7986-wdt", "mediatek,mt8186-wdt" and "mediatek,mt8195-wdt". Since there is no reset controller for the mt6589, we remove "mediatek,mt6589-wdt" as a fallback. Signed-off-by: AngeloGioacchino Del Regno Co-developed-by: Allen-KH Cheng Signed-off-by: Allen-KH Cheng Reviewed-by: Guenter Roeck Reviewed-by: Rob Herring --- .../bindings/watchdog/mediatek,mtk-wdt.yaml | 77 +++++++++++++++++++ .../devicetree/bindings/watchdog/mtk-wdt.txt | 42 ---------- 2 files changed, 77 insertions(+), 42 deletions(-) create mode 100644 Documentation/devicetree/bindings/watchdog/mediatek,mtk= -wdt.yaml delete mode 100644 Documentation/devicetree/bindings/watchdog/mtk-wdt.txt diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.ya= ml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml new file mode 100644 index 000000000000..6805fbeace11 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/mediatek,mtk-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek SoCs Watchdog timer + +maintainers: + - Matthias Brugger + +description: + The watchdog supports a pre-timeout interrupt that fires + timeout-sec/2 before the expiry. + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + oneOf: + - enum: + - mediatek,mt2712-wdt + - mediatek,mt6589-wdt + - mediatek,mt7986-wdt + - mediatek,mt8183-wdt + - mediatek,mt8186-wdt + - mediatek,mt8192-wdt + - mediatek,mt8195-wdt + - items: + - enum: + - mediatek,mt2701-wdt + - mediatek,mt6582-wdt + - mediatek,mt6797-wdt + - mediatek,mt7622-wdt + - mediatek,mt7623-wdt + - mediatek,mt7629-wdt + - mediatek,mt8516-wdt + - const: mediatek,mt6589-wdt + + reg: + maxItems: 1 + + interrupts: + items: + - description: Watchdog pre-timeout (bark) interrupt + + mediatek,disable-extrst: + description: Disable sending output reset signal + type: boolean + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + watchdog: watchdog@10007000 { + compatible =3D "mediatek,mt8183-wdt"; + reg =3D <0 0x10007000 0 0x100>; + interrupts =3D ; + mediatek,disable-extrst; + timeout-sec =3D <10>; + #reset-cells =3D <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Docum= entation/devicetree/bindings/watchdog/mtk-wdt.txt deleted file mode 100644 index 762c62e428ef..000000000000 --- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt +++ /dev/null @@ -1,42 +0,0 @@ -Mediatek SoCs Watchdog timer - -The watchdog supports a pre-timeout interrupt that fires timeout-sec/2 -before the expiry. - -Required properties: - -- compatible should contain: - "mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701 - "mediatek,mt2712-wdt": for MT2712 - "mediatek,mt6582-wdt", "mediatek,mt6589-wdt": for MT6582 - "mediatek,mt6589-wdt": for MT6589 - "mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797 - "mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622 - "mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623 - "mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629 - "mediatek,mt7986-wdt", "mediatek,mt6589-wdt": for MT7986 - "mediatek,mt8183-wdt": for MT8183 - "mediatek,mt8186-wdt", "mediatek,mt6589-wdt": for MT8186 - "mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516 - "mediatek,mt8192-wdt": for MT8192 - "mediatek,mt8195-wdt", "mediatek,mt6589-wdt": for MT8195 - -- reg : Specifies base physical address and size of the registers. - -Optional properties: -- mediatek,disable-extrst: disable send output reset signal -- interrupts: Watchdog pre-timeout (bark) interrupt. -- timeout-sec: contains the watchdog timeout in seconds. -- #reset-cells: Should be 1. - -Example: - -watchdog: watchdog@10007000 { - compatible =3D "mediatek,mt8183-wdt", - "mediatek,mt6589-wdt"; - mediatek,disable-extrst; - reg =3D <0 0x10007000 0 0x100>; - interrupts =3D ; - timeout-sec =3D <10>; - #reset-cells =3D <1>; -}; --=20 2.18.0