From nobody Sat Sep 21 14:40:55 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D55AC433F5 for ; Fri, 7 Oct 2022 09:35:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229574AbiJGJfJ (ORCPT ); Fri, 7 Oct 2022 05:35:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229712AbiJGJey (ORCPT ); Fri, 7 Oct 2022 05:34:54 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FEDE222A2; Fri, 7 Oct 2022 02:34:50 -0700 (PDT) X-UUID: dfd03e37f57d4da69725d00d3013393a-20221007 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=sAzjSWiWSdk3qWNruave0qOTHhpWPOl7rqdM80qd8MI=; b=RMAnBz9Hk8hTkj9UIbj+U8sOQV+/4kkPjft4lvweKDr24JiKwSgmg9A0knnLy46HkVwz4TJrET3ti1oYwEBHemHmimEnz2nUX81c+ZrLK7NljTpYC89XZoe95FDP/Z+mRz67/lFDrDc2EVeF+NSBXmZHbOwccBqB+Fn94zJ92pI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:b99f1e3d-6008-4cc4-af2f-e1ad6d3a74d0,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.11,REQID:b99f1e3d-6008-4cc4-af2f-e1ad6d3a74d0,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:39a5ff1,CLOUDID:2ad039e1-2948-402a-a6e4-b5d31fe11eb7,B ulkID:221006200720JI57JG2G,BulkQuantity:70,Recheck:0,SF:38|28|17|19|48|823 |824,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:41,QS:nil,BEC:nil, COL:0 X-UUID: dfd03e37f57d4da69725d00d3013393a-20221007 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1381211135; Fri, 07 Oct 2022 17:34:41 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 7 Oct 2022 17:34:40 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Fri, 7 Oct 2022 17:34:40 +0800 From: Allen-KH Cheng To: Wim Van Sebroeck , Guenter Roeck , Krzysztof Kozlowski , "Matthias Brugger" , Rob Herring , CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2 2/8] arm64: dts: mediatek: mt8195: Fix watchdog compatible Date: Fri, 7 Oct 2022 17:34:31 +0800 Message-ID: <20221007093437.12228-3-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221007093437.12228-1-allen-kh.cheng@mediatek.com> References: <20221007093437.12228-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: AngeloGioacchino Del Regno MT8195's watchdog embeds a reset controller and needs only the mediatek,mt8195-wdt compatible string as the MT6589 one is there for watchdogs that don't have any reset controller capability. Fixes: 37f2582883be ("arm64: dts: Add mediatek SoC mt8195 and evaluation bo= ard") Signed-off-by: AngeloGioacchino Del Regno Co-developed-by: Allen-KH Cheng Signed-off-by: Allen-KH Cheng --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 905d1a90b406..0b254d245b47 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -683,8 +683,7 @@ }; =20 watchdog: watchdog@10007000 { - compatible =3D "mediatek,mt8195-wdt", - "mediatek,mt6589-wdt"; + compatible =3D "mediatek,mt8195-wdt"; mediatek,disable-extrst; reg =3D <0 0x10007000 0 0x100>; #reset-cells =3D <1>; --=20 2.18.0