From nobody Tue Apr 7 14:22:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45373C4332F for ; Mon, 17 Oct 2022 10:23:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230117AbiJQKX2 (ORCPT ); Mon, 17 Oct 2022 06:23:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229968AbiJQKXP (ORCPT ); Mon, 17 Oct 2022 06:23:15 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA39F5FDF1 for ; Mon, 17 Oct 2022 03:23:13 -0700 (PDT) Received: by mail-wr1-x433.google.com with SMTP id j16so17747412wrh.5 for ; Mon, 17 Oct 2022 03:23:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=E6w6wyU+dRkLa1kli5D9X2hxBFzXMiHiBuCpH2iVcFY=; b=cPfMAnpuF8qyj6njXDkVKeqwd+B0thMSlg3UkDdQTOLNr1oj7UPqBlt29OpCp1A83B Y/Ji1w2E7vMOncrKfoyg780kOALOpFqzVSCVAX50FyinJDzkYHKDrnXGAT5OsJt+cuWr 7/4RCJJEMxazA9b5510A6aDzB5BnlmOwV/HDvTHwqNp8x7zNNuyzwT0VVapAlW4PTTYy c3YEkaW2H9aYUSPI2VznPYXgZrkgSXTsoany3D6YomSuS5/4W41fyIGzyFlQrKJATM2c 0unHPqItsh+yhJmfLcv2h/+CBCXT6+4Zaao7BXYZQn8oKUzhbpD5zHZ1SBA1/qNygE9C BytA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E6w6wyU+dRkLa1kli5D9X2hxBFzXMiHiBuCpH2iVcFY=; b=Y90TkFdNrIY/BRk0KRQQTTWtmrRDgcQGu2uDMecoeM2rmx/zRDcmNHFslZT42weaLV gnNAY/nbkckt//ubxBXx6a5pIs3TwnNIJjNkunh4T9OxdSKrPvzyb6cgni52MaQYUCDf oF21Qp91sHmv+UbW8+gWGOvi//jlhXJGofeMuDJyB1VjoF6OYisCweBImJFLjo0NRm5j nz3ouwMPjbVKSBZcQlFH5IfB8j1k59Ln2/Bws+76b1Yjdo8bg4R4nNE3yHlTgRBQ0w7F TRh3KNP+o4UtzrD4v/cPxrBcZjzQGi19LRQrDvtV7MDwvx25xTXrSnko5qa28OBlfBvQ G0KA== X-Gm-Message-State: ACrzQf38MTjqF/ePXyeRxnsXFPYGpWGNNjsL/z7ilaWDj+XCE1rfHENs wG1Hn90kRIQD52/E3LjFXouZAg== X-Google-Smtp-Source: AMsMyM5yj4ZdO9tqnXzvw6zDfFGJRKU5EV7onJLmK30KWldaSTzV/9xqt2F4hshAbQLLxKxQJZ3cVA== X-Received: by 2002:a5d:5948:0:b0:230:8e9d:d073 with SMTP id e8-20020a5d5948000000b002308e9dd073mr6032538wri.599.1666002192006; Mon, 17 Oct 2022 03:23:12 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id t9-20020a05600c198900b003b4fe03c881sm15590707wmq.48.2022.10.17.03.23.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Oct 2022 03:23:11 -0700 (PDT) From: Neil Armstrong Date: Mon, 17 Oct 2022 12:23:06 +0200 Subject: [PATCH v2 2/5] arm: dts: qcom: mdm9615: align pinctrl subnodes with dt-schema bindings MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20221005-mdm9615-pinctrl-yaml-v2-2-639fe67a04be@linaro.org> References: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> In-Reply-To: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> To: Lee Jones , Krzysztof Kozlowski , Konrad Dybcio , Andy Gross , Mark Brown , Liam Girdwood , Linus Walleij , Rob Herring , Bjorn Andersson Cc: Krzysztof Kozlowski , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, Neil Armstrong , devicetree@vger.kernel.org X-Mailer: b4 0.10.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Align the MDM9615 DT to the expected subnodes namings in the dt-schema bindings. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong --- .../boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts | 8 ++++---- arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 22 +++++++++++-------= ---- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts b/arch/= arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts index 4e53b3d70195..30a110984597 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts @@ -45,8 +45,8 @@ &msmgpio { * - 42: IOT0_GPIO1 and SD Card Detect */ =20 - gpioext1_pins: gpioext1_pins { - pins { + gpioext1_pins: gpioext1-state { + gpioext1-pins { pins =3D "gpio2"; function =3D "gpio"; input-enable; @@ -54,8 +54,8 @@ pins { }; }; =20 - sdc_cd_pins: sdc_cd_pins { - pins { + sdc_cd_pins: sdc-cd-state { + sdc-cd-pins { pins =3D "gpio42"; function =3D "gpio"; drive-strength =3D <2>; diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts= /qcom-mdm9615-wp8548.dtsi index 2fe8693dc3cd..92c8003dac25 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi @@ -22,8 +22,8 @@ &msmgpio { pinctrl-0 =3D <&reset_out_pins>; pinctrl-names =3D "default"; =20 - gsbi3_pins: gsbi3_pins { - mux { + gsbi3_pins: gsbi3-state { + gsbi3-pins { pins =3D "gpio8", "gpio9", "gpio10", "gpio11"; function =3D "gsbi3"; drive-strength =3D <8>; @@ -31,8 +31,8 @@ mux { }; }; =20 - gsbi4_pins: gsbi4_pins { - mux { + gsbi4_pins: gsbi4-state { + gsbi4-pins { pins =3D "gpio12", "gpio13", "gpio14", "gpio15"; function =3D "gsbi4"; drive-strength =3D <8>; @@ -40,15 +40,15 @@ mux { }; }; =20 - gsbi5_i2c_pins: gsbi5_i2c_pins { - pin16 { + gsbi5_i2c_pins: gsbi5-i2c-state { + sda-pins { pins =3D "gpio16"; function =3D "gsbi5_i2c"; drive-strength =3D <8>; bias-disable; }; =20 - pin17 { + scl-pins { pins =3D "gpio17"; function =3D "gsbi5_i2c"; drive-strength =3D <2>; @@ -56,8 +56,8 @@ pin17 { }; }; =20 - gsbi5_uart_pins: gsbi5_uart_pins { - mux { + gsbi5_uart_pins: gsbi5-uart-state { + gsbi5-uart-pins { pins =3D "gpio18", "gpio19"; function =3D "gsbi5_uart"; drive-strength =3D <8>; @@ -65,8 +65,8 @@ mux { }; }; =20 - reset_out_pins: reset_out_pins { - pins { + reset_out_pins: reset-out-state { + reset-out-pins { pins =3D "gpio66"; function =3D "gpio"; drive-strength =3D <2>; --=20 b4 0.10.1