From nobody Tue Apr 7 00:27:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A32CAC433FE for ; Thu, 6 Oct 2022 09:58:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231536AbiJFJ6V (ORCPT ); Thu, 6 Oct 2022 05:58:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231534AbiJFJ6I (ORCPT ); Thu, 6 Oct 2022 05:58:08 -0400 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04D8384E46 for ; Thu, 6 Oct 2022 02:58:04 -0700 (PDT) Received: by mail-wm1-x332.google.com with SMTP id 130-20020a1c0288000000b003b494ffc00bso2499786wmc.0 for ; Thu, 06 Oct 2022 02:58:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date; bh=BpfK+aYBbv4gDS/7Ac2bO0jkqdp5ST+NBdNkX62pzaE=; b=PrIsSIcUz1mU0b7hDwQittYp6HOD6E4MFbijdMnQLur8hhc2e4k8wMhR9c+t8taLdz hrlhqyPPVLR+bhYnTfgN3aqBt4qFAWT957cLpT8otV0uXaXlUv3SmvONuIvmRb8+j/46 zeM80V4QPqHyrKVFioK6QrD+Z97DefkEHeJ1VnU87kMavS/BFjHOmO8uljJ3RvroEmZQ TyRY/ejBAlsJKuroTJYLSU1WZE1oLg2GmxiW5WJh3GQXNlHNKOfmKbZyaZZOQnlHFpfz hb3KzyI7ZcukkryrW0a8hK4k0QIqTnRht11yIJk41DTavs4gquT6PFcuEdDlN6A/A0OT 3oGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date; bh=BpfK+aYBbv4gDS/7Ac2bO0jkqdp5ST+NBdNkX62pzaE=; b=pniSm1XWZYDO+ZbrRuW6hv+VzYl7LNJJ24VVJenF0U7dnaJS4FhYuK3IfEgtOZq5PA zSrtpl1nCgpoXuR9aTI8UuTMWhMZZES+pNkXQubWovuH4fQkGvW4N49+wc+TlEHCrfra ZZmCrLUNMHO1Dz+s8XXr9x5LdUPClPfV6a9mbgI1R/TMPqbjg6FxxMVF0n294lkn5m9V CSNsMYcIypGinvqw4OpAiRBsh3z3gAg0vAzFjs6L3kjCgP0az8FnZlvKpPIEZjZ+wGLD D4hSOJ9DTQHtQtlj/qsZqx3AO18idMm5jAYUHwNpmBdUzP6e+SV2iDPd5fgHNv0F66i7 EZbg== X-Gm-Message-State: ACrzQf0AyoJ3EE4zff58rQj+/0KSdEi+wEmNgf4yWtG1rM+u7MVmOiYt O2USSaofq7HL83VcIoaEOITUGg== X-Google-Smtp-Source: AMsMyM5RTjsigY8+7Yv5tBXsb6CROwlImdqSBT1Tf+5wQ/FqAqU6HDjTBorUW8x8Vq7rRLfRkSJfHw== X-Received: by 2002:a7b:c858:0:b0:3b5:7315:3c0d with SMTP id c24-20020a7bc858000000b003b573153c0dmr2596062wml.38.1665050282477; Thu, 06 Oct 2022 02:58:02 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id q11-20020adf9dcb000000b0022ac672654dsm17935603wre.58.2022.10.06.02.58.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Oct 2022 02:58:01 -0700 (PDT) From: Neil Armstrong Date: Thu, 06 Oct 2022 09:57:59 +0000 Subject: [PATCH 2/6] arm: dts: qcom: mdm9615: fix pinctrl subnodes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20221005-mdm9615-pinctrl-yaml-v1-2-0cbc006e2a30@linaro.org> References: <20221005-mdm9615-pinctrl-yaml-v1-0-0cbc006e2a30@linaro.org> In-Reply-To: <20221005-mdm9615-pinctrl-yaml-v1-0-0cbc006e2a30@linaro.org> To: Konrad Dybcio , Andy Gross , Lee Jones , Bjorn Andersson , Linus Walleij , Mark Brown , Krzysztof Kozlowski , Rob Herring , Liam Girdwood Cc: linux-gpio@vger.kernel.org, Neil Armstrong , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.10.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fix the MDM9615 DT to the expected subnodes namings. Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts | 8 ++++---- arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 22 +++++++++++-------= ---- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts b/arch/= arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts index 4e53b3d70195..30a110984597 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts @@ -45,8 +45,8 @@ &msmgpio { * - 42: IOT0_GPIO1 and SD Card Detect */ =20 - gpioext1_pins: gpioext1_pins { - pins { + gpioext1_pins: gpioext1-state { + gpioext1-pins { pins =3D "gpio2"; function =3D "gpio"; input-enable; @@ -54,8 +54,8 @@ pins { }; }; =20 - sdc_cd_pins: sdc_cd_pins { - pins { + sdc_cd_pins: sdc-cd-state { + sdc-cd-pins { pins =3D "gpio42"; function =3D "gpio"; drive-strength =3D <2>; diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts= /qcom-mdm9615-wp8548.dtsi index 2fe8693dc3cd..92c8003dac25 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi @@ -22,8 +22,8 @@ &msmgpio { pinctrl-0 =3D <&reset_out_pins>; pinctrl-names =3D "default"; =20 - gsbi3_pins: gsbi3_pins { - mux { + gsbi3_pins: gsbi3-state { + gsbi3-pins { pins =3D "gpio8", "gpio9", "gpio10", "gpio11"; function =3D "gsbi3"; drive-strength =3D <8>; @@ -31,8 +31,8 @@ mux { }; }; =20 - gsbi4_pins: gsbi4_pins { - mux { + gsbi4_pins: gsbi4-state { + gsbi4-pins { pins =3D "gpio12", "gpio13", "gpio14", "gpio15"; function =3D "gsbi4"; drive-strength =3D <8>; @@ -40,15 +40,15 @@ mux { }; }; =20 - gsbi5_i2c_pins: gsbi5_i2c_pins { - pin16 { + gsbi5_i2c_pins: gsbi5-i2c-state { + sda-pins { pins =3D "gpio16"; function =3D "gsbi5_i2c"; drive-strength =3D <8>; bias-disable; }; =20 - pin17 { + scl-pins { pins =3D "gpio17"; function =3D "gsbi5_i2c"; drive-strength =3D <2>; @@ -56,8 +56,8 @@ pin17 { }; }; =20 - gsbi5_uart_pins: gsbi5_uart_pins { - mux { + gsbi5_uart_pins: gsbi5-uart-state { + gsbi5-uart-pins { pins =3D "gpio18", "gpio19"; function =3D "gsbi5_uart"; drive-strength =3D <8>; @@ -65,8 +65,8 @@ mux { }; }; =20 - reset_out_pins: reset_out_pins { - pins { + reset_out_pins: reset-out-state { + reset-out-pins { pins =3D "gpio66"; function =3D "gpio"; drive-strength =3D <2>; --=20 b4 0.10.1