From nobody Mon Apr 6 11:11:02 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03175C433F5 for ; Tue, 4 Oct 2022 08:13:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230163AbiJDIN0 (ORCPT ); Tue, 4 Oct 2022 04:13:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230012AbiJDIMB (ORCPT ); Tue, 4 Oct 2022 04:12:01 -0400 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.220.29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC853101EE for ; Tue, 4 Oct 2022 01:11:58 -0700 (PDT) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 8BA4B1F8E6; Tue, 4 Oct 2022 08:11:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1664871117; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BjjZMZb/A25GCQ+scz6LJmjfKGXZEm1tcVtvdvPahA8=; b=QQf9f+Wpo7w3nbV14ErV3b0nJfDxn8vnr6mO93NEsQ+kDVOki/NZ5Et//N9gxbXaDvMiv0 2a0ScoJj+R+AH5V+ln2QEO7BOgy7ixz6G5hx+973MP0VPwBVaHL6Vi0IsO966g/tnwIAO8 MEDVVVP5uC0KS2srj0tXfAwiWOTHHsc= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id 4F006139EF; Tue, 4 Oct 2022 08:11:57 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id 9koDEs3qO2PPSAAAMHmgww (envelope-from ); Tue, 04 Oct 2022 08:11:57 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH v4 16/16] x86/mtrr: simplify mtrr_ops initialization Date: Tue, 4 Oct 2022 10:10:23 +0200 Message-Id: <20221004081023.32402-17-jgross@suse.com> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20221004081023.32402-1-jgross@suse.com> References: <20221004081023.32402-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The way mtrr_if is initialized with the correct mtrr_ops structure is quite weird. Simplify that by dropping the vendor specific init functions and the mtrr_ops[] array. Replace those with direct assignments of the related vendor specific ops array to mtrr_if. Signed-off-by: Juergen Gross --- V4: - new patch --- arch/x86/kernel/cpu/mtrr/amd.c | 8 +------- arch/x86/kernel/cpu/mtrr/centaur.c | 8 +------- arch/x86/kernel/cpu/mtrr/cyrix.c | 8 +------- arch/x86/kernel/cpu/mtrr/mtrr.c | 30 +++--------------------------- arch/x86/kernel/cpu/mtrr/mtrr.h | 15 +++++++++------ 5 files changed, 15 insertions(+), 54 deletions(-) diff --git a/arch/x86/kernel/cpu/mtrr/amd.c b/arch/x86/kernel/cpu/mtrr/amd.c index a65a0272096d..eff6ac62c0ff 100644 --- a/arch/x86/kernel/cpu/mtrr/amd.c +++ b/arch/x86/kernel/cpu/mtrr/amd.c @@ -109,7 +109,7 @@ amd_validate_add_page(unsigned long base, unsigned long= size, unsigned int type) return 0; } =20 -static const struct mtrr_ops amd_mtrr_ops =3D { +const struct mtrr_ops amd_mtrr_ops =3D { .vendor =3D X86_VENDOR_AMD, .set =3D amd_set_mtrr, .get =3D amd_get_mtrr, @@ -117,9 +117,3 @@ static const struct mtrr_ops amd_mtrr_ops =3D { .validate_add_page =3D amd_validate_add_page, .have_wrcomb =3D positive_have_wrcomb, }; - -int __init amd_init_mtrr(void) -{ - set_mtrr_ops(&amd_mtrr_ops); - return 0; -} diff --git a/arch/x86/kernel/cpu/mtrr/centaur.c b/arch/x86/kernel/cpu/mtrr/= centaur.c index f27177816569..b8a74eddde83 100644 --- a/arch/x86/kernel/cpu/mtrr/centaur.c +++ b/arch/x86/kernel/cpu/mtrr/centaur.c @@ -111,7 +111,7 @@ centaur_validate_add_page(unsigned long base, unsigned = long size, unsigned int t return 0; } =20 -static const struct mtrr_ops centaur_mtrr_ops =3D { +const struct mtrr_ops centaur_mtrr_ops =3D { .vendor =3D X86_VENDOR_CENTAUR, .set =3D centaur_set_mcr, .get =3D centaur_get_mcr, @@ -119,9 +119,3 @@ static const struct mtrr_ops centaur_mtrr_ops =3D { .validate_add_page =3D centaur_validate_add_page, .have_wrcomb =3D positive_have_wrcomb, }; - -int __init centaur_init_mtrr(void) -{ - set_mtrr_ops(¢aur_mtrr_ops); - return 0; -} diff --git a/arch/x86/kernel/cpu/mtrr/cyrix.c b/arch/x86/kernel/cpu/mtrr/cy= rix.c index c77d3b0a5bf2..173b9e01e623 100644 --- a/arch/x86/kernel/cpu/mtrr/cyrix.c +++ b/arch/x86/kernel/cpu/mtrr/cyrix.c @@ -234,7 +234,7 @@ static void cyrix_set_arr(unsigned int reg, unsigned lo= ng base, post_set(); } =20 -static const struct mtrr_ops cyrix_mtrr_ops =3D { +const struct mtrr_ops cyrix_mtrr_ops =3D { .vendor =3D X86_VENDOR_CYRIX, .set =3D cyrix_set_arr, .get =3D cyrix_get_arr, @@ -242,9 +242,3 @@ static const struct mtrr_ops cyrix_mtrr_ops =3D { .validate_add_page =3D generic_validate_add_page, .have_wrcomb =3D positive_have_wrcomb, }; - -int __init cyrix_init_mtrr(void) -{ - set_mtrr_ops(&cyrix_mtrr_ops); - return 0; -} diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtr= r.c index 1b652fa768a6..7ba68356c0ff 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.c +++ b/arch/x86/kernel/cpu/mtrr/mtrr.c @@ -65,16 +65,8 @@ static DEFINE_MUTEX(mtrr_mutex); =20 u64 size_or_mask, size_and_mask; =20 -static const struct mtrr_ops *mtrr_ops[X86_VENDOR_NUM] __ro_after_init; - const struct mtrr_ops *mtrr_if; =20 -void __init set_mtrr_ops(const struct mtrr_ops *ops) -{ - if (ops->vendor && ops->vendor < X86_VENDOR_NUM) - mtrr_ops[ops->vendor] =3D ops; -} - /* Returns non-zero if we have the write-combining memory type */ static int have_wrcomb(void) { @@ -578,20 +570,6 @@ int arch_phys_wc_index(int handle) } EXPORT_SYMBOL_GPL(arch_phys_wc_index); =20 -/* - * HACK ALERT! - * These should be called implicitly, but we can't yet until all the initc= all - * stuff is done... - */ -static void __init init_ifs(void) -{ -#ifndef CONFIG_X86_64 - amd_init_mtrr(); - cyrix_init_mtrr(); - centaur_init_mtrr(); -#endif -} - /* The suspend/resume methods are only for CPU without MTRR. CPU using gen= eric * MTRR driver doesn't require this */ @@ -649,8 +627,6 @@ void __init mtrr_bp_init(void) { u32 phys_addr; =20 - init_ifs(); - phys_addr =3D 32; =20 if (boot_cpu_has(X86_FEATURE_MTRR)) { @@ -691,21 +667,21 @@ void __init mtrr_bp_init(void) case X86_VENDOR_AMD: if (cpu_feature_enabled(X86_FEATURE_K6_MTRR)) { /* Pre-Athlon (K6) AMD CPU MTRRs */ - mtrr_if =3D mtrr_ops[X86_VENDOR_AMD]; + mtrr_if =3D vendor_mtrr_ops(amd_mtrr_ops); size_or_mask =3D SIZE_OR_MASK_BITS(32); size_and_mask =3D 0; } break; case X86_VENDOR_CENTAUR: if (cpu_feature_enabled(X86_FEATURE_CENTAUR_MCR)) { - mtrr_if =3D mtrr_ops[X86_VENDOR_CENTAUR]; + mtrr_if =3D vendor_mtrr_ops(centaur_mtrr_ops); size_or_mask =3D SIZE_OR_MASK_BITS(32); size_and_mask =3D 0; } break; case X86_VENDOR_CYRIX: if (cpu_feature_enabled(X86_FEATURE_CYRIX_ARR)) { - mtrr_if =3D mtrr_ops[X86_VENDOR_CYRIX]; + mtrr_if =3D vendor_mtrr_ops(cyrix_mtrr_ops); size_or_mask =3D SIZE_OR_MASK_BITS(32); size_and_mask =3D 0; } diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtr= r.h index c98928ceee6a..7a7387356192 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.h +++ b/arch/x86/kernel/cpu/mtrr/mtrr.h @@ -51,8 +51,6 @@ void fill_mtrr_var_range(unsigned int index, u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi); bool get_mtrr_state(void); =20 -extern void __init set_mtrr_ops(const struct mtrr_ops *ops); - extern u64 size_or_mask, size_and_mask; extern const struct mtrr_ops *mtrr_if; =20 @@ -66,10 +64,15 @@ void mtrr_state_warn(void); const char *mtrr_attrib_to_str(int x); void mtrr_wrmsr(unsigned, unsigned, unsigned); =20 -/* CPU specific mtrr init functions */ -int amd_init_mtrr(void); -int cyrix_init_mtrr(void); -int centaur_init_mtrr(void); +/* CPU specific mtrr_ops vectors. */ +extern const struct mtrr_ops amd_mtrr_ops; +extern const struct mtrr_ops cyrix_mtrr_ops; +extern const struct mtrr_ops centaur_mtrr_ops; +#ifdef CONFIG_X86_64 +#define vendor_mtrr_ops(x) NULL +#else +#define vendor_mtrr_ops(x) &(x) +#endif =20 extern int changed_by_mtrr_cleanup; extern int mtrr_cleanup(unsigned address_bits); --=20 2.35.3