From nobody Mon Apr 6 11:11:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A16F4C433FE for ; Tue, 4 Oct 2022 08:12:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230125AbiJDIM5 (ORCPT ); Tue, 4 Oct 2022 04:12:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229938AbiJDIL4 (ORCPT ); Tue, 4 Oct 2022 04:11:56 -0400 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.220.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39F9010FE5 for ; Tue, 4 Oct 2022 01:11:25 -0700 (PDT) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 85098219B0; Tue, 4 Oct 2022 08:11:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1664871083; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Tj4aELXaya1CaSjViiaKMXOfNXjJijcbMqgP3t4oiQA=; b=HVmgXUg+EIcCSmyVSFKEIollTXBD3At3iVM/zHCr25HtbpymoSptLLUWjnA0/Be+iOT1Tc ++I16uI7wsxXrt8/PKZvURJRNN98Kx0z3rLS6O6a9gZ7n4miZlcshAOLB/JODEsblBGbFz vxy5n8J7L55Bo34U6G74wbfBJEkjW0I= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id 4BE01139EF; Tue, 4 Oct 2022 08:11:23 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id 16syEavqO2OGSAAAMHmgww (envelope-from ); Tue, 04 Oct 2022 08:11:23 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH v4 10/16] x86/mtrr: get rid of mtrr_enabled bool Date: Tue, 4 Oct 2022 10:10:17 +0200 Message-Id: <20221004081023.32402-11-jgross@suse.com> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20221004081023.32402-1-jgross@suse.com> References: <20221004081023.32402-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" There is no need for keeping mtrr_enabled, as it can easily be replaced by testing mtrr_if to be not NULL. Signed-off-by: Juergen Gross --- V4: - new patch --- arch/x86/kernel/cpu/mtrr/mtrr.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtr= r.c index 9e1b478ac896..7eed5387e828 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.c +++ b/arch/x86/kernel/cpu/mtrr/mtrr.c @@ -59,7 +59,6 @@ #define MTRR_TO_PHYS_WC_OFFSET 1000 =20 u32 num_var_ranges; -static bool mtrr_enabled; =20 unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES]; static DEFINE_MUTEX(mtrr_mutex); @@ -299,7 +298,7 @@ int mtrr_add_page(unsigned long base, unsigned long siz= e, int i, replace, error; mtrr_type ltype; =20 - if (!mtrr_enabled) + if (!mtrr_if) return -ENXIO; =20 error =3D mtrr_if->validate_add_page(base, size, type); @@ -447,7 +446,7 @@ static int mtrr_check(unsigned long base, unsigned long= size) int mtrr_add(unsigned long base, unsigned long size, unsigned int type, bool increment) { - if (!mtrr_enabled) + if (!mtrr_if) return -ENODEV; if (mtrr_check(base, size)) return -EINVAL; @@ -476,7 +475,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned= long size) unsigned long lbase, lsize; int error =3D -EINVAL; =20 - if (!mtrr_enabled) + if (!mtrr_if) return -ENODEV; =20 max =3D num_var_ranges; @@ -536,7 +535,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned= long size) */ int mtrr_del(int reg, unsigned long base, unsigned long size) { - if (!mtrr_enabled) + if (!mtrr_if) return -ENODEV; if (mtrr_check(base, size)) return -EINVAL; @@ -562,7 +561,7 @@ int arch_phys_wc_add(unsigned long base, unsigned long = size) { int ret; =20 - if (pat_enabled() || !mtrr_enabled) + if (pat_enabled() || !mtrr_if) return 0; /* Success! (We don't need to do anything.) */ =20 ret =3D mtrr_add(base, size, MTRR_TYPE_WRCOMB, true); @@ -751,22 +750,21 @@ void __init mtrr_bp_init(void) } =20 if (mtrr_if) { - mtrr_enabled =3D true; set_num_var_ranges(mtrr_if =3D=3D &generic_mtrr_ops); init_table(); if (mtrr_if =3D=3D &generic_mtrr_ops) { /* BIOS may override */ - mtrr_enabled =3D get_mtrr_state(); - - if (mtrr_enabled) { + if (get_mtrr_state()) { memory_caching_control |=3D CACHE_MTRR | CACHE_PAT; changed_by_mtrr_cleanup =3D mtrr_cleanup(phys_addr); cache_cpu_init(); + } else { + mtrr_if =3D NULL; } } } =20 - if (!mtrr_enabled) { + if (!mtrr_if) { pr_info("Disabled\n"); =20 /* @@ -807,7 +805,7 @@ void mtrr_save_state(void) { int first_cpu; =20 - if (!mtrr_enabled) + if (!mtrr_if) return; =20 first_cpu =3D cpumask_first(cpu_online_mask); @@ -852,7 +850,7 @@ void mtrr_bp_restore(void) =20 static int __init mtrr_init_finialize(void) { - if (!mtrr_enabled) + if (!mtrr_if) return 0; =20 if (memory_caching_control & CACHE_MTRR) { --=20 2.35.3