From nobody Tue Feb 10 04:13:02 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45D40C4332F for ; Fri, 30 Sep 2022 09:59:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230297AbiI3J7o (ORCPT ); Fri, 30 Sep 2022 05:59:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231476AbiI3J71 (ORCPT ); Fri, 30 Sep 2022 05:59:27 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 972B918B5D1 for ; Fri, 30 Sep 2022 02:59:26 -0700 (PDT) X-UUID: 15c3f202e9874db6b7a2c9f80a85ad85-20220930 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=FZ6iZbj6BvSVHMPh1bMt0Yjt/oNZDitv9Er3efiiglE=; b=hBPZi8bfr1jknpLvOpPCduidXmFWj1pvHtoAXlu2MkKpEUZn8qFn8Ggjr1R9g6vM5SYpvu5DOH7OZIPZgmXgbnvTiITSaJvfUTVHek1o8QgBDBCjXIgDAhz8fU9udCE6+n1SbpHakmrACqYQE+GIh4VuC3fCLMNcyU359vbrFoQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:6b818916-cbe2-4297-a6da-b820127fa262,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:39a5ff1,CLOUDID:7ac5a0a3-dc04-435c-b19b-71e131a5fc35,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 15c3f202e9874db6b7a2c9f80a85ad85-20220930 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1092951443; Fri, 30 Sep 2022 17:59:20 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 30 Sep 2022 17:59:18 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Fri, 30 Sep 2022 17:59:18 +0800 From: Yongqiang Niu To: CK Hu , Chun-Kuang Hu CC: Jassi Brar , Matthias Brugger , , , , , Hsin-Yi Wang , Yongqiang Niu Subject: [PATCH v7, 2/3] mailbox: mtk-cmdq: add gce ddr enable support flow Date: Fri, 30 Sep 2022 17:59:14 +0800 Message-ID: <20220930095915.13684-3-yongqiang.niu@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220930095915.13684-1-yongqiang.niu@mediatek.com> References: <20220930095915.13684-1-yongqiang.niu@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" add gce ddr enable control flow when gce suspend/resume Signed-off-by: Yongqiang Niu --- drivers/mailbox/mtk-cmdq-mailbox.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-= mailbox.c index 04eb44d89119..84a60750d0c4 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -94,6 +94,21 @@ struct gce_plat { u32 gce_num; }; =20 +static void cmdq_sw_ddr_enable(struct cmdq *cmdq, bool enable) +{ + if (!cmdq->sw_ddr_en) + return; + + WARN_ON(clk_bulk_enable(cmdq->gce_num, cmdq->clocks)); + + if (enable) + writel(GCE_DDR_EN | GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); + else + writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); + + clk_bulk_disable(cmdq->gce_num, cmdq->clocks); +} + u8 cmdq_get_shift_pa(struct mbox_chan *chan) { struct cmdq *cmdq =3D container_of(chan->mbox, struct cmdq, mbox); @@ -319,6 +334,8 @@ static int cmdq_suspend(struct device *dev) if (task_running) dev_warn(dev, "exist running task(s) in suspend\n"); =20 + cmdq_sw_ddr_enable(cmdq, false); + clk_bulk_unprepare(cmdq->gce_num, cmdq->clocks); =20 return 0; @@ -330,6 +347,9 @@ static int cmdq_resume(struct device *dev) =20 WARN_ON(clk_bulk_prepare(cmdq->gce_num, cmdq->clocks)); cmdq->suspended =3D false; + + cmdq_sw_ddr_enable(cmdq, true); + return 0; } =20 @@ -337,6 +357,8 @@ static int cmdq_remove(struct platform_device *pdev) { struct cmdq *cmdq =3D platform_get_drvdata(pdev); =20 + cmdq_sw_ddr_enable(cmdq, false); + clk_bulk_unprepare(cmdq->gce_num, cmdq->clocks); return 0; } --=20 2.25.1