From nobody Sat Sep 21 14:13:00 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53C1EC433F5 for ; Thu, 29 Sep 2022 11:46:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235504AbiI2Lq4 (ORCPT ); Thu, 29 Sep 2022 07:46:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235447AbiI2Lqn (ORCPT ); Thu, 29 Sep 2022 07:46:43 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 763A2111DE1; Thu, 29 Sep 2022 04:46:38 -0700 (PDT) X-UUID: 73672663ebf04bbcad80d225d199efec-20220929 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=lenYjv1geOFUZJdmgFq5riQxkkqjCdvBwevLP67S8hs=; b=p2JupJ+5kL/T3+oPkly432A0455T2StN87arfKQGynuqVaqT4TyEkjxLIgPV1KmKX63bf5Tr+c3aTnLJs42spTEtNZUO2WEQKqV6wjPihO2cuYnIMhE8Lvxvt5a1CqiS0agv/UBRaBFmWKc+kRyxCXDKxOwaFf3cDXwF2vSrggc=; X-CID-P-RULE: Spam_GS6885AD X-CID-O-INFO: VERSION:1.1.11,REQID:232b6846-81ff-4bed-b323-8e3cd6cfa4db,IP:0,U RL:25,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS6885AD,ACT ION:quarantine,TS:120 X-CID-INFO: VERSION:1.1.11,REQID:232b6846-81ff-4bed-b323-8e3cd6cfa4db,IP:0,URL :25,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:120 X-CID-META: VersionHash:39a5ff1,CLOUDID:6fd180a3-dc04-435c-b19b-71e131a5fc35,B ulkID:220929194634Y0F5NI1B,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48|823| 824,TC:nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:nil,QS:nil,BEC:n il,COL:0 X-UUID: 73672663ebf04bbcad80d225d199efec-20220929 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1086974030; Thu, 29 Sep 2022 19:46:31 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 29 Sep 2022 19:46:29 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 29 Sep 2022 19:46:29 +0800 From: Johnson Wang To: , , , CC: , , , , , , , , Johnson Wang , Edward-JW Yang Subject: [PATCH v3 2/4] dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping Date: Thu, 29 Sep 2022 19:46:22 +0800 Message-ID: <20220929114624.16809-3-johnson.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220929114624.16809-1-johnson.wang@mediatek.com> References: <20220929114624.16809-1-johnson.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the new binding documentation for MediaTek frequency hopping and spread spectrum clocking control. Co-developed-by: Edward-JW Yang Signed-off-by: Edward-JW Yang Signed-off-by: Johnson Wang Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring --- .../arm/mediatek/mediatek,mt8186-fhctl.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek= ,mt8186-fhctl.yaml diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186= -fhctl.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt818= 6-fhctl.yaml new file mode 100644 index 000000000000..258dff7ce6bc --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.= yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-fhctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek frequency hopping and spread spectrum clocking control + +maintainers: + - Edward-JW Yang + +description: | + Frequency hopping control (FHCTL) is a piece of hardware that control + some PLLs to adopt "hopping" mechanism to adjust their frequency. + Spread spectrum clocking (SSC) is another function provided by this hard= ware. + +properties: + compatible: + const: mediatek,mt8186-fhctl + + reg: + maxItems: 1 + + clocks: + description: Phandles of the PLL with FHCTL hardware capability. + minItems: 1 + maxItems: 30 + + mediatek,hopping-ssc-percent: + description: The percentage of spread spectrum clocking for one PLL. + minItems: 1 + maxItems: 30 + items: + default: 0 + minimum: 0 + maximum: 8 + +required: + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + #include + fhctl: fhctl@1000ce00 { + compatible =3D "mediatek,mt8186-fhctl"; + reg =3D <0x1000c000 0xe00>; + clocks =3D <&apmixedsys CLK_APMIXED_MSDCPLL>; + mediatek,hopping-ssc-percent =3D <3>; + }; --=20 2.18.0