From nobody Sun Feb 8 06:54:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCDADC433FE for ; Thu, 29 Sep 2022 09:29:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235488AbiI2J3n (ORCPT ); Thu, 29 Sep 2022 05:29:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234889AbiI2J30 (ORCPT ); Thu, 29 Sep 2022 05:29:26 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EDF5B145C96; Thu, 29 Sep 2022 02:29:24 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5F37A60EB4; Thu, 29 Sep 2022 09:29:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 53090C43152; Thu, 29 Sep 2022 09:29:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1664443763; bh=WuJsAZUgyp0wCyNm2QoREGEP0a7ostaCyBNlvLxye4c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dwE/11Y+UsoTaKu9bQ7no+ElvTTu6p29iGDMxExdQQaXiBoIxBROjG6Y2/KkVCgGR k2Q76DJi+r8Ao6YP5fUFypfVfgJhyO+v3RD8MhkC13aDTtCSePikahZCpmrymjKlx4 S1alkpRTfCf/3oIXePxhe2VAYtY9reMjGmeIev1TqAOoquUJ20jfrC36oiG0/8Dw/Y yBDV82MUpANuH7WovYzBKx3JJh4ONywqmqkuRGo78usu4idNBe+KCE0xHTDa5Gb/p4 CwP5Lslllf+rrrPVW/v4p/n1leBtxFc2XzSvHLvRQ37VyKJdtP4OA4cR1PV2nGv81B INSpEaSdzsIRw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1odprG-00061Y-48; Thu, 29 Sep 2022 11:29:30 +0200 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Kishon Vijay Abraham I , Dmitry Baryshkov , Neil Armstrong , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 08/11] phy: qcom-qmp-ufs: clean up power-down handling Date: Thu, 29 Sep 2022 11:29:13 +0200 Message-Id: <20220929092916.23068-9-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220929092916.23068-1-johan+linaro@kernel.org> References: <20220929092916.23068-1-johan+linaro@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Always define the POWER_DOWN_CONTROL register instead of falling back to the v2 (and v4) offset during power on and power off. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm= /phy-qcom-qmp-ufs.c index d7b35b715b95..c8d86aecfe74 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c @@ -89,22 +89,26 @@ enum qphy_reg_layout { static const unsigned int msm8996_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] =3D= { [QPHY_START_CTRL] =3D 0x00, [QPHY_PCS_READY_STATUS] =3D 0x168, + [QPHY_PCS_POWER_DOWN_CONTROL] =3D 0x04, }; =20 static const unsigned int sdm845_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] =3D { [QPHY_START_CTRL] =3D 0x00, [QPHY_PCS_READY_STATUS] =3D 0x160, + [QPHY_PCS_POWER_DOWN_CONTROL] =3D 0x04, }; =20 static const unsigned int sm6115_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] =3D { [QPHY_START_CTRL] =3D 0x00, [QPHY_PCS_READY_STATUS] =3D 0x168, + [QPHY_PCS_POWER_DOWN_CONTROL] =3D 0x04, }; =20 static const unsigned int sm8150_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] =3D { [QPHY_START_CTRL] =3D QPHY_V4_PCS_UFS_PHY_START, [QPHY_PCS_READY_STATUS] =3D QPHY_V4_PCS_UFS_READY_STATUS, [QPHY_SW_RESET] =3D QPHY_V4_PCS_UFS_SW_RESET, + [QPHY_PCS_POWER_DOWN_CONTROL] =3D QPHY_V4_PCS_UFS_POWER_DOWN_CONTROL, }; =20 static const struct qmp_phy_init_tbl msm8996_ufs_serdes_tbl[] =3D { @@ -856,13 +860,8 @@ static int qmp_ufs_com_init(struct qmp_phy *qphy) if (ret) goto err_disable_regulators; =20 - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) - qphy_setbits(pcs, - cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], - cfg->pwrdn_ctrl); - else - qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, - cfg->pwrdn_ctrl); + qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + cfg->pwrdn_ctrl); =20 return 0; =20 @@ -996,13 +995,8 @@ static int qmp_ufs_power_off(struct phy *phy) qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); =20 /* Put PHY into POWER DOWN state: active low */ - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) { - qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], - cfg->pwrdn_ctrl); - } else { - qphy_clrbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, - cfg->pwrdn_ctrl); - } + qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + cfg->pwrdn_ctrl); =20 return 0; } --=20 2.35.1