From nobody Mon Apr 6 11:22:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D57FEC07E9D for ; Tue, 27 Sep 2022 16:24:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233058AbiI0QYk (ORCPT ); Tue, 27 Sep 2022 12:24:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231783AbiI0QYK (ORCPT ); Tue, 27 Sep 2022 12:24:10 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2B27F3907; Tue, 27 Sep 2022 09:24:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664295849; x=1695831849; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NGzxSjw4VSFj+YnFlwkpebVj3ZY6c5JRzng6n18lD6A=; b=IIgzUXbOhFjikUEXQ7ls/b5LmDm57+fGgUvanJo2wCGB/De29ObhjquX ofmBC1h9mDrASWn3cXwKBc0BfRuMf5RIvFZjPOE2vwTyGm7MyN/R9x1sI lZGcbCb71drJPVpj2UlMgVt/ytyV+5KcylQbiD9DsLhnWMTYg2J1ug+Mn UxOGs743GHlQMbdYApekXHUzQObmCK2mfsRFQElpwWrgGydKNa1BD+LxY eUQRW91RigTv8Fd1APwPjlhI0B8V8HYfp9qZLXX229PIVsjwK/9fijbo4 rSpMD6aBvpm96qDTueBsCeyutHQu7Ytpg1OmTarvmuP3S5Gbarnkg6xB9 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10483"; a="327719523" X-IronPort-AV: E=Sophos;i="5.93,349,1654585200"; d="scan'208";a="327719523" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2022 09:24:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10483"; a="684047857" X-IronPort-AV: E=Sophos;i="5.93,349,1654585200"; d="scan'208";a="684047857" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 27 Sep 2022 09:24:07 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id AD81357F; Tue, 27 Sep 2022 19:24:23 +0300 (EEST) From: Andy Shevchenko To: Hans de Goede , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Andy Shevchenko , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Thierry Reding Subject: [PATCH v4 7/7] pwm: lpss: Add a comment to the bypass field Date: Tue, 27 Sep 2022 19:24:21 +0300 Message-Id: <20220927162421.11052-8-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220927162421.11052-1-andriy.shevchenko@linux.intel.com> References: <20220927162421.11052-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a comment to the bypass field based on the commit b997e3edca4f ("pwm: lpss: Set enable-bit before waiting for update-bit to go low"). Signed-off-by: Andy Shevchenko Reviewed-by: Hans de Goede Acked-by: Uwe Kleine-K=C3=B6nig --- drivers/pwm/pwm-lpss.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h index c344921b2cab..8e82eb5a7e00 100644 --- a/drivers/pwm/pwm-lpss.h +++ b/drivers/pwm/pwm-lpss.h @@ -25,6 +25,11 @@ struct pwm_lpss_boardinfo { unsigned long clk_rate; unsigned int npwm; unsigned long base_unit_bits; + /* + * Some versions of the IP may stuck in the state machine if enable + * bit is not set, and hence update bit will show busy status till + * the reset. For the rest it may be otherwise. + */ bool bypass; /* * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device --=20 2.35.1