From nobody Mon Apr 6 13:29:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 748C6C6FA8E for ; Mon, 26 Sep 2022 18:38:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231179AbiIZSi3 (ORCPT ); Mon, 26 Sep 2022 14:38:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230002AbiIZShr (ORCPT ); Mon, 26 Sep 2022 14:37:47 -0400 Received: from hall.aurel32.net (hall.aurel32.net [IPv6:2001:bc8:30d7:100::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36DB06B8C6; Mon, 26 Sep 2022 11:37:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=aurel32.net ; s=202004.hall; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Content-Type:From:Reply-To: Subject:Content-ID:Content-Description:X-Debbugs-Cc; bh=JoBrSIViiPFntiiATVrjMMvf98esm6nwUVBJYWYc5Yc=; b=hUHMlugCDZMt2WVw3X/sXMx+3Z HcPYfEMtEPaKSXUJpGTsnb2GbnybR3f753cPG6GhLjg2xUgYHzWNDHIqdiAo7Cp0dFB+uF9Utb2M8 azLhxG3h+8SRCz73MmeCMk24rDokupB4K3Nl2w2ZVvTutJ6fphCjqSOkmn990eRZlQmb+6+6Uau5K Kv6dhQ8s2I4cP8tqPichgCzfDXufkX9ouGhpgSk55QHV0P8yh3Gpo5ICwUZD9gwiy78fbTlNNibYO JlCygL8BBwPzSlcjaDMjONYGZA3a136eB/rLagPZbBWVQbDCZHJ5KjD4QkJkPmSvsk4+Nz1sPkg4b JPowGN4w==; Received: from [2a01:e34:ec5d:a741:8a4c:7c4e:dc4c:1787] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ocsz3-00B9PX-DG; Mon, 26 Sep 2022 20:37:37 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.96) (envelope-from ) id 1ocsz1-007wc9-1j; Mon, 26 Sep 2022 20:37:35 +0200 From: Aurelien Jarno To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support), linux-kernel@vger.kernel.org (open list) Cc: Dongjin Kim , Aurelien Jarno Subject: [PATCH v2 06/13] arm64: dts: rockchip: Enable vop2 and hdmi tx on ODROID-M1 Date: Mon, 26 Sep 2022 20:37:20 +0200 Message-Id: <20220926183727.1893566-7-aurelien@aurel32.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220926183727.1893566-1-aurelien@aurel32.net> References: <20220926183727.1893566-1-aurelien@aurel32.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enable the RK356x Video Output Processor (VOP) 2 on ODROID M1. Signed-off-by: Aurelien Jarno --- .../boot/dts/rockchip/rk3568-odroid-m1.dts | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64= /boot/dts/rockchip/rk3568-odroid-m1.dts index 3079abbec5dc..a7077d159099 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts @@ -8,6 +8,7 @@ #include #include #include +#include #include "rk3568.dtsi" =20 / { @@ -37,6 +38,17 @@ dc_12v: dc-12v-regulator { regulator-max-microvolt =3D <12000000>; }; =20 + hdmi-con { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint =3D <&hdmi_out_con>; + }; + }; + }; + leds { compatible =3D "gpio-leds"; =20 @@ -131,6 +143,24 @@ &gmac0_rgmii_clk rx_delay =3D <0x2d>; }; =20 +&hdmi { + avdd-0v9-supply =3D <&vdda0v9_image>; + avdd-1v8-supply =3D <&vcca1v8_image>; + status =3D "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint =3D <&hdmi_con_in>; + }; +}; + &i2c0 { status =3D "okay"; =20 @@ -502,3 +532,20 @@ &tsadc { &uart2 { status =3D "okay"; }; + +&vop { + assigned-clocks =3D <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents =3D <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi_in_vp0>; + }; +}; --=20 2.35.1