From nobody Tue Dec 16 08:52:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0748C07E9D for ; Mon, 26 Sep 2022 11:04:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237242AbiIZLE4 (ORCPT ); Mon, 26 Sep 2022 07:04:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237349AbiIZLDw (ORCPT ); Mon, 26 Sep 2022 07:03:52 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E66AA5F22F; Mon, 26 Sep 2022 03:32:45 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 6ADCAB80926; Mon, 26 Sep 2022 10:30:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A5DEFC433C1; Mon, 26 Sep 2022 10:30:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1664188236; bh=kEcA/9wTN6peHSuhYVAET0L6NbfiIGmPkAVhetaQM1U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=2fKzjqWPelfip2hcdlUBu7RSpkhsRumzAMv1PWlQnLaYgOWvUgPvsJmtZrSYpqQUU NT1rinPbp32PSeUM2NWwm6OKjzNCF2p2pTqT90oXlNglFwtQeUU+9ZwXcIgSSefmHt FEP2DCWgtfYLytUcJfmEAmCNziBgzgxSBR3MBc+c= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Serge Semin , Keguang Zhang , Thomas Bogendoerfer , Sasha Levin Subject: [PATCH 5.10 083/141] MIPS: Loongson32: Fix PHY-mode being left unspecified Date: Mon, 26 Sep 2022 12:11:49 +0200 Message-Id: <20220926100757.458014834@linuxfoundation.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220926100754.639112000@linuxfoundation.org> References: <20220926100754.639112000@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Serge Semin [ Upstream commit e9f3f8f488005f6da3cfb66070706770ecaef747 ] commit 0060c8783330 ("net: stmmac: implement support for passive mode converters via dt") has changed the plat->interface field semantics from containing the PHY-mode to specifying the MAC-PCS interface mode. Due to that the loongson32 platform code will leave the phylink interface uninitialized with the PHY-mode intended by the means of the actual platform setup. The commit-author most likely has just missed the arch-specific code to fix. Let's mend the Loongson32 platform code then by assigning the PHY-mode to the phy_interface field of the STMMAC platform data. Fixes: 0060c8783330 ("net: stmmac: implement support for passive mode conve= rters via dt") Signed-off-by: Serge Semin Signed-off-by: Keguang Zhang Tested-by: Keguang Zhang Signed-off-by: Thomas Bogendoerfer Signed-off-by: Sasha Levin --- arch/mips/loongson32/common/platform.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/= common/platform.c index 794c96c2a4cd..311dc1580bbd 100644 --- a/arch/mips/loongson32/common/platform.c +++ b/arch/mips/loongson32/common/platform.c @@ -98,7 +98,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void = *priv) if (plat_dat->bus_id) { __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 | GMAC1_USE_UART0, LS1X_MUX_CTRL0); - switch (plat_dat->interface) { + switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RGMII: val &=3D ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23); break; @@ -107,12 +107,12 @@ int ls1x_eth_mux_init(struct platform_device *pdev, v= oid *priv) break; default: pr_err("unsupported mii mode %d\n", - plat_dat->interface); + plat_dat->phy_interface); return -ENOTSUPP; } val &=3D ~GMAC1_SHUT; } else { - switch (plat_dat->interface) { + switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RGMII: val &=3D ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01); break; @@ -121,7 +121,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, voi= d *priv) break; default: pr_err("unsupported mii mode %d\n", - plat_dat->interface); + plat_dat->phy_interface); return -ENOTSUPP; } val &=3D ~GMAC0_SHUT; @@ -131,7 +131,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, voi= d *priv) plat_dat =3D dev_get_platdata(&pdev->dev); =20 val &=3D ~PHY_INTF_SELI; - if (plat_dat->interface =3D=3D PHY_INTERFACE_MODE_RMII) + if (plat_dat->phy_interface =3D=3D PHY_INTERFACE_MODE_RMII) val |=3D 0x4 << PHY_INTF_SELI_SHIFT; __raw_writel(val, LS1X_MUX_CTRL1); =20 @@ -146,9 +146,9 @@ static struct plat_stmmacenet_data ls1x_eth0_pdata =3D { .bus_id =3D 0, .phy_addr =3D -1, #if defined(CONFIG_LOONGSON1_LS1B) - .interface =3D PHY_INTERFACE_MODE_MII, + .phy_interface =3D PHY_INTERFACE_MODE_MII, #elif defined(CONFIG_LOONGSON1_LS1C) - .interface =3D PHY_INTERFACE_MODE_RMII, + .phy_interface =3D PHY_INTERFACE_MODE_RMII, #endif .mdio_bus_data =3D &ls1x_mdio_bus_data, .dma_cfg =3D &ls1x_eth_dma_cfg, @@ -186,7 +186,7 @@ struct platform_device ls1x_eth0_pdev =3D { static struct plat_stmmacenet_data ls1x_eth1_pdata =3D { .bus_id =3D 1, .phy_addr =3D -1, - .interface =3D PHY_INTERFACE_MODE_MII, + .phy_interface =3D PHY_INTERFACE_MODE_MII, .mdio_bus_data =3D &ls1x_mdio_bus_data, .dma_cfg =3D &ls1x_eth_dma_cfg, .has_gmac =3D 1, --=20 2.35.1