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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id x15-20020a19e00f000000b00498fc3d4d15sm1079375lfg.190.2022.09.22.12.57.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 12:57:02 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 05/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: fix matching pin config Date: Thu, 22 Sep 2022 21:56:44 +0200 Message-Id: <20220922195651.345369-6-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> References: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. qcom/qrb5165-rb5.dtb: pinctrl@33c0000: wsa-swr-active-pins: 'pins' is a r= equired property Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../qcom,sm8250-lpass-lpi-pinctrl.yaml | 36 +++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lp= i-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpas= s-lpi-pinctrl.yaml index 06efb1382876..9640d1110fdd 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinct= rl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinct= rl.yaml @@ -42,9 +42,17 @@ properties: gpio-ranges: maxItems: 1 =20 -#PIN CONFIGURATION NODES patternProperties: - '-pins$': + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sm8250-lpass-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sm8250-lpass-tlmm-state" + additionalProperties: false + +$defs: + qcom-sm8250-lpass-tlmm-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configura= tion. @@ -130,4 +138,28 @@ examples: gpio-controller; #gpio-cells =3D <2>; gpio-ranges =3D <&lpi_tlmm 0 0 14>; + + wsa-swr-active-state { + clk-pins { + pins =3D "gpio10"; + function =3D "wsa_swr_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio11"; + function =3D "wsa_swr_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; + }; + }; + + tx-swr-sleep-clk-state { + pins =3D "gpio0"; + function =3D "swr_tx_clk"; + drive-strength =3D <2>; + bias-pull-down; + }; }; --=20 2.34.1