From nobody Mon Apr 6 11:53:13 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16DE9C6FA82 for ; Thu, 22 Sep 2022 12:53:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231674AbiIVMxC (ORCPT ); Thu, 22 Sep 2022 08:53:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231585AbiIVMwt (ORCPT ); Thu, 22 Sep 2022 08:52:49 -0400 Received: from smtp-190a.mail.infomaniak.ch (smtp-190a.mail.infomaniak.ch [IPv6:2001:1600:4:17::190a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3161E7C18 for ; Thu, 22 Sep 2022 05:52:46 -0700 (PDT) Received: from smtp-3-0000.mail.infomaniak.ch (unknown [10.4.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4MYFLr4H9vzMpvbT; Thu, 22 Sep 2022 14:43:16 +0200 (CEST) Received: from philippe-pc.toradex.int (unknown [31.10.206.125]) by smtp-3-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4MYFLr1mgZzx4; Thu, 22 Sep 2022 14:43:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1663850596; bh=E4CXD4d3Xn+bPdqQlu5YfOTpM5v82SNMUk19vcUlzSA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UigWODTfq0hnHtkrn8jCupkr83Ls8C7bR4EE9i16Us3KHcqRTYNIqaTw05VxST2RP kwRTrtRtnStmHNfU9Sr8kCo8Gz7V2zvBqZ4AVgF5e/XC7xFxRcf94B2czKkbMtSoPV 9fBxlD+/KdPjsJ42zTGbq0QNwDxkNNSPRDp75Xqg= From: Philippe Schenker To: dri-devel@lists.freedesktop.org, Adrien Grassein Cc: Jernej Skrabec , Jonas Karlman , Robert Foss , linux-kernel@vger.kernel.org, Daniel Vetter , Neil Armstrong , Laurent Pinchart , Andrzej Hajda , David Airlie , Philippe Schenker Subject: [PATCH 1/4] drm/bridge: lt8912b: add vsync hsync Date: Thu, 22 Sep 2022 14:43:03 +0200 Message-Id: <20220922124306.34729-2-dev@pschenker.ch> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220922124306.34729-1-dev@pschenker.ch> References: <20220922124306.34729-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Currently the bridge driver does not take care whether or not the display needs positive/negative vertical/horizontal syncs. Pass these two flags to the bridge from the EDID that was read out from the display. Fixes: 30e2ae943c26 ("drm/bridge: Introduce LT8912B DSI to HDMI bridge") Signed-off-by: Philippe Schenker Acked-by: Adrien Grassein --- drivers/gpu/drm/bridge/lontium-lt8912b.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/lontium-lt8912b.c b/drivers/gpu/drm/bri= dge/lontium-lt8912b.c index 28bad30dc4e5..0fd3472e767c 100644 --- a/drivers/gpu/drm/bridge/lontium-lt8912b.c +++ b/drivers/gpu/drm/bridge/lontium-lt8912b.c @@ -268,7 +268,7 @@ static int lt8912_video_setup(struct lt8912 *lt) u32 hactive, h_total, hpw, hfp, hbp; u32 vactive, v_total, vpw, vfp, vbp; u8 settle =3D 0x08; - int ret; + int ret, hsync_activehigh, vsync_activehigh; =20 if (!lt) return -EINVAL; @@ -278,12 +278,14 @@ static int lt8912_video_setup(struct lt8912 *lt) hpw =3D lt->mode.hsync_len; hbp =3D lt->mode.hback_porch; h_total =3D hactive + hfp + hpw + hbp; + hsync_activehigh =3D lt->mode.flags & DISPLAY_FLAGS_HSYNC_HIGH; =20 vactive =3D lt->mode.vactive; vfp =3D lt->mode.vfront_porch; vpw =3D lt->mode.vsync_len; vbp =3D lt->mode.vback_porch; v_total =3D vactive + vfp + vpw + vbp; + vsync_activehigh =3D lt->mode.flags & DISPLAY_FLAGS_VSYNC_HIGH; =20 if (vactive <=3D 600) settle =3D 0x04; @@ -317,6 +319,11 @@ static int lt8912_video_setup(struct lt8912 *lt) ret |=3D regmap_write(lt->regmap[I2C_CEC_DSI], 0x3e, hfp & 0xff); ret |=3D regmap_write(lt->regmap[I2C_CEC_DSI], 0x3f, hfp >> 8); =20 + ret |=3D regmap_update_bits(lt->regmap[I2C_MAIN], 0xab, BIT(0), + vsync_activehigh ? BIT(0) : 0); + ret |=3D regmap_update_bits(lt->regmap[I2C_MAIN], 0xab, BIT(1), + hsync_activehigh ? BIT(1) : 0); + return ret; } =20 --=20 2.37.3