From nobody Sat Sep 21 16:55:43 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7036EC6FA82 for ; Thu, 22 Sep 2022 09:19:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230077AbiIVJTn (ORCPT ); Thu, 22 Sep 2022 05:19:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229525AbiIVJTW (ORCPT ); Thu, 22 Sep 2022 05:19:22 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BEBCD07B9; Thu, 22 Sep 2022 02:19:06 -0700 (PDT) X-UUID: 71f87b5f0f4843ad82e3789e59cd2a7f-20220922 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Xd4vm3J+3O75ya6gh/8Wmm4J0aIg/S8PXVKVezwTRfM=; b=jnvXQWyR0VnVnrhpD/XFrkbFJO5N830uNNNMno3u1Y+M3ZYuJveGp8jZ8YdUWQA+uoiQvsEsZhgGydZ+JPhS2RA85LieIlXvnSoYG1A6fEUSoBFnEsfSXvWcFFSy1LNGPrzGlAOAlp+5TdDBQa5gfse4QOPSfS41mPOpp2DFVQA=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:f67ed528-3992-46f9-bb81-29bdc08219c9,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:39a5ff1,CLOUDID:045eb9a2-dc04-435c-b19b-71e131a5fc35,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 71f87b5f0f4843ad82e3789e59cd2a7f-20220922 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 872646771; Thu, 22 Sep 2022 17:19:03 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Thu, 22 Sep 2022 17:19:02 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 22 Sep 2022 17:19:02 +0800 From: Miles Chen To: Stephen Boyd , Michael Turquette , Matthias Brugger CC: , AngeloGioacchino Del Regno , Chen-Yu Tsai , Chun-Jie Chen , Miles Chen , , , Subject: [PATCH 6/7] clk: mediatek: mt8183: use mtk_clk_simple_probe to simplify driver Date: Thu, 22 Sep 2022 17:18:34 +0800 Message-ID: <20220922091841.4099-7-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220922091841.4099-1-miles.chen@mediatek.com> References: <20220922091841.4099-1-miles.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mt8183-cam.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-img.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-ipu0.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-ipu1.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-ipu_adl.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-ipu_conn.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 29 +++++++++------------- drivers/clk/mediatek/clk-mt8183-vdec.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-venc.c | 27 +++++++++----------- 9 files changed, 108 insertions(+), 137 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8183-cam.c b/drivers/clk/mediatek/c= lk-mt8183-cam.c index fcc598a45165..6907b1a6a824 100644 --- a/drivers/clk/mediatek/clk-mt8183-cam.c +++ b/drivers/clk/mediatek/clk-mt8183-cam.c @@ -34,26 +34,23 @@ static const struct mtk_gate cam_clks[] =3D { GATE_CAM(CLK_CAM_CCU, "cam_ccu", "cam_sel", 12), }; =20 -static int clk_mt8183_cam_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_CAM_NR_CLK); - - mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc cam_desc =3D { + .clks =3D cam_clks, + .num_clks =3D ARRAY_SIZE(cam_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_cam[] =3D { - { .compatible =3D "mediatek,mt8183-camsys", }, - {} + { + .compatible =3D "mediatek,mt8183-camsys", + .data =3D &cam_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_cam_drv =3D { - .probe =3D clk_mt8183_cam_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-cam", .of_match_table =3D of_match_clk_mt8183_cam, diff --git a/drivers/clk/mediatek/clk-mt8183-img.c b/drivers/clk/mediatek/c= lk-mt8183-img.c index eb2def2cf0ae..8d884425d79f 100644 --- a/drivers/clk/mediatek/clk-mt8183-img.c +++ b/drivers/clk/mediatek/clk-mt8183-img.c @@ -34,26 +34,23 @@ static const struct mtk_gate img_clks[] =3D { GATE_IMG(CLK_IMG_OWE, "img_owe", "img_sel", 9), }; =20 -static int clk_mt8183_img_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IMG_NR_CLK); - - mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc img_desc =3D { + .clks =3D img_clks, + .num_clks =3D ARRAY_SIZE(img_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_img[] =3D { - { .compatible =3D "mediatek,mt8183-imgsys", }, - {} + { + .compatible =3D "mediatek,mt8183-imgsys", + .data =3D &img_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_img_drv =3D { - .probe =3D clk_mt8183_img_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-img", .of_match_table =3D of_match_clk_mt8183_img, diff --git a/drivers/clk/mediatek/clk-mt8183-ipu0.c b/drivers/clk/mediatek/= clk-mt8183-ipu0.c index b30fc9f47518..953a8a33d048 100644 --- a/drivers/clk/mediatek/clk-mt8183-ipu0.c +++ b/drivers/clk/mediatek/clk-mt8183-ipu0.c @@ -27,26 +27,23 @@ static const struct mtk_gate ipu_core0_clks[] =3D { GATE_IPU_CORE0(CLK_IPU_CORE0_IPU, "ipu_core0_ipu", "dsp_sel", 2), }; =20 -static int clk_mt8183_ipu_core0_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IPU_CORE0_NR_CLK); - - mtk_clk_register_gates(node, ipu_core0_clks, ARRAY_SIZE(ipu_core0_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc ipu_core0_desc =3D { + .clks =3D ipu_core0_clks, + .num_clks =3D ARRAY_SIZE(ipu_core0_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_ipu_core0[] =3D { - { .compatible =3D "mediatek,mt8183-ipu_core0", }, - {} + { + .compatible =3D "mediatek,mt8183-ipu_core0", + .data =3D &ipu_core0_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_ipu_core0_drv =3D { - .probe =3D clk_mt8183_ipu_core0_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-ipu_core0", .of_match_table =3D of_match_clk_mt8183_ipu_core0, diff --git a/drivers/clk/mediatek/clk-mt8183-ipu1.c b/drivers/clk/mediatek/= clk-mt8183-ipu1.c index b378957e11d0..221d12265974 100644 --- a/drivers/clk/mediatek/clk-mt8183-ipu1.c +++ b/drivers/clk/mediatek/clk-mt8183-ipu1.c @@ -27,26 +27,23 @@ static const struct mtk_gate ipu_core1_clks[] =3D { GATE_IPU_CORE1(CLK_IPU_CORE1_IPU, "ipu_core1_ipu", "dsp_sel", 2), }; =20 -static int clk_mt8183_ipu_core1_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IPU_CORE1_NR_CLK); - - mtk_clk_register_gates(node, ipu_core1_clks, ARRAY_SIZE(ipu_core1_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc ipu_core1_desc =3D { + .clks =3D ipu_core1_clks, + .num_clks =3D ARRAY_SIZE(ipu_core1_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_ipu_core1[] =3D { - { .compatible =3D "mediatek,mt8183-ipu_core1", }, - {} + { + .compatible =3D "mediatek,mt8183-ipu_core1", + .data =3D &ipu_core1_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_ipu_core1_drv =3D { - .probe =3D clk_mt8183_ipu_core1_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-ipu_core1", .of_match_table =3D of_match_clk_mt8183_ipu_core1, diff --git a/drivers/clk/mediatek/clk-mt8183-ipu_adl.c b/drivers/clk/mediat= ek/clk-mt8183-ipu_adl.c index 941b43ac8bec..8c4fd96df821 100644 --- a/drivers/clk/mediatek/clk-mt8183-ipu_adl.c +++ b/drivers/clk/mediatek/clk-mt8183-ipu_adl.c @@ -25,26 +25,23 @@ static const struct mtk_gate ipu_adl_clks[] =3D { GATE_IPU_ADL_I(CLK_IPU_ADL_CABGEN, "ipu_adl_cabgen", "dsp_sel", 24), }; =20 -static int clk_mt8183_ipu_adl_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IPU_ADL_NR_CLK); - - mtk_clk_register_gates(node, ipu_adl_clks, ARRAY_SIZE(ipu_adl_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc ipu_adl_desc =3D { + .clks =3D ipu_adl_clks, + .num_clks =3D ARRAY_SIZE(ipu_adl_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_ipu_adl[] =3D { - { .compatible =3D "mediatek,mt8183-ipu_adl", }, - {} + { + .compatible =3D "mediatek,mt8183-ipu_adl", + .data =3D &ipu_adl_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_ipu_adl_drv =3D { - .probe =3D clk_mt8183_ipu_adl_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-ipu_adl", .of_match_table =3D of_match_clk_mt8183_ipu_adl, diff --git a/drivers/clk/mediatek/clk-mt8183-ipu_conn.c b/drivers/clk/media= tek/clk-mt8183-ipu_conn.c index ae82c2e17110..14a4c3ff82a1 100644 --- a/drivers/clk/mediatek/clk-mt8183-ipu_conn.c +++ b/drivers/clk/mediatek/clk-mt8183-ipu_conn.c @@ -94,26 +94,23 @@ static const struct mtk_gate ipu_conn_clks[] =3D { "ipu_conn_cab3to1_slice", "dsp1_sel", 17), }; =20 -static int clk_mt8183_ipu_conn_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IPU_CONN_NR_CLK); - - mtk_clk_register_gates(node, ipu_conn_clks, ARRAY_SIZE(ipu_conn_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc ipu_conn_desc =3D { + .clks =3D ipu_conn_clks, + .num_clks =3D ARRAY_SIZE(ipu_conn_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_ipu_conn[] =3D { - { .compatible =3D "mediatek,mt8183-ipu_conn", }, - {} + { + .compatible =3D "mediatek,mt8183-ipu_conn", + .data =3D &ipu_conn_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_ipu_conn_drv =3D { - .probe =3D clk_mt8183_ipu_conn_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-ipu_conn", .of_match_table =3D of_match_clk_mt8183_ipu_conn, diff --git a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c b/drivers/clk/mediate= k/clk-mt8183-mfgcfg.c index d774edaf760b..f578b393f41e 100644 --- a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c +++ b/drivers/clk/mediatek/clk-mt8183-mfgcfg.c @@ -26,28 +26,23 @@ static const struct mtk_gate mfg_clks[] =3D { GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0) }; =20 -static int clk_mt8183_mfg_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - pm_runtime_enable(&pdev->dev); - - clk_data =3D mtk_alloc_clk_data(CLK_MFG_NR_CLK); - - mtk_clk_register_gates_with_dev(node, mfg_clks, ARRAY_SIZE(mfg_clks), - clk_data, &pdev->dev); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc mfg_desc =3D { + .clks =3D mfg_clks, + .num_clks =3D ARRAY_SIZE(mfg_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_mfg[] =3D { - { .compatible =3D "mediatek,mt8183-mfgcfg", }, - {} + { + .compatible =3D "mediatek,mt8183-mfgcfg", + .data =3D &mfg_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_mfg_drv =3D { - .probe =3D clk_mt8183_mfg_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-mfg", .of_match_table =3D of_match_clk_mt8183_mfg, diff --git a/drivers/clk/mediatek/clk-mt8183-vdec.c b/drivers/clk/mediatek/= clk-mt8183-vdec.c index 0548cde159d0..c294e50b96b7 100644 --- a/drivers/clk/mediatek/clk-mt8183-vdec.c +++ b/drivers/clk/mediatek/clk-mt8183-vdec.c @@ -38,26 +38,23 @@ static const struct mtk_gate vdec_clks[] =3D { GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1", "mm_sel", 0), }; =20 -static int clk_mt8183_vdec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VDEC_NR_CLK); - - mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc vdec_desc =3D { + .clks =3D vdec_clks, + .num_clks =3D ARRAY_SIZE(vdec_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_vdec[] =3D { - { .compatible =3D "mediatek,mt8183-vdecsys", }, - {} + { + .compatible =3D "mediatek,mt8183-vdecsys", + .data =3D &vdec_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_vdec_drv =3D { - .probe =3D clk_mt8183_vdec_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-vdec", .of_match_table =3D of_match_clk_mt8183_vdec, diff --git a/drivers/clk/mediatek/clk-mt8183-venc.c b/drivers/clk/mediatek/= clk-mt8183-venc.c index f86ec607d87a..0051c5d92fc5 100644 --- a/drivers/clk/mediatek/clk-mt8183-venc.c +++ b/drivers/clk/mediatek/clk-mt8183-venc.c @@ -30,26 +30,23 @@ static const struct mtk_gate venc_clks[] =3D { "mm_sel", 8), }; =20 -static int clk_mt8183_venc_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VENC_NR_CLK); - - mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc venc_desc =3D { + .clks =3D venc_clks, + .num_clks =3D ARRAY_SIZE(venc_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_venc[] =3D { - { .compatible =3D "mediatek,mt8183-vencsys", }, - {} + { + .compatible =3D "mediatek,mt8183-vencsys", + .data =3D &venc_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_venc_drv =3D { - .probe =3D clk_mt8183_venc_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-venc", .of_match_table =3D of_match_clk_mt8183_venc, --=20 2.18.0