From nobody Sat Sep 21 14:10:21 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46336C6FA8B for ; Thu, 22 Sep 2022 09:19:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230271AbiIVJTA (ORCPT ); Thu, 22 Sep 2022 05:19:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229492AbiIVJS7 (ORCPT ); Thu, 22 Sep 2022 05:18:59 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C81F3D01F2; Thu, 22 Sep 2022 02:18:57 -0700 (PDT) X-UUID: cb9f9983939f46e4b6b1e727fbb1b345-20220922 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=TfqhOqAraOYl4pp9RKfs7slY2GB+uduanHzBsKQ5+dQ=; b=K1aHmLjJG0SslGFO1rJcOsBJAqx4FpMPJqy7+rWlatfH7X3oxQVbsaQk7aF0dlNNhBZdUShfuYkxzxuPHe7gp7dlfrSx75oGfpBmLbDfO0sEI/EcHMDMGvx+7QTjBCVCImBJZk2iJdzA/ZagnziiL4Wk+GHPQIW1WYGDqyvdf+8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:738db8d4-35ff-48c4-bdb7-5f8244b928a2,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:39a5ff1,CLOUDID:9fbdab06-1cee-4c38-b21b-a45f9682fdc0,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: cb9f9983939f46e4b6b1e727fbb1b345-20220922 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 304467776; Thu, 22 Sep 2022 17:18:55 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 22 Sep 2022 17:18:53 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 22 Sep 2022 17:18:53 +0800 From: Miles Chen To: Stephen Boyd , Michael Turquette , Matthias Brugger CC: , AngeloGioacchino Del Regno , Chen-Yu Tsai , Chun-Jie Chen , Miles Chen , , , Subject: [PATCH 1/7] clk: mediatek: mt2701: use mtk_clk_simple_probe to simplify driver Date: Thu, 22 Sep 2022 17:18:29 +0800 Message-ID: <20220922091841.4099-2-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220922091841.4099-1-miles.chen@mediatek.com> References: <20220922091841.4099-1-miles.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mt2701-bdp.c | 36 ++++++++++---------------- drivers/clk/mediatek/clk-mt2701-img.c | 36 ++++++++++---------------- drivers/clk/mediatek/clk-mt2701-vdec.c | 36 ++++++++++---------------- 3 files changed, 39 insertions(+), 69 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt2701-bdp.c b/drivers/clk/mediatek/c= lk-mt2701-bdp.c index 662a8ab3fbb1..435ed4819d56 100644 --- a/drivers/clk/mediatek/clk-mt2701-bdp.c +++ b/drivers/clk/mediatek/clk-mt2701-bdp.c @@ -94,33 +94,23 @@ static const struct mtk_gate bdp_clks[] =3D { GATE_BDP1(CLK_BDP_HDMI_MON, "hdmi_mon", "hdmi_0_pll340m", 16), }; =20 -static const struct of_device_id of_match_clk_mt2701_bdp[] =3D { - { .compatible =3D "mediatek,mt2701-bdpsys", }, - {} +static const struct mtk_clk_desc bdp_desc =3D { + .clks =3D bdp_clks, + .num_clks =3D ARRAY_SIZE(bdp_clks), }; =20 -static int clk_mt2701_bdp_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_BDP_NR); - - mtk_clk_register_gates(node, bdp_clks, ARRAY_SIZE(bdp_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) - dev_err(&pdev->dev, - "could not register clock provider: %s: %d\n", - pdev->name, r); - - return r; -} +static const struct of_device_id of_match_clk_mt2701_bdp[] =3D { + { + .compatible =3D "mediatek,mt2701-bdpsys", + .data =3D &bdp_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt2701_bdp_drv =3D { - .probe =3D clk_mt2701_bdp_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt2701-bdp", .of_match_table =3D of_match_clk_mt2701_bdp, diff --git a/drivers/clk/mediatek/clk-mt2701-img.c b/drivers/clk/mediatek/c= lk-mt2701-img.c index c4f3cd26df60..7e53deb7f990 100644 --- a/drivers/clk/mediatek/clk-mt2701-img.c +++ b/drivers/clk/mediatek/clk-mt2701-img.c @@ -36,33 +36,23 @@ static const struct mtk_gate img_clks[] =3D { GATE_IMG(CLK_IMG_VENC, "img_venc", "mm_sel", 9), }; =20 -static const struct of_device_id of_match_clk_mt2701_img[] =3D { - { .compatible =3D "mediatek,mt2701-imgsys", }, - {} +static const struct mtk_clk_desc img_desc =3D { + .clks =3D img_clks, + .num_clks =3D ARRAY_SIZE(img_clks), }; =20 -static int clk_mt2701_img_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IMG_NR); - - mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) - dev_err(&pdev->dev, - "could not register clock provider: %s: %d\n", - pdev->name, r); - - return r; -} +static const struct of_device_id of_match_clk_mt2701_img[] =3D { + { + .compatible =3D "mediatek,mt2701-imgsys", + .data =3D &img_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt2701_img_drv =3D { - .probe =3D clk_mt2701_img_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt2701-img", .of_match_table =3D of_match_clk_mt2701_img, diff --git a/drivers/clk/mediatek/clk-mt2701-vdec.c b/drivers/clk/mediatek/= clk-mt2701-vdec.c index a2f18117f27a..d3089da0ab62 100644 --- a/drivers/clk/mediatek/clk-mt2701-vdec.c +++ b/drivers/clk/mediatek/clk-mt2701-vdec.c @@ -47,33 +47,23 @@ static const struct mtk_gate vdec_clks[] =3D { GATE_VDEC1(CLK_VDEC_LARB, "vdec_larb_cken", "mm_sel", 0), }; =20 -static const struct of_device_id of_match_clk_mt2701_vdec[] =3D { - { .compatible =3D "mediatek,mt2701-vdecsys", }, - {} +static const struct mtk_clk_desc vdec_desc =3D { + .clks =3D vdec_clks, + .num_clks =3D ARRAY_SIZE(vdec_clks), }; =20 -static int clk_mt2701_vdec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VDEC_NR); - - mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) - dev_err(&pdev->dev, - "could not register clock provider: %s: %d\n", - pdev->name, r); - - return r; -} +static const struct of_device_id of_match_clk_mt2701_vdec[] =3D { + { + .compatible =3D "mediatek,mt2701-vdecsys", + .data =3D &vdec_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt2701_vdec_drv =3D { - .probe =3D clk_mt2701_vdec_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt2701-vdec", .of_match_table =3D of_match_clk_mt2701_vdec, --=20 2.18.0 From nobody Sat Sep 21 14:10:21 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7AD8C6FA8B for ; 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Thu, 22 Sep 2022 17:18:56 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 22 Sep 2022 17:18:55 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 22 Sep 2022 17:18:55 +0800 From: Miles Chen To: Stephen Boyd , Michael Turquette , Matthias Brugger CC: , AngeloGioacchino Del Regno , Chen-Yu Tsai , Chun-Jie Chen , Miles Chen , , , Subject: [PATCH 2/7] clk: mediatek: mt2712: use mtk_clk_simple_probe to simplify driver Date: Thu, 22 Sep 2022 17:18:30 +0800 Message-ID: <20220922091841.4099-3-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220922091841.4099-1-miles.chen@mediatek.com> References: <20220922091841.4099-1-miles.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mt2712-bdp.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt2712-img.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt2712-jpgdec.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt2712-mfg.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt2712-vdec.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt2712-venc.c | 34 +++++++++--------------- 6 files changed, 72 insertions(+), 132 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt2712-bdp.c b/drivers/clk/mediatek/c= lk-mt2712-bdp.c index 9acab4357133..684d03e9f6de 100644 --- a/drivers/clk/mediatek/clk-mt2712-bdp.c +++ b/drivers/clk/mediatek/clk-mt2712-bdp.c @@ -58,33 +58,23 @@ static const struct mtk_gate bdp_clks[] =3D { GATE_BDP(CLK_BDP_TVD_CBUS, "bdp_tvd_cbus", "mm_sel", 30), }; =20 -static int clk_mt2712_bdp_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_BDP_NR_CLK); - - mtk_clk_register_gates(node, bdp_clks, ARRAY_SIZE(bdp_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r !=3D 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc bdp_desc =3D { + .clks =3D bdp_clks, + .num_clks =3D ARRAY_SIZE(bdp_clks), +}; =20 static const struct of_device_id of_match_clk_mt2712_bdp[] =3D { - { .compatible =3D "mediatek,mt2712-bdpsys", }, - {} + { + .compatible =3D "mediatek,mt2712-bdpsys", + .data =3D &bdp_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt2712_bdp_drv =3D { - .probe =3D clk_mt2712_bdp_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt2712-bdp", .of_match_table =3D of_match_clk_mt2712_bdp, diff --git a/drivers/clk/mediatek/clk-mt2712-img.c b/drivers/clk/mediatek/c= lk-mt2712-img.c index 5cc143e65e42..335049cdc856 100644 --- a/drivers/clk/mediatek/clk-mt2712-img.c +++ b/drivers/clk/mediatek/clk-mt2712-img.c @@ -36,33 +36,23 @@ static const struct mtk_gate img_clks[] =3D { GATE_IMG(CLK_IMG_CAM_SV2_EN, "img_cam_sv2_en", "mm_sel", 11), }; =20 -static int clk_mt2712_img_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IMG_NR_CLK); - - mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r !=3D 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc img_desc =3D { + .clks =3D img_clks, + .num_clks =3D ARRAY_SIZE(img_clks), +}; =20 static const struct of_device_id of_match_clk_mt2712_img[] =3D { - { .compatible =3D "mediatek,mt2712-imgsys", }, - {} + { + .compatible =3D "mediatek,mt2712-imgsys", + .data =3D &img_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt2712_img_drv =3D { - .probe =3D clk_mt2712_img_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt2712-img", .of_match_table =3D of_match_clk_mt2712_img, diff --git a/drivers/clk/mediatek/clk-mt2712-jpgdec.c b/drivers/clk/mediate= k/clk-mt2712-jpgdec.c index 31fc30370d98..07ba7c5e80af 100644 --- a/drivers/clk/mediatek/clk-mt2712-jpgdec.c +++ b/drivers/clk/mediatek/clk-mt2712-jpgdec.c @@ -32,33 +32,23 @@ static const struct mtk_gate jpgdec_clks[] =3D { GATE_JPGDEC(CLK_JPGDEC_JPGDEC, "jpgdec_jpgdec", "jpgdec_sel", 4), }; =20 -static int clk_mt2712_jpgdec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_JPGDEC_NR_CLK); - - mtk_clk_register_gates(node, jpgdec_clks, ARRAY_SIZE(jpgdec_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r !=3D 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc jpgdec_desc =3D { + .clks =3D jpgdec_clks, + .num_clks =3D ARRAY_SIZE(jpgdec_clks), +}; =20 static const struct of_device_id of_match_clk_mt2712_jpgdec[] =3D { - { .compatible =3D "mediatek,mt2712-jpgdecsys", }, - {} + { + .compatible =3D "mediatek,mt2712-jpgdecsys", + .data =3D &jpgdec_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt2712_jpgdec_drv =3D { - .probe =3D clk_mt2712_jpgdec_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt2712-jpgdec", .of_match_table =3D of_match_clk_mt2712_jpgdec, diff --git a/drivers/clk/mediatek/clk-mt2712-mfg.c b/drivers/clk/mediatek/c= lk-mt2712-mfg.c index a4d09675bf18..42f8cf3ecf4c 100644 --- a/drivers/clk/mediatek/clk-mt2712-mfg.c +++ b/drivers/clk/mediatek/clk-mt2712-mfg.c @@ -31,33 +31,23 @@ static const struct mtk_gate mfg_clks[] =3D { GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0), }; =20 -static int clk_mt2712_mfg_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_MFG_NR_CLK); - - mtk_clk_register_gates(node, mfg_clks, ARRAY_SIZE(mfg_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r !=3D 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc mfg_desc =3D { + .clks =3D mfg_clks, + .num_clks =3D ARRAY_SIZE(mfg_clks), +}; =20 static const struct of_device_id of_match_clk_mt2712_mfg[] =3D { - { .compatible =3D "mediatek,mt2712-mfgcfg", }, - {} + { + .compatible =3D "mediatek,mt2712-mfgcfg", + .data =3D &mfg_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt2712_mfg_drv =3D { - .probe =3D clk_mt2712_mfg_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt2712-mfg", .of_match_table =3D of_match_clk_mt2712_mfg, diff --git a/drivers/clk/mediatek/clk-mt2712-vdec.c b/drivers/clk/mediatek/= clk-mt2712-vdec.c index af13f43dd831..6296ed5c5b55 100644 --- a/drivers/clk/mediatek/clk-mt2712-vdec.c +++ b/drivers/clk/mediatek/clk-mt2712-vdec.c @@ -50,33 +50,23 @@ static const struct mtk_gate vdec_clks[] =3D { GATE_VDEC1(CLK_VDEC_IMGRZ_CKEN, "vdec_imgrz_cken", "vdec_sel", 1), }; =20 -static int clk_mt2712_vdec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VDEC_NR_CLK); - - mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r !=3D 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc vdec_desc =3D { + .clks =3D vdec_clks, + .num_clks =3D ARRAY_SIZE(vdec_clks), +}; =20 static const struct of_device_id of_match_clk_mt2712_vdec[] =3D { - { .compatible =3D "mediatek,mt2712-vdecsys", }, - {} + { + .compatible =3D "mediatek,mt2712-vdecsys", + .data =3D &vdec_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt2712_vdec_drv =3D { - .probe =3D clk_mt2712_vdec_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt2712-vdec", .of_match_table =3D of_match_clk_mt2712_vdec, diff --git a/drivers/clk/mediatek/clk-mt2712-venc.c b/drivers/clk/mediatek/= clk-mt2712-venc.c index abc08a029753..b9bfc35de629 100644 --- a/drivers/clk/mediatek/clk-mt2712-venc.c +++ b/drivers/clk/mediatek/clk-mt2712-venc.c @@ -33,33 +33,23 @@ static const struct mtk_gate venc_clks[] =3D { GATE_VENC(CLK_VENC_SMI_LARB6, "venc_smi_larb6", "jpgdec_sel", 12), }; =20 -static int clk_mt2712_venc_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VENC_NR_CLK); - - mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r !=3D 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc venc_desc =3D { + .clks =3D venc_clks, + .num_clks =3D ARRAY_SIZE(venc_clks), +}; =20 static const struct of_device_id of_match_clk_mt2712_venc[] =3D { - { .compatible =3D "mediatek,mt2712-vencsys", }, - {} + { + .compatible =3D "mediatek,mt2712-vencsys", + .data =3D &venc_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt2712_venc_drv =3D { - .probe =3D clk_mt2712_venc_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt2712-venc", .of_match_table =3D of_match_clk_mt2712_venc, --=20 2.18.0 From nobody Sat Sep 21 14:10:21 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 772C2C6FA90 for ; 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Thu, 22 Sep 2022 17:18:56 +0800 From: Miles Chen To: Stephen Boyd , Michael Turquette , Matthias Brugger CC: , AngeloGioacchino Del Regno , Chen-Yu Tsai , Chun-Jie Chen , Miles Chen , , , Subject: [PATCH 3/7] clk: mediatek: mt6765: use mtk_clk_simple_probe to simplify driver Date: Thu, 22 Sep 2022 17:18:31 +0800 Message-ID: <20220922091841.4099-4-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220922091841.4099-1-miles.chen@mediatek.com> References: <20220922091841.4099-1-miles.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mt6765-audio.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt6765-cam.c | 33 +++++++++-------------- drivers/clk/mediatek/clk-mt6765-img.c | 33 +++++++++-------------- drivers/clk/mediatek/clk-mt6765-mipi0a.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt6765-mm.c | 33 +++++++++-------------- drivers/clk/mediatek/clk-mt6765-vcodec.c | 34 +++++++++--------------- 6 files changed, 72 insertions(+), 129 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt6765-audio.c b/drivers/clk/mediatek= /clk-mt6765-audio.c index 9c6e9caad597..0aa6c0d352ca 100644 --- a/drivers/clk/mediatek/clk-mt6765-audio.c +++ b/drivers/clk/mediatek/clk-mt6765-audio.c @@ -64,33 +64,23 @@ static const struct mtk_gate audio_clks[] =3D { "audio_ck", 7), }; =20 -static int clk_mt6765_audio_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_AUDIO_NR_CLK); - - mtk_clk_register_gates(node, audio_clks, - ARRAY_SIZE(audio_clks), clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc audio_desc =3D { + .clks =3D audio_clks, + .num_clks =3D ARRAY_SIZE(audio_clks), +}; =20 static const struct of_device_id of_match_clk_mt6765_audio[] =3D { - { .compatible =3D "mediatek,mt6765-audsys", }, - {} + { + .compatible =3D "mediatek,mt6765-audsys", + .data =3D &audio_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt6765_audio_drv =3D { - .probe =3D clk_mt6765_audio_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6765-audio", .of_match_table =3D of_match_clk_mt6765_audio, diff --git a/drivers/clk/mediatek/clk-mt6765-cam.c b/drivers/clk/mediatek/c= lk-mt6765-cam.c index 2586d3ac4cd4..25f2bef38126 100644 --- a/drivers/clk/mediatek/clk-mt6765-cam.c +++ b/drivers/clk/mediatek/clk-mt6765-cam.c @@ -39,32 +39,23 @@ static const struct mtk_gate cam_clks[] =3D { GATE_CAM(CLK_CAM_CCU, "cam_ccu", "mm_ck", 12), }; =20 -static int clk_mt6765_cam_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_CAM_NR_CLK); - - mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks), clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc cam_desc =3D { + .clks =3D cam_clks, + .num_clks =3D ARRAY_SIZE(cam_clks), +}; =20 static const struct of_device_id of_match_clk_mt6765_cam[] =3D { - { .compatible =3D "mediatek,mt6765-camsys", }, - {} + { + .compatible =3D "mediatek,mt6765-camsys", + .data =3D &cam_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt6765_cam_drv =3D { - .probe =3D clk_mt6765_cam_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6765-cam", .of_match_table =3D of_match_clk_mt6765_cam, diff --git a/drivers/clk/mediatek/clk-mt6765-img.c b/drivers/clk/mediatek/c= lk-mt6765-img.c index 8cc95b98921e..a62303ef4f41 100644 --- a/drivers/clk/mediatek/clk-mt6765-img.c +++ b/drivers/clk/mediatek/clk-mt6765-img.c @@ -35,32 +35,23 @@ static const struct mtk_gate img_clks[] =3D { GATE_IMG(CLK_IMG_RSC, "img_rsc", "mm_ck", 5), }; =20 -static int clk_mt6765_img_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IMG_NR_CLK); - - mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc img_desc =3D { + .clks =3D img_clks, + .num_clks =3D ARRAY_SIZE(img_clks), +}; =20 static const struct of_device_id of_match_clk_mt6765_img[] =3D { - { .compatible =3D "mediatek,mt6765-imgsys", }, - {} + { + .compatible =3D "mediatek,mt6765-imgsys", + .data =3D &img_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt6765_img_drv =3D { - .probe =3D clk_mt6765_img_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6765-img", .of_match_table =3D of_match_clk_mt6765_img, diff --git a/drivers/clk/mediatek/clk-mt6765-mipi0a.c b/drivers/clk/mediate= k/clk-mt6765-mipi0a.c index c816e26a95f9..25c829fc3866 100644 --- a/drivers/clk/mediatek/clk-mt6765-mipi0a.c +++ b/drivers/clk/mediatek/clk-mt6765-mipi0a.c @@ -32,33 +32,23 @@ static const struct mtk_gate mipi0a_clks[] =3D { "mipi0a_csr_0a", "f_fseninf_ck", 1), }; =20 -static int clk_mt6765_mipi0a_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_MIPI0A_NR_CLK); - - mtk_clk_register_gates(node, mipi0a_clks, - ARRAY_SIZE(mipi0a_clks), clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc mipi0a_desc =3D { + .clks =3D mipi0a_clks, + .num_clks =3D ARRAY_SIZE(mipi0a_clks), +}; =20 static const struct of_device_id of_match_clk_mt6765_mipi0a[] =3D { - { .compatible =3D "mediatek,mt6765-mipi0a", }, - {} + { + .compatible =3D "mediatek,mt6765-mipi0a", + .data =3D &mipi0a_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt6765_mipi0a_drv =3D { - .probe =3D clk_mt6765_mipi0a_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6765-mipi0a", .of_match_table =3D of_match_clk_mt6765_mipi0a, diff --git a/drivers/clk/mediatek/clk-mt6765-mm.c b/drivers/clk/mediatek/cl= k-mt6765-mm.c index ee6d3b859a6c..bda774668a36 100644 --- a/drivers/clk/mediatek/clk-mt6765-mm.c +++ b/drivers/clk/mediatek/clk-mt6765-mm.c @@ -61,32 +61,23 @@ static const struct mtk_gate mm_clks[] =3D { GATE_MM(CLK_MM_F26M_HRTWT, "mm_hrtwt", "f_f26m_ck", 29), }; =20 -static int clk_mt6765_mm_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_MM_NR_CLK); - - mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc mm_desc =3D { + .clks =3D mm_clks, + .num_clks =3D ARRAY_SIZE(mm_clks), +}; =20 static const struct of_device_id of_match_clk_mt6765_mm[] =3D { - { .compatible =3D "mediatek,mt6765-mmsys", }, - {} + { + .compatible =3D "mediatek,mt6765-mmsys", + .data =3D &mm_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt6765_mm_drv =3D { - .probe =3D clk_mt6765_mm_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6765-mm", .of_match_table =3D of_match_clk_mt6765_mm, diff --git a/drivers/clk/mediatek/clk-mt6765-vcodec.c b/drivers/clk/mediate= k/clk-mt6765-vcodec.c index d8045979d48a..2bc1fbde87da 100644 --- a/drivers/clk/mediatek/clk-mt6765-vcodec.c +++ b/drivers/clk/mediatek/clk-mt6765-vcodec.c @@ -34,33 +34,23 @@ static const struct mtk_gate venc_clks[] =3D { GATE_VENC(CLK_VENC_SET3_VDEC, "venc_set3_vdec", "mm_ck", 12), }; =20 -static int clk_mt6765_vcodec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VENC_NR_CLK); - - mtk_clk_register_gates(node, venc_clks, - ARRAY_SIZE(venc_clks), clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc venc_desc =3D { + .clks =3D venc_clks, + .num_clks =3D ARRAY_SIZE(venc_clks), +}; =20 static const struct of_device_id of_match_clk_mt6765_vcodec[] =3D { - { .compatible =3D "mediatek,mt6765-vcodecsys", }, - {} + { + .compatible =3D "mediatek,mt6765-vcodecsys", + .data =3D &venc_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt6765_vcodec_drv =3D { - .probe =3D clk_mt6765_vcodec_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6765-vcodec", .of_match_table =3D of_match_clk_mt6765_vcodec, --=20 2.18.0 From nobody Sat Sep 21 14:10:21 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AA84C6FA8B for ; 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Thu, 22 Sep 2022 17:18:58 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 22 Sep 2022 17:18:58 +0800 From: Miles Chen To: Stephen Boyd , Michael Turquette , Matthias Brugger CC: , AngeloGioacchino Del Regno , Chen-Yu Tsai , Chun-Jie Chen , Miles Chen , , , Subject: [PATCH 4/7] clk: mediatek: mt6779: use mtk_clk_simple_probe to simplify driver Date: Thu, 22 Sep 2022 17:18:32 +0800 Message-ID: <20220922091841.4099-5-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220922091841.4099-1-miles.chen@mediatek.com> References: <20220922091841.4099-1-miles.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mt6779-aud.c | 29 ++++++++++++-------------- drivers/clk/mediatek/clk-mt6779-cam.c | 29 ++++++++++++-------------- drivers/clk/mediatek/clk-mt6779-img.c | 29 ++++++++++++-------------- drivers/clk/mediatek/clk-mt6779-ipe.c | 29 ++++++++++++-------------- drivers/clk/mediatek/clk-mt6779-mfg.c | 27 +++++++++++------------- drivers/clk/mediatek/clk-mt6779-vdec.c | 29 ++++++++++++-------------- drivers/clk/mediatek/clk-mt6779-venc.c | 29 ++++++++++++-------------- 7 files changed, 90 insertions(+), 111 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt6779-aud.c b/drivers/clk/mediatek/c= lk-mt6779-aud.c index 97e44abb7e87..6e473ae1fd90 100644 --- a/drivers/clk/mediatek/clk-mt6779-aud.c +++ b/drivers/clk/mediatek/clk-mt6779-aud.c @@ -89,26 +89,23 @@ static const struct mtk_gate audio_clks[] =3D { "audio_h_sel", 31), }; =20 -static const struct of_device_id of_match_clk_mt6779_aud[] =3D { - { .compatible =3D "mediatek,mt6779-audio", }, - {} +static const struct mtk_clk_desc audio_desc =3D { + .clks =3D audio_clks, + .num_clks =3D ARRAY_SIZE(audio_clks), }; =20 -static int clk_mt6779_aud_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_AUD_NR_CLK); - - mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct of_device_id of_match_clk_mt6779_aud[] =3D { + { + .compatible =3D "mediatek,mt6779-audio", + .data =3D &audio_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt6779_aud_drv =3D { - .probe =3D clk_mt6779_aud_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6779-aud", .of_match_table =3D of_match_clk_mt6779_aud, diff --git a/drivers/clk/mediatek/clk-mt6779-cam.c b/drivers/clk/mediatek/c= lk-mt6779-cam.c index 9c5117aae146..7be3db90fa4a 100644 --- a/drivers/clk/mediatek/clk-mt6779-cam.c +++ b/drivers/clk/mediatek/clk-mt6779-cam.c @@ -38,26 +38,23 @@ static const struct mtk_gate cam_clks[] =3D { GATE_CAM(CLK_CAM_FAKE_ENG, "camsys_fake_eng", "cam_sel", 14), }; =20 -static const struct of_device_id of_match_clk_mt6779_cam[] =3D { - { .compatible =3D "mediatek,mt6779-camsys", }, - {} +static const struct mtk_clk_desc cam_desc =3D { + .clks =3D cam_clks, + .num_clks =3D ARRAY_SIZE(cam_clks), }; =20 -static int clk_mt6779_cam_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_CAM_NR_CLK); - - mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct of_device_id of_match_clk_mt6779_cam[] =3D { + { + .compatible =3D "mediatek,mt6779-camsys", + .data =3D &cam_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt6779_cam_drv =3D { - .probe =3D clk_mt6779_cam_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6779-cam", .of_match_table =3D of_match_clk_mt6779_cam, diff --git a/drivers/clk/mediatek/clk-mt6779-img.c b/drivers/clk/mediatek/c= lk-mt6779-img.c index 801271477d46..9bc51fc82dbd 100644 --- a/drivers/clk/mediatek/clk-mt6779-img.c +++ b/drivers/clk/mediatek/clk-mt6779-img.c @@ -30,26 +30,23 @@ static const struct mtk_gate img_clks[] =3D { GATE_IMG(CLK_IMG_WPE_A, "imgsys_wpe_a", "img_sel", 7), }; =20 -static const struct of_device_id of_match_clk_mt6779_img[] =3D { - { .compatible =3D "mediatek,mt6779-imgsys", }, - {} +static const struct mtk_clk_desc img_desc =3D { + .clks =3D img_clks, + .num_clks =3D ARRAY_SIZE(img_clks), }; =20 -static int clk_mt6779_img_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IMG_NR_CLK); - - mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct of_device_id of_match_clk_mt6779_img[] =3D { + { + .compatible =3D "mediatek,mt6779-imgsys", + .data =3D &img_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt6779_img_drv =3D { - .probe =3D clk_mt6779_img_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6779-img", .of_match_table =3D of_match_clk_mt6779_img, diff --git a/drivers/clk/mediatek/clk-mt6779-ipe.c b/drivers/clk/mediatek/c= lk-mt6779-ipe.c index f67814ca7dfb..92e9d1ade422 100644 --- a/drivers/clk/mediatek/clk-mt6779-ipe.c +++ b/drivers/clk/mediatek/clk-mt6779-ipe.c @@ -32,26 +32,23 @@ static const struct mtk_gate ipe_clks[] =3D { GATE_IPE(CLK_IPE_DPE, "ipe_dpe", "ipe_sel", 6), }; =20 -static const struct of_device_id of_match_clk_mt6779_ipe[] =3D { - { .compatible =3D "mediatek,mt6779-ipesys", }, - {} +static const struct mtk_clk_desc ipe_desc =3D { + .clks =3D ipe_clks, + .num_clks =3D ARRAY_SIZE(ipe_clks), }; =20 -static int clk_mt6779_ipe_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IPE_NR_CLK); - - mtk_clk_register_gates(node, ipe_clks, ARRAY_SIZE(ipe_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct of_device_id of_match_clk_mt6779_ipe[] =3D { + { + .compatible =3D "mediatek,mt6779-ipesys", + .data =3D &ipe_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt6779_ipe_drv =3D { - .probe =3D clk_mt6779_ipe_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6779-ipe", .of_match_table =3D of_match_clk_mt6779_ipe, diff --git a/drivers/clk/mediatek/clk-mt6779-mfg.c b/drivers/clk/mediatek/c= lk-mt6779-mfg.c index fc7387b59758..efc793a1969a 100644 --- a/drivers/clk/mediatek/clk-mt6779-mfg.c +++ b/drivers/clk/mediatek/clk-mt6779-mfg.c @@ -27,26 +27,23 @@ static const struct mtk_gate mfg_clks[] =3D { GATE_MFG(CLK_MFGCFG_BG3D, "mfg_bg3d", "mfg_sel", 0), }; =20 -static int clk_mt6779_mfg_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_MFGCFG_NR_CLK); - - mtk_clk_register_gates(node, mfg_clks, ARRAY_SIZE(mfg_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc mfg_desc =3D { + .clks =3D mfg_clks, + .num_clks =3D ARRAY_SIZE(mfg_clks), +}; =20 static const struct of_device_id of_match_clk_mt6779_mfg[] =3D { - { .compatible =3D "mediatek,mt6779-mfgcfg", }, - {} + { + .compatible =3D "mediatek,mt6779-mfgcfg", + .data =3D &mfg_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt6779_mfg_drv =3D { - .probe =3D clk_mt6779_mfg_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6779-mfg", .of_match_table =3D of_match_clk_mt6779_mfg, diff --git a/drivers/clk/mediatek/clk-mt6779-vdec.c b/drivers/clk/mediatek/= clk-mt6779-vdec.c index 7e195b082e86..3209a6518d5b 100644 --- a/drivers/clk/mediatek/clk-mt6779-vdec.c +++ b/drivers/clk/mediatek/clk-mt6779-vdec.c @@ -39,26 +39,23 @@ static const struct mtk_gate vdec_clks[] =3D { GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1_cken", "vdec_sel", 0), }; =20 -static const struct of_device_id of_match_clk_mt6779_vdec[] =3D { - { .compatible =3D "mediatek,mt6779-vdecsys", }, - {} +static const struct mtk_clk_desc vdec_desc =3D { + .clks =3D vdec_clks, + .num_clks =3D ARRAY_SIZE(vdec_clks), }; =20 -static int clk_mt6779_vdec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VDEC_GCON_NR_CLK); - - mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct of_device_id of_match_clk_mt6779_vdec[] =3D { + { + .compatible =3D "mediatek,mt6779-vdecsys", + .data =3D &vdec_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt6779_vdec_drv =3D { - .probe =3D clk_mt6779_vdec_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6779-vdec", .of_match_table =3D of_match_clk_mt6779_vdec, diff --git a/drivers/clk/mediatek/clk-mt6779-venc.c b/drivers/clk/mediatek/= clk-mt6779-venc.c index 573efa87c9bd..c25035c0f334 100644 --- a/drivers/clk/mediatek/clk-mt6779-venc.c +++ b/drivers/clk/mediatek/clk-mt6779-venc.c @@ -30,26 +30,23 @@ static const struct mtk_gate venc_clks[] =3D { GATE_VENC_I(CLK_VENC_GCON_GALS, "venc_gals", "venc_sel", 28), }; =20 -static const struct of_device_id of_match_clk_mt6779_venc[] =3D { - { .compatible =3D "mediatek,mt6779-vencsys", }, - {} +static const struct mtk_clk_desc venc_desc =3D { + .clks =3D venc_clks, + .num_clks =3D ARRAY_SIZE(venc_clks), }; =20 -static int clk_mt6779_venc_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VENC_GCON_NR_CLK); - - mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct of_device_id of_match_clk_mt6779_venc[] =3D { + { + .compatible =3D "mediatek,mt6779-vencsys", + .data =3D &venc_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt6779_venc_drv =3D { - .probe =3D clk_mt6779_venc_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6779-venc", .of_match_table =3D of_match_clk_mt6779_venc, --=20 2.18.0 From nobody Sat Sep 21 14:10:21 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C796C6FA8B for ; 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Thu, 22 Sep 2022 17:19:01 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 22 Sep 2022 17:18:59 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 22 Sep 2022 17:18:59 +0800 From: Miles Chen To: Stephen Boyd , Michael Turquette , Matthias Brugger CC: , AngeloGioacchino Del Regno , Chen-Yu Tsai , Chun-Jie Chen , Miles Chen , , , Subject: [PATCH 5/7] clk: mediatek: mt6797: use mtk_clk_simple_probe to simplify driver Date: Thu, 22 Sep 2022 17:18:33 +0800 Message-ID: <20220922091841.4099-6-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220922091841.4099-1-miles.chen@mediatek.com> References: <20220922091841.4099-1-miles.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mt6797-img.c | 36 ++++++++++---------------- drivers/clk/mediatek/clk-mt6797-vdec.c | 36 ++++++++++---------------- drivers/clk/mediatek/clk-mt6797-venc.c | 36 ++++++++++---------------- 3 files changed, 39 insertions(+), 69 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt6797-img.c b/drivers/clk/mediatek/c= lk-mt6797-img.c index 25d17db13bac..7c6a53fbb8be 100644 --- a/drivers/clk/mediatek/clk-mt6797-img.c +++ b/drivers/clk/mediatek/clk-mt6797-img.c @@ -32,33 +32,23 @@ static const struct mtk_gate img_clks[] =3D { GATE_IMG(CLK_IMG_LARB6, "img_larb6", "mm_sel", 0), }; =20 -static const struct of_device_id of_match_clk_mt6797_img[] =3D { - { .compatible =3D "mediatek,mt6797-imgsys", }, - {} +static const struct mtk_clk_desc img_desc =3D { + .clks =3D img_clks, + .num_clks =3D ARRAY_SIZE(img_clks), }; =20 -static int clk_mt6797_img_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IMG_NR); - - mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) - dev_err(&pdev->dev, - "could not register clock provider: %s: %d\n", - pdev->name, r); - - return r; -} +static const struct of_device_id of_match_clk_mt6797_img[] =3D { + { + .compatible =3D "mediatek,mt6797-imgsys", + .data =3D &img_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt6797_img_drv =3D { - .probe =3D clk_mt6797_img_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6797-img", .of_match_table =3D of_match_clk_mt6797_img, diff --git a/drivers/clk/mediatek/clk-mt6797-vdec.c b/drivers/clk/mediatek/= clk-mt6797-vdec.c index de857894e033..6120fccc859f 100644 --- a/drivers/clk/mediatek/clk-mt6797-vdec.c +++ b/drivers/clk/mediatek/clk-mt6797-vdec.c @@ -49,33 +49,23 @@ static const struct mtk_gate vdec_clks[] =3D { GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "mm_sel", 0), }; =20 -static const struct of_device_id of_match_clk_mt6797_vdec[] =3D { - { .compatible =3D "mediatek,mt6797-vdecsys", }, - {} +static const struct mtk_clk_desc vdec_desc =3D { + .clks =3D vdec_clks, + .num_clks =3D ARRAY_SIZE(vdec_clks), }; =20 -static int clk_mt6797_vdec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VDEC_NR); - - mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) - dev_err(&pdev->dev, - "could not register clock provider: %s: %d\n", - pdev->name, r); - - return r; -} +static const struct of_device_id of_match_clk_mt6797_vdec[] =3D { + { + .compatible =3D "mediatek,mt6797-vdecsys", + .data =3D &vdec_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt6797_vdec_drv =3D { - .probe =3D clk_mt6797_vdec_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6797-vdec", .of_match_table =3D of_match_clk_mt6797_vdec, diff --git a/drivers/clk/mediatek/clk-mt6797-venc.c b/drivers/clk/mediatek/= clk-mt6797-venc.c index 78b7ed55f979..834d3834d2bb 100644 --- a/drivers/clk/mediatek/clk-mt6797-venc.c +++ b/drivers/clk/mediatek/clk-mt6797-venc.c @@ -34,33 +34,23 @@ static const struct mtk_gate venc_clks[] =3D { GATE_VENC(CLK_VENC_3, "venc_3", "venc_sel", 12), }; =20 -static const struct of_device_id of_match_clk_mt6797_venc[] =3D { - { .compatible =3D "mediatek,mt6797-vencsys", }, - {} +static const struct mtk_clk_desc venc_desc =3D { + .clks =3D venc_clks, + .num_clks =3D ARRAY_SIZE(venc_clks), }; =20 -static int clk_mt6797_venc_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VENC_NR); - - mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks), - clk_data); - - r =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) - dev_err(&pdev->dev, - "could not register clock provider: %s: %d\n", - pdev->name, r); - - return r; -} +static const struct of_device_id of_match_clk_mt6797_venc[] =3D { + { + .compatible =3D "mediatek,mt6797-vencsys", + .data =3D &venc_desc, + }, { + /* sentinel */ + } +}; =20 static struct platform_driver clk_mt6797_venc_drv =3D { - .probe =3D clk_mt6797_venc_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt6797-venc", .of_match_table =3D of_match_clk_mt6797_venc, --=20 2.18.0 From nobody Sat Sep 21 14:10:21 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7036EC6FA82 for ; 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Thu, 22 Sep 2022 17:19:03 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Thu, 22 Sep 2022 17:19:02 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 22 Sep 2022 17:19:02 +0800 From: Miles Chen To: Stephen Boyd , Michael Turquette , Matthias Brugger CC: , AngeloGioacchino Del Regno , Chen-Yu Tsai , Chun-Jie Chen , Miles Chen , , , Subject: [PATCH 6/7] clk: mediatek: mt8183: use mtk_clk_simple_probe to simplify driver Date: Thu, 22 Sep 2022 17:18:34 +0800 Message-ID: <20220922091841.4099-7-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220922091841.4099-1-miles.chen@mediatek.com> References: <20220922091841.4099-1-miles.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mt8183-cam.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-img.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-ipu0.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-ipu1.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-ipu_adl.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-ipu_conn.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 29 +++++++++------------- drivers/clk/mediatek/clk-mt8183-vdec.c | 27 +++++++++----------- drivers/clk/mediatek/clk-mt8183-venc.c | 27 +++++++++----------- 9 files changed, 108 insertions(+), 137 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8183-cam.c b/drivers/clk/mediatek/c= lk-mt8183-cam.c index fcc598a45165..6907b1a6a824 100644 --- a/drivers/clk/mediatek/clk-mt8183-cam.c +++ b/drivers/clk/mediatek/clk-mt8183-cam.c @@ -34,26 +34,23 @@ static const struct mtk_gate cam_clks[] =3D { GATE_CAM(CLK_CAM_CCU, "cam_ccu", "cam_sel", 12), }; =20 -static int clk_mt8183_cam_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_CAM_NR_CLK); - - mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc cam_desc =3D { + .clks =3D cam_clks, + .num_clks =3D ARRAY_SIZE(cam_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_cam[] =3D { - { .compatible =3D "mediatek,mt8183-camsys", }, - {} + { + .compatible =3D "mediatek,mt8183-camsys", + .data =3D &cam_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_cam_drv =3D { - .probe =3D clk_mt8183_cam_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-cam", .of_match_table =3D of_match_clk_mt8183_cam, diff --git a/drivers/clk/mediatek/clk-mt8183-img.c b/drivers/clk/mediatek/c= lk-mt8183-img.c index eb2def2cf0ae..8d884425d79f 100644 --- a/drivers/clk/mediatek/clk-mt8183-img.c +++ b/drivers/clk/mediatek/clk-mt8183-img.c @@ -34,26 +34,23 @@ static const struct mtk_gate img_clks[] =3D { GATE_IMG(CLK_IMG_OWE, "img_owe", "img_sel", 9), }; =20 -static int clk_mt8183_img_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IMG_NR_CLK); - - mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc img_desc =3D { + .clks =3D img_clks, + .num_clks =3D ARRAY_SIZE(img_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_img[] =3D { - { .compatible =3D "mediatek,mt8183-imgsys", }, - {} + { + .compatible =3D "mediatek,mt8183-imgsys", + .data =3D &img_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_img_drv =3D { - .probe =3D clk_mt8183_img_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-img", .of_match_table =3D of_match_clk_mt8183_img, diff --git a/drivers/clk/mediatek/clk-mt8183-ipu0.c b/drivers/clk/mediatek/= clk-mt8183-ipu0.c index b30fc9f47518..953a8a33d048 100644 --- a/drivers/clk/mediatek/clk-mt8183-ipu0.c +++ b/drivers/clk/mediatek/clk-mt8183-ipu0.c @@ -27,26 +27,23 @@ static const struct mtk_gate ipu_core0_clks[] =3D { GATE_IPU_CORE0(CLK_IPU_CORE0_IPU, "ipu_core0_ipu", "dsp_sel", 2), }; =20 -static int clk_mt8183_ipu_core0_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IPU_CORE0_NR_CLK); - - mtk_clk_register_gates(node, ipu_core0_clks, ARRAY_SIZE(ipu_core0_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc ipu_core0_desc =3D { + .clks =3D ipu_core0_clks, + .num_clks =3D ARRAY_SIZE(ipu_core0_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_ipu_core0[] =3D { - { .compatible =3D "mediatek,mt8183-ipu_core0", }, - {} + { + .compatible =3D "mediatek,mt8183-ipu_core0", + .data =3D &ipu_core0_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_ipu_core0_drv =3D { - .probe =3D clk_mt8183_ipu_core0_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-ipu_core0", .of_match_table =3D of_match_clk_mt8183_ipu_core0, diff --git a/drivers/clk/mediatek/clk-mt8183-ipu1.c b/drivers/clk/mediatek/= clk-mt8183-ipu1.c index b378957e11d0..221d12265974 100644 --- a/drivers/clk/mediatek/clk-mt8183-ipu1.c +++ b/drivers/clk/mediatek/clk-mt8183-ipu1.c @@ -27,26 +27,23 @@ static const struct mtk_gate ipu_core1_clks[] =3D { GATE_IPU_CORE1(CLK_IPU_CORE1_IPU, "ipu_core1_ipu", "dsp_sel", 2), }; =20 -static int clk_mt8183_ipu_core1_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IPU_CORE1_NR_CLK); - - mtk_clk_register_gates(node, ipu_core1_clks, ARRAY_SIZE(ipu_core1_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc ipu_core1_desc =3D { + .clks =3D ipu_core1_clks, + .num_clks =3D ARRAY_SIZE(ipu_core1_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_ipu_core1[] =3D { - { .compatible =3D "mediatek,mt8183-ipu_core1", }, - {} + { + .compatible =3D "mediatek,mt8183-ipu_core1", + .data =3D &ipu_core1_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_ipu_core1_drv =3D { - .probe =3D clk_mt8183_ipu_core1_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-ipu_core1", .of_match_table =3D of_match_clk_mt8183_ipu_core1, diff --git a/drivers/clk/mediatek/clk-mt8183-ipu_adl.c b/drivers/clk/mediat= ek/clk-mt8183-ipu_adl.c index 941b43ac8bec..8c4fd96df821 100644 --- a/drivers/clk/mediatek/clk-mt8183-ipu_adl.c +++ b/drivers/clk/mediatek/clk-mt8183-ipu_adl.c @@ -25,26 +25,23 @@ static const struct mtk_gate ipu_adl_clks[] =3D { GATE_IPU_ADL_I(CLK_IPU_ADL_CABGEN, "ipu_adl_cabgen", "dsp_sel", 24), }; =20 -static int clk_mt8183_ipu_adl_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IPU_ADL_NR_CLK); - - mtk_clk_register_gates(node, ipu_adl_clks, ARRAY_SIZE(ipu_adl_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc ipu_adl_desc =3D { + .clks =3D ipu_adl_clks, + .num_clks =3D ARRAY_SIZE(ipu_adl_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_ipu_adl[] =3D { - { .compatible =3D "mediatek,mt8183-ipu_adl", }, - {} + { + .compatible =3D "mediatek,mt8183-ipu_adl", + .data =3D &ipu_adl_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_ipu_adl_drv =3D { - .probe =3D clk_mt8183_ipu_adl_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-ipu_adl", .of_match_table =3D of_match_clk_mt8183_ipu_adl, diff --git a/drivers/clk/mediatek/clk-mt8183-ipu_conn.c b/drivers/clk/media= tek/clk-mt8183-ipu_conn.c index ae82c2e17110..14a4c3ff82a1 100644 --- a/drivers/clk/mediatek/clk-mt8183-ipu_conn.c +++ b/drivers/clk/mediatek/clk-mt8183-ipu_conn.c @@ -94,26 +94,23 @@ static const struct mtk_gate ipu_conn_clks[] =3D { "ipu_conn_cab3to1_slice", "dsp1_sel", 17), }; =20 -static int clk_mt8183_ipu_conn_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_IPU_CONN_NR_CLK); - - mtk_clk_register_gates(node, ipu_conn_clks, ARRAY_SIZE(ipu_conn_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc ipu_conn_desc =3D { + .clks =3D ipu_conn_clks, + .num_clks =3D ARRAY_SIZE(ipu_conn_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_ipu_conn[] =3D { - { .compatible =3D "mediatek,mt8183-ipu_conn", }, - {} + { + .compatible =3D "mediatek,mt8183-ipu_conn", + .data =3D &ipu_conn_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_ipu_conn_drv =3D { - .probe =3D clk_mt8183_ipu_conn_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-ipu_conn", .of_match_table =3D of_match_clk_mt8183_ipu_conn, diff --git a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c b/drivers/clk/mediate= k/clk-mt8183-mfgcfg.c index d774edaf760b..f578b393f41e 100644 --- a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c +++ b/drivers/clk/mediatek/clk-mt8183-mfgcfg.c @@ -26,28 +26,23 @@ static const struct mtk_gate mfg_clks[] =3D { GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0) }; =20 -static int clk_mt8183_mfg_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - pm_runtime_enable(&pdev->dev); - - clk_data =3D mtk_alloc_clk_data(CLK_MFG_NR_CLK); - - mtk_clk_register_gates_with_dev(node, mfg_clks, ARRAY_SIZE(mfg_clks), - clk_data, &pdev->dev); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc mfg_desc =3D { + .clks =3D mfg_clks, + .num_clks =3D ARRAY_SIZE(mfg_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_mfg[] =3D { - { .compatible =3D "mediatek,mt8183-mfgcfg", }, - {} + { + .compatible =3D "mediatek,mt8183-mfgcfg", + .data =3D &mfg_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_mfg_drv =3D { - .probe =3D clk_mt8183_mfg_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-mfg", .of_match_table =3D of_match_clk_mt8183_mfg, diff --git a/drivers/clk/mediatek/clk-mt8183-vdec.c b/drivers/clk/mediatek/= clk-mt8183-vdec.c index 0548cde159d0..c294e50b96b7 100644 --- a/drivers/clk/mediatek/clk-mt8183-vdec.c +++ b/drivers/clk/mediatek/clk-mt8183-vdec.c @@ -38,26 +38,23 @@ static const struct mtk_gate vdec_clks[] =3D { GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1", "mm_sel", 0), }; =20 -static int clk_mt8183_vdec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VDEC_NR_CLK); - - mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc vdec_desc =3D { + .clks =3D vdec_clks, + .num_clks =3D ARRAY_SIZE(vdec_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_vdec[] =3D { - { .compatible =3D "mediatek,mt8183-vdecsys", }, - {} + { + .compatible =3D "mediatek,mt8183-vdecsys", + .data =3D &vdec_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_vdec_drv =3D { - .probe =3D clk_mt8183_vdec_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-vdec", .of_match_table =3D of_match_clk_mt8183_vdec, diff --git a/drivers/clk/mediatek/clk-mt8183-venc.c b/drivers/clk/mediatek/= clk-mt8183-venc.c index f86ec607d87a..0051c5d92fc5 100644 --- a/drivers/clk/mediatek/clk-mt8183-venc.c +++ b/drivers/clk/mediatek/clk-mt8183-venc.c @@ -30,26 +30,23 @@ static const struct mtk_gate venc_clks[] =3D { "mm_sel", 8), }; =20 -static int clk_mt8183_venc_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - - clk_data =3D mtk_alloc_clk_data(CLK_VENC_NR_CLK); - - mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks), - clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} +static const struct mtk_clk_desc venc_desc =3D { + .clks =3D venc_clks, + .num_clks =3D ARRAY_SIZE(venc_clks), +}; =20 static const struct of_device_id of_match_clk_mt8183_venc[] =3D { - { .compatible =3D "mediatek,mt8183-vencsys", }, - {} + { + .compatible =3D "mediatek,mt8183-vencsys", + .data =3D &venc_desc, + }, { + /* sentinel */ + } }; =20 static struct platform_driver clk_mt8183_venc_drv =3D { - .probe =3D clk_mt8183_venc_probe, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8183-venc", .of_match_table =3D of_match_clk_mt8183_venc, --=20 2.18.0 From nobody Sat Sep 21 14:10:21 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8FC4C6FA82 for ; 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Thu, 22 Sep 2022 17:19:04 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 22 Sep 2022 17:19:04 +0800 From: Miles Chen To: Stephen Boyd , Michael Turquette , Matthias Brugger CC: , AngeloGioacchino Del Regno , Chen-Yu Tsai , Chun-Jie Chen , Miles Chen , , , Subject: [PATCH 7/7] clk: mediatek: mt8192: add mtk_clk_simple_remove Date: Thu, 22 Sep 2022 17:18:35 +0800 Message-ID: <20220922091841.4099-8-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220922091841.4099-1-miles.chen@mediatek.com> References: <20220922091841.4099-1-miles.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" mt8192 is already using mtk_clk_simple_probe, but not mtk_clk_simple_remove. Let's add mtk_clk_simple_remove for mt8192. Signed-off-by: Miles Chen Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Tested-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mt8192-cam.c | 1 + drivers/clk/mediatek/clk-mt8192-img.c | 1 + drivers/clk/mediatek/clk-mt8192-imp_iic_wrap.c | 1 + drivers/clk/mediatek/clk-mt8192-ipe.c | 1 + drivers/clk/mediatek/clk-mt8192-mdp.c | 1 + drivers/clk/mediatek/clk-mt8192-mfg.c | 1 + drivers/clk/mediatek/clk-mt8192-msdc.c | 1 + drivers/clk/mediatek/clk-mt8192-scp_adsp.c | 1 + drivers/clk/mediatek/clk-mt8192-vdec.c | 1 + drivers/clk/mediatek/clk-mt8192-venc.c | 1 + 10 files changed, 10 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt8192-cam.c b/drivers/clk/mediatek/c= lk-mt8192-cam.c index fc74cd80b4b0..90b57d46eef7 100644 --- a/drivers/clk/mediatek/clk-mt8192-cam.c +++ b/drivers/clk/mediatek/clk-mt8192-cam.c @@ -98,6 +98,7 @@ static const struct of_device_id of_match_clk_mt8192_cam[= ] =3D { =20 static struct platform_driver clk_mt8192_cam_drv =3D { .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8192-cam", .of_match_table =3D of_match_clk_mt8192_cam, diff --git a/drivers/clk/mediatek/clk-mt8192-img.c b/drivers/clk/mediatek/c= lk-mt8192-img.c index 7ce3abe42577..da82d65a7650 100644 --- a/drivers/clk/mediatek/clk-mt8192-img.c +++ b/drivers/clk/mediatek/clk-mt8192-img.c @@ -61,6 +61,7 @@ static const struct of_device_id of_match_clk_mt8192_img[= ] =3D { =20 static struct platform_driver clk_mt8192_img_drv =3D { .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8192-img", .of_match_table =3D of_match_clk_mt8192_img, diff --git a/drivers/clk/mediatek/clk-mt8192-imp_iic_wrap.c b/drivers/clk/m= ediatek/clk-mt8192-imp_iic_wrap.c index 700356ac6a58..ff8e20bb44bb 100644 --- a/drivers/clk/mediatek/clk-mt8192-imp_iic_wrap.c +++ b/drivers/clk/mediatek/clk-mt8192-imp_iic_wrap.c @@ -110,6 +110,7 @@ static const struct of_device_id of_match_clk_mt8192_im= p_iic_wrap[] =3D { =20 static struct platform_driver clk_mt8192_imp_iic_wrap_drv =3D { .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8192-imp_iic_wrap", .of_match_table =3D of_match_clk_mt8192_imp_iic_wrap, diff --git a/drivers/clk/mediatek/clk-mt8192-ipe.c b/drivers/clk/mediatek/c= lk-mt8192-ipe.c index 730d91b64b3f..0225abe4170a 100644 --- a/drivers/clk/mediatek/clk-mt8192-ipe.c +++ b/drivers/clk/mediatek/clk-mt8192-ipe.c @@ -48,6 +48,7 @@ static const struct of_device_id of_match_clk_mt8192_ipe[= ] =3D { =20 static struct platform_driver clk_mt8192_ipe_drv =3D { .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8192-ipe", .of_match_table =3D of_match_clk_mt8192_ipe, diff --git a/drivers/clk/mediatek/clk-mt8192-mdp.c b/drivers/clk/mediatek/c= lk-mt8192-mdp.c index 93c87ae2f332..4675788d7816 100644 --- a/drivers/clk/mediatek/clk-mt8192-mdp.c +++ b/drivers/clk/mediatek/clk-mt8192-mdp.c @@ -73,6 +73,7 @@ static const struct of_device_id of_match_clk_mt8192_mdp[= ] =3D { =20 static struct platform_driver clk_mt8192_mdp_drv =3D { .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8192-mdp", .of_match_table =3D of_match_clk_mt8192_mdp, diff --git a/drivers/clk/mediatek/clk-mt8192-mfg.c b/drivers/clk/mediatek/c= lk-mt8192-mfg.c index 3bbc7469f0e4..24108229793d 100644 --- a/drivers/clk/mediatek/clk-mt8192-mfg.c +++ b/drivers/clk/mediatek/clk-mt8192-mfg.c @@ -41,6 +41,7 @@ static const struct of_device_id of_match_clk_mt8192_mfg[= ] =3D { =20 static struct platform_driver clk_mt8192_mfg_drv =3D { .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8192-mfg", .of_match_table =3D of_match_clk_mt8192_mfg, diff --git a/drivers/clk/mediatek/clk-mt8192-msdc.c b/drivers/clk/mediatek/= clk-mt8192-msdc.c index 635f7a0b629a..a72e1b73fce8 100644 --- a/drivers/clk/mediatek/clk-mt8192-msdc.c +++ b/drivers/clk/mediatek/clk-mt8192-msdc.c @@ -55,6 +55,7 @@ static const struct of_device_id of_match_clk_mt8192_msdc= [] =3D { =20 static struct platform_driver clk_mt8192_msdc_drv =3D { .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8192-msdc", .of_match_table =3D of_match_clk_mt8192_msdc, diff --git a/drivers/clk/mediatek/clk-mt8192-scp_adsp.c b/drivers/clk/media= tek/clk-mt8192-scp_adsp.c index 58725d79dd13..18a8679108b8 100644 --- a/drivers/clk/mediatek/clk-mt8192-scp_adsp.c +++ b/drivers/clk/mediatek/clk-mt8192-scp_adsp.c @@ -41,6 +41,7 @@ static const struct of_device_id of_match_clk_mt8192_scp_= adsp[] =3D { =20 static struct platform_driver clk_mt8192_scp_adsp_drv =3D { .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8192-scp_adsp", .of_match_table =3D of_match_clk_mt8192_scp_adsp, diff --git a/drivers/clk/mediatek/clk-mt8192-vdec.c b/drivers/clk/mediatek/= clk-mt8192-vdec.c index b1d95cfbf22a..e149962dbbf9 100644 --- a/drivers/clk/mediatek/clk-mt8192-vdec.c +++ b/drivers/clk/mediatek/clk-mt8192-vdec.c @@ -85,6 +85,7 @@ static const struct of_device_id of_match_clk_mt8192_vdec= [] =3D { =20 static struct platform_driver clk_mt8192_vdec_drv =3D { .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8192-vdec", .of_match_table =3D of_match_clk_mt8192_vdec, diff --git a/drivers/clk/mediatek/clk-mt8192-venc.c b/drivers/clk/mediatek/= clk-mt8192-venc.c index c0d867bff09e..80b8bb170996 100644 --- a/drivers/clk/mediatek/clk-mt8192-venc.c +++ b/drivers/clk/mediatek/clk-mt8192-venc.c @@ -44,6 +44,7 @@ static const struct of_device_id of_match_clk_mt8192_venc= [] =3D { =20 static struct platform_driver clk_mt8192_venc_drv =3D { .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, .driver =3D { .name =3D "clk-mt8192-venc", .of_match_table =3D of_match_clk_mt8192_venc, --=20 2.18.0