From nobody Thu Apr 2 21:37:17 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9626AC32771 for ; Wed, 21 Sep 2022 08:18:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230108AbiIUISt (ORCPT ); Wed, 21 Sep 2022 04:18:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36408 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231274AbiIUISm (ORCPT ); Wed, 21 Sep 2022 04:18:42 -0400 Received: from smtp2.axis.com (smtp2.axis.com [195.60.68.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 40A20B9F for ; Wed, 21 Sep 2022 01:18:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=axis.com; q=dns/txt; s=axis-central1; t=1663748321; x=1695284321; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wabbL0RF4cqJkhaKeIa2nvuu2KpYvr0mfs1CAwHKPh0=; b=Z+70AptGUIo3t7evTKhYVxfWqfGJT2Q8PdlF2tJYBWwnqy6WJmg5R1bB Pfcj63mbYbpOn1Q+PnmIgtoK/GN7RltLHsFul9xPVuddCdeTg+UAQlBE1 20U9oXJxPoZzCBroo1L11JMPAJCB1XOMvX+AC/hS/kKdh8irWnVJx4Kmp QcsZbvYywx0FznTcdI7UXlmaOfmReD47jR8LLm1CmrNy+O4X+E919oahk A0DflC+5Bhr/HobaowYTBQVc5d+yjIPDltjhz0X4EEklkS8f2TXCPFTH4 OPP0SJsAbc5al8bFt3WSD7zm5S0t+03YspYVLY6faYLQMGOpAwDQwm3Qv Q==; From: Astrid Rost To: Mark Brown , Liam Girdwood , Krzysztof Kozlowski , Jaroslav Kysela , Takashi Iwai CC: , , , Astrid Rost , Astrid Rost Subject: [PATCH v4 3/3] ASoC: ts3a227e: add parameters to control debounce times Date: Wed, 21 Sep 2022 10:18:34 +0200 Message-ID: <20220921081834.22009-4-astrid.rost@axis.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220921081834.22009-1-astrid.rost@axis.com> References: <20220921081834.22009-1-astrid.rost@axis.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add devicetree parameters to control the insert, release and press debounce times. Signed-off-by: Astrid Rost --- sound/soc/codecs/ts3a227e.c | 61 +++++++++++++++++++++++++++++++++---- 1 file changed, 55 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/ts3a227e.c b/sound/soc/codecs/ts3a227e.c index d8ab0810fceb..2305a472d132 100644 --- a/sound/soc/codecs/ts3a227e.c +++ b/sound/soc/codecs/ts3a227e.c @@ -78,12 +78,20 @@ static const int ts3a227e_buttons[] =3D { #define ADC_COMPLETE_INT_DISABLE 0x04 #define INTB_DISABLE 0x08 =20 +/* TS3A227E_REG_SETTING_1 0x4 */ +#define DEBOUNCE_INSERTION_SETTING_SFT (0) +#define DEBOUNCE_INSERTION_SETTING_MASK (0x7 << DEBOUNCE_PRESS_SETTING_SFT) + /* TS3A227E_REG_SETTING_2 0x05 */ #define KP_ENABLE 0x04 =20 /* TS3A227E_REG_SETTING_3 0x06 */ -#define MICBIAS_SETTING_SFT (3) +#define MICBIAS_SETTING_SFT 3 #define MICBIAS_SETTING_MASK (0x7 << MICBIAS_SETTING_SFT) +#define DEBOUNCE_RELEASE_SETTING_SFT 2 +#define DEBOUNCE_RELEASE_SETTING_MASK (0x1 << DEBOUNCE_RELEASE_SETTING_SFT) +#define DEBOUNCE_PRESS_SETTING_SFT 0 +#define DEBOUNCE_PRESS_SETTING_MASK (0x3 << DEBOUNCE_PRESS_SETTING_SFT) =20 /* TS3A227E_REG_ACCESSORY_STATUS 0x0b */ #define TYPE_3_POLE 0x01 @@ -136,7 +144,7 @@ static bool ts3a227e_volatile_reg(struct device *dev, u= nsigned int reg) { switch (reg) { case TS3A227E_REG_INTERRUPT ... TS3A227E_REG_INTERRUPT_DISABLE: - case TS3A227E_REG_SETTING_2: + case TS3A227E_REG_SETTING_1 ... TS3A227E_REG_SETTING_2: case TS3A227E_REG_SWITCH_STATUS_1 ... TS3A227E_REG_ADC_OUTPUT: return true; default: @@ -269,14 +277,55 @@ static const struct regmap_config ts3a227e_regmap_con= fig =3D { static int ts3a227e_parse_device_property(struct ts3a227e *ts3a227e, struct device *dev) { - u32 micbias; + u32 value; + u32 value_ms; + u32 setting3_value =3D 0; + u32 setting3_mask =3D 0; int err; =20 - err =3D device_property_read_u32(dev, "ti,micbias", &micbias); + err =3D device_property_read_u32(dev, "ti,micbias", &value); + if (!err) { + setting3_mask =3D MICBIAS_SETTING_MASK; + setting3_value =3D (value << MICBIAS_SETTING_SFT) & + MICBIAS_SETTING_MASK; + } + + err =3D device_property_read_u32(dev, "ti,debounce-release-ms", + &value_ms); if (!err) { + value =3D (value_ms > 10); + setting3_mask |=3D DEBOUNCE_RELEASE_SETTING_MASK; + setting3_value |=3D (value << DEBOUNCE_RELEASE_SETTING_SFT) & + DEBOUNCE_RELEASE_SETTING_MASK; + } + + err =3D device_property_read_u32(dev, "ti,debounce-press-ms", &value_ms); + if (!err) { + value =3D (value_ms + 20) / 40; + if (value > 3) + value =3D 3; + setting3_mask |=3D DEBOUNCE_PRESS_SETTING_MASK; + setting3_value |=3D (value << DEBOUNCE_PRESS_SETTING_SFT) & + DEBOUNCE_PRESS_SETTING_MASK; + } + + if (setting3_mask) regmap_update_bits(ts3a227e->regmap, TS3A227E_REG_SETTING_3, - MICBIAS_SETTING_MASK, - (micbias & 0x07) << MICBIAS_SETTING_SFT); + setting3_mask, setting3_value); + + err =3D device_property_read_u32(dev, "ti,debounce-insertion-ms", + &value_ms); + if (!err) { + if (value_ms < 165) + value =3D (value_ms + 15) / 30; + else if (value_ms < 1500) + value =3D 6; + else + value =3D 7; + regmap_update_bits(ts3a227e->regmap, TS3A227E_REG_SETTING_1, + DEBOUNCE_INSERTION_SETTING_MASK, + (value << DEBOUNCE_INSERTION_SETTING_SFT) & + DEBOUNCE_INSERTION_SETTING_MASK); } =20 return 0; --=20 2.20.1