From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52CCAC6FA82 for ; Tue, 20 Sep 2022 23:31:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230518AbiITXbq (ORCPT ); Tue, 20 Sep 2022 19:31:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230204AbiITXbk (ORCPT ); Tue, 20 Sep 2022 19:31:40 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 943835E64C for ; Tue, 20 Sep 2022 16:31:39 -0700 (PDT) Received: by mail-yb1-xb49.google.com with SMTP id y5-20020a25bb85000000b006af8f244604so3549765ybg.7 for ; Tue, 20 Sep 2022 16:31:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=8DIJ+rv31hO3wgLmnQbReiEvjfaGVY+rgrY/lUx1yYI=; b=szI7vZsxPLW3mjv4KVmvNIJ2TlvhFBUYmY3qEAKG+k89+ES4vnvqZPEuVRfzjBfnet SWaa9GaxssZGvCEAkkNYE9ULn529nHwBIUsNDSxEm4S/nwDDr5b7ZXOsD0hddPL2Q7ru R24JVlwUSWORKK81Ddl2q51s9npDHBLDnyCpap+ryWJfPE1/+j/1M8I79kbnYMgqvYOc A53HGAr55eZFriDhvKNgKtQ9Ylq7Fs4KCQCMjM2rFGdEgRNfQlGfC5fdnRVg7iZr9K2R pY3ZpN50Zv61CiJXTvBxbGDCRQ8pqC64P8vZWdMsBo2ZxD4xqvLvkSO4Y3j5zAXs4o8p dSZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=8DIJ+rv31hO3wgLmnQbReiEvjfaGVY+rgrY/lUx1yYI=; b=me7o/WkvrVYarlxDjY8b22LPD4R+Q9tgrWN/LeO0Hzf5cyZiGQwLHAa3zei2OfThm0 1ni4kLof5AMYB71YRTU6pfzCJh421FgPviD9FOt2RlR+8eJaSZSEDog2PV36Z3HesPQM 606XJYPsRgCpnHKmccDzOWASrJX6ttWOpvNHSRoTrkz3kcPBqpUrbzioaRgF3IwnkCdc ANtTlxAhwxpMI+LW8xXb88TvOpWlssuQ64juTsk9uCZqqQyyKssxfwR0WLv4Hcn3320p dCye8oJwUrRjSavQThS1WBOnj1uDYneVRwPgXM6T7b6hWwgr7yWzOBd9Ijoan0MsMyDQ ULUQ== X-Gm-Message-State: ACrzQf1nlEx6z1l3xVVQTiR7gHjKVaQXwWVIJUXYz5FTUfC1nCaEZBy2 ZMGkUyIWqiH049PY6AK8XDs+IAjcgMs= X-Google-Smtp-Source: AMsMyM5WFLArj65i1u+S4kFIUU0v7QlqGoljtEt8cX9ZZSZiL+6Ak+MXR5R0hVT5v7hxsSL0A3dCUC2zFaw= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a81:6941:0:b0:345:4409:5842 with SMTP id e62-20020a816941000000b0034544095842mr22180892ywc.298.1663716698901; Tue, 20 Sep 2022 16:31:38 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:07 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-2-seanjc@google.com> Subject: [PATCH v3 01/28] KVM: x86: Blindly get current x2APIC reg value on "nodecode write" traps From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When emulating a x2APIC write in response to an APICv/AVIC trap, get the the written value from the vAPIC page without checking that reads are allowed for the target register. AVIC can generate trap-like VM-Exits on writes to EOI, and so KVM needs to get the written value from the backing page without running afoul of EOI's write-only behavior. Alternatively, EOI could be special cased to always write '0', e.g. so that the sanity check could be preserved, but x2APIC on AMD is actually supposed to disallow non-zero writes (not emulated by KVM), and the sanity check was a byproduct of how the KVM code was written, i.e. wasn't added to guard against anything in particular. Fixes: 70c8327c11c6 ("KVM: x86: Bug the VM if an accelerated x2APIC trap oc= curs on a "bad" reg") Fixes: 1bd9dfec9fd4 ("KVM: x86: Do not block APIC write for non ICR registe= rs") Reported-by: Alejandro Jimenez Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 9dda989a1cf0..8004c4d0a8e5 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -2284,23 +2284,18 @@ void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu,= u32 offset) struct kvm_lapic *apic =3D vcpu->arch.apic; u64 val; =20 - if (apic_x2apic_mode(apic)) { - if (KVM_BUG_ON(kvm_lapic_msr_read(apic, offset, &val), vcpu->kvm)) - return; - } else { - val =3D kvm_lapic_get_reg(apic, offset); - } - /* * ICR is a single 64-bit register when x2APIC is enabled. For legacy * xAPIC, ICR writes need to go down the common (slightly slower) path * to get the upper half from ICR2. */ if (apic_x2apic_mode(apic) && offset =3D=3D APIC_ICR) { + val =3D kvm_lapic_get_reg64(apic, APIC_ICR); kvm_apic_send_ipi(apic, (u32)val, (u32)(val >> 32)); trace_kvm_apic_write(APIC_ICR, val); } else { /* TODO: optimize to just emulate side effect w/o one more write */ + val =3D kvm_lapic_get_reg(apic, offset); kvm_lapic_reg_write(apic, offset, (u32)val); } } --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D541C6FA82 for ; Tue, 20 Sep 2022 23:31:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230525AbiITXbu (ORCPT ); Tue, 20 Sep 2022 19:31:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229805AbiITXbl (ORCPT ); Tue, 20 Sep 2022 19:31:41 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6AB95E64E for ; Tue, 20 Sep 2022 16:31:40 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id p12-20020a170902e74c00b00177f3be2825so2637175plf.17 for ; Tue, 20 Sep 2022 16:31:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=eDQhk0TUzS8gABrZyzO6jP9wbkUSKRsfywOJ1wwDdEA=; b=MhL2fiHhjRRJdJQeolFFDjGCBCjU5Icnq07HSKUApe1o+vJEuBqSCyOieoYCaP368V 7joOK0RZTSZLGcyaD9pNXyNvuYq/1pzxl59Xb8ACZHav63d3CCIcfY0ADOuMVUJrmIsq 4Tzs058ItmTmfo8vD5p3CgaMvPbgvw1qyJt0/fmggnFMBupeDoR/JX2veJojcsVtj5rP /Od0TDVGTYthl1lOC5/89a3M+2SIAdzVjiHam7KKPjYmzXkueqCBsV9CvmZ6zAqgtnZ6 DRUvUzmWC9m/f+rwMpzDQVMu2v2q4EoROrV2n2ZR166h8NZDxQZgCbV0QJgTiIpZy/sv YXyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=eDQhk0TUzS8gABrZyzO6jP9wbkUSKRsfywOJ1wwDdEA=; b=hs8V4/uRwpIkRPlY32f139BkoX3gi++wbiImnqmC+UHQT8e18xJMkKty1l58MzoEgL koyakd0K4KFibgxvWWNIKEe/bHhjw/t0xsiKkasfQzqmbf870VI/vs8RUtB86XqdZJvH aUi5sCxQXp4YiTSpF8uI66pMK8E7bTKljnA0dBjKl5sBjIUh+HO1NMgZCIuWlYrILMWa LkRC89xP2l8O1Rv6EzZDT6blPqoge9aQG4n2StNui3AquyGLphWFLPunDwpHEhxY9Unl /VU6OTk97/wjtnxC5esIoeL/5eGBNqmUVdrQ11mMmsj5gN4wowqudv2LTkdJnC5c4PpM trsQ== X-Gm-Message-State: ACrzQf0HFBkeNd5fgayN6OB1maYf+IE9rEdkDF2omF3s42lkXeKbNe4j vydOxC0R9TbREgjqZM3AMpzkU/vns0w= X-Google-Smtp-Source: AMsMyM4/ynt6lHO2zPsFgN/ZxGyjMWt9zmYzgfrZZ9jov3LaSY+FMZrs+2ef1RfVGsT9kH08iQL21YDc5bQ= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:aa7:90ce:0:b0:547:1cf9:40e6 with SMTP id k14-20020aa790ce000000b005471cf940e6mr26018655pfk.11.1663716700319; Tue, 20 Sep 2022 16:31:40 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:08 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-3-seanjc@google.com> Subject: [PATCH v3 02/28] KVM: x86: Purge "highest ISR" cache when updating APICv state From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Purge the "highest ISR" cache when updating APICv state on a vCPU. The cache must not be used when APICv is active as hardware may emulate EOIs (and other operations) without exiting to KVM. This fixes a bug where KVM will effectively block IRQs in perpetuity due to the "highest ISR" never getting reset if APICv is activated on a vCPU while an IRQ is in-service. Hardware emulates the EOI and KVM never gets a chance to update its cache. Fixes: b26a695a1d78 ("kvm: lapic: Introduce APICv update helper function") Cc: stable@vger.kernel.org Cc: Suravee Suthikulpanit Cc: Maxim Levitsky Reviewed-by: Paolo Bonzini Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 8004c4d0a8e5..adac6ca9b7dc 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -2424,6 +2424,7 @@ void kvm_apic_update_apicv(struct kvm_vcpu *vcpu) */ apic->isr_count =3D count_vectors(apic->regs + APIC_ISR); } + apic->highest_isr_cache =3D -1; } EXPORT_SYMBOL_GPL(kvm_apic_update_apicv); =20 @@ -2480,7 +2481,6 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init= _event) kvm_lapic_set_reg(apic, APIC_TMR + 0x10 * i, 0); } kvm_apic_update_apicv(vcpu); - apic->highest_isr_cache =3D -1; update_divide_count(apic); atomic_set(&apic->lapic_timer.pending, 0); =20 @@ -2767,7 +2767,6 @@ int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct = kvm_lapic_state *s) __start_apic_timer(apic, APIC_TMCCT); kvm_lapic_set_reg(apic, APIC_TMCCT, 0); kvm_apic_update_apicv(vcpu); - apic->highest_isr_cache =3D -1; if (apic->apicv_active) { static_call_cond(kvm_x86_apicv_post_state_restore)(vcpu); static_call_cond(kvm_x86_hwapic_irr_update)(vcpu, apic_find_highest_irr(= apic)); --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46519C54EE9 for ; Tue, 20 Sep 2022 23:31:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230499AbiITXby (ORCPT ); Tue, 20 Sep 2022 19:31:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229918AbiITXbn (ORCPT ); Tue, 20 Sep 2022 19:31:43 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81B9B4D81C for ; Tue, 20 Sep 2022 16:31:42 -0700 (PDT) Received: by mail-yb1-xb49.google.com with SMTP id u12-20020a25094c000000b006a9ad6b2cebso3574231ybm.15 for ; Tue, 20 Sep 2022 16:31:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=cKrarRLCPOriYh8K3EwdraluERzXEnSSkHf6Vm0rWT0=; b=QfPIhY6YATNGT6/Gkfj99ZOAN9crVibvS7p2KCIWrzeB74iujsBXQ+92wZOnJqYt9r nxDCic0zqRIREdw3csjzh2I4EKmQeHiInBi3QDfiJocTas1o65dmFFxNsA7d8C570+Qp w26NLkf2Y/TXjtJHoMLAcWUv40jHJ+vyqrhhjSrdvZHYIiiyk0Nfcbs+O54RrYc+fu1r vixNhoPYUD2HqxVjC3WRJYH9vbf4EdFv56PIo5ofZxAXCVVK8+dKDQ1fHjRyp0YGAiny FfHfm5dgBUYLFUx6WNiGrXq/Ttaj+t+jPuFdNZH5LBPWxaCPXsKfaa9uZZHfA+7/txOF Gu0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=cKrarRLCPOriYh8K3EwdraluERzXEnSSkHf6Vm0rWT0=; b=DgABn1A4tfeL5Y+HuXThvG1uHwGKp8mHN+looa1ISoNbNEHpOYYpA9RbenDkpbKlV3 yCBEqgwCaD4oyKM/emjZkwiCqf7SV5SUVYtUF3Tx5RP86EzUSIqvPjm1AtqtwW+bOpJB C0d2draF7qL+4fojY+kg4WxcDqlToKXQGl8W+3+ZyvcHdb0QraIHCLW8PFOtcHfuTw3g 75UEOz3cHGTPOCUw3lJwcpgbafBc1ZkHuQp0w0zZx4YFRmxjsgT9e3x4rT2kZkYtq24X 6FGhpie9kBHrxxKfgcUwSoUkI5XmV/8Fng3w6tY5q6F3koXZuk9XsPO+okoVM04v5/Pz G2/A== X-Gm-Message-State: ACrzQf28NDYLCv3TmXf3oybdFPuYY7WaOsWKH4H6kmg+NrRCtEyNucmI y0lrus710fMS3X7YMPGLN5Tt4QyMuIc= X-Google-Smtp-Source: AMsMyM4lF7eT4ProyP6MEtPOd0+qAlV4syB88TVqe+KsYwqoK9iRPWWcNAsbmWhIveqZNqTx9BfsIZn6HVY= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a0d:de47:0:b0:349:c266:e6ac with SMTP id h68-20020a0dde47000000b00349c266e6acmr22048115ywe.233.1663716701829; Tue, 20 Sep 2022 16:31:41 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:09 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-4-seanjc@google.com> Subject: [PATCH v3 03/28] KVM: SVM: Flush the "current" TLB when activating AVIC From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Flush the TLB when activating AVIC as the CPU can insert into the TLB while AVIC is "locally" disabled. KVM doesn't treat "APIC hardware disabled" as VM-wide AVIC inhibition, and so when a vCPU has its APIC hardware disabled, AVIC is not guaranteed to be inhibited. As a result, KVM may create a valid NPT mapping for the APIC base, which the CPU can cache as a non-AVIC translation. Note, Intel handles this in vmx_set_virtual_apic_mode(). Reviewed-by: Paolo Bonzini Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 6919dee69f18..712330b80891 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -86,6 +86,12 @@ static void avic_activate_vmcb(struct vcpu_svm *svm) /* Disabling MSR intercept for x2APIC registers */ svm_set_x2apic_msr_interception(svm, false); } else { + /* + * Flush the TLB, the guest may have inserted a non-APIC + * mapping into the TLB while AVIC was disabled. + */ + kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, &svm->vcpu); + /* For xAVIC and hybrid-xAVIC modes */ vmcb->control.avic_physical_id |=3D AVIC_MAX_PHYSICAL_ID; /* Enabling MSR intercept for x2APIC registers */ --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4DD4C6FA82 for ; Tue, 20 Sep 2022 23:32:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231178AbiITXcB (ORCPT ); Tue, 20 Sep 2022 19:32:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230506AbiITXbp (ORCPT ); Tue, 20 Sep 2022 19:31:45 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 40BCA6E2F5 for ; Tue, 20 Sep 2022 16:31:44 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-348608c1cd3so37236997b3.10 for ; Tue, 20 Sep 2022 16:31:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=ii5+t2J1kdVlIL2oCH8a9ZWauh1L3o8t5CyE0vSQ86k=; b=X6jyBR8gbiSDrjF7c2UmvI5Mtcb5y5B97vdgUoLZpQ5be0M3KnBrz2gC5R1m9HqyVu AaakNuinnj1/DuqFzzRKVqPAT0CXticUWJuipURkSnLSvd7p/HCiL8i/xZ1/yxG/Ny1Q kdqDlguKfpCOEkWrBNNhQapSe85/q53mMoTVEaggmp6Rw2O8jVKdAdoY4enM0SH/te7o VbhZ9WsfoE5HcHUWGeqdhV0bIU1loNWRsEbSWfd22WzuUSnkyjqSZgL0oyXdPak3JcdM TNNUesUfySYM9im5kaC4LdY5UcYoc6HFHB1PcxOzGJGfa29ORiHeoDDYrc3R15dWzOp3 ITlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=ii5+t2J1kdVlIL2oCH8a9ZWauh1L3o8t5CyE0vSQ86k=; b=f7OhDeYE7TArCjTvYZJHtoa1qfgG/r5OhPmbgs39T/DB97XHiV8W0315vW3pykkQIf q/o42cBDDQGRdOZH9zW3Mnu4RgFgldOgbtDU0tQwEfzfWaS9STPah2jUAa+mbjt4Bf72 JeD1GxkUOEaeW88Q94sWR0d85AmcV8ABUWRjhp2DbpntCB6NaWyh0DZCZHgE1QUDW0tR iUopiw6kNHDyBtJwjAwvqmmNAnEnajvVHScnz5NNwuSZc6spq+ed0rHgQ+JNwo1PxhZe LJU1G0ajaEC5zpi0D3p2405gaYkgTTqmUqG8jS8RgU4buAmSfTMdPCjIUUr+qNGzALUs c5eQ== X-Gm-Message-State: ACrzQf2d+J7GUJxKBv/+rVGA7OB5ZdlwyG4/mUqmJhlmiVyL1Afg9qA2 cYf9JXw5OeTGkihYRqBt/D2vu6ld2As= X-Google-Smtp-Source: AMsMyM5aqFW6j2Vta21H0hUIHt8J/uBmwFMbLr8ZsZ6TK90bt9AX+Kc6P+Mp8Hrzi9XZH20nMTE5Qr8OoSE= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a5b:c4b:0:b0:6ae:ca4a:59e5 with SMTP id d11-20020a5b0c4b000000b006aeca4a59e5mr21501052ybr.246.1663716703528; Tue, 20 Sep 2022 16:31:43 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:10 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-5-seanjc@google.com> Subject: [PATCH v3 04/28] KVM: SVM: Process ICR on AVIC IPI delivery failure due to invalid target From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Emulate ICR writes on AVIC IPI failures due to invalid targets using the same logic as failures due to invalid types. AVIC acceleration fails if _any_ of the targets are invalid, and crucially VM-Exits before sending IPIs to targets that _are_ valid. In logical mode, the destination is a bitmap, i.e. a single IPI can target multiple logical IDs. Doing nothing causes KVM to drop IPIs if at least one target is valid and at least one target is invalid. Fixes: 18f40c53e10f ("svm: Add VMEXIT handlers for AVIC") Cc: stable@vger.kernel.org Reviewed-by: Paolo Bonzini Reviewed-by: Maxim Levitsky Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 712330b80891..3b2c88b168ba 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -502,14 +502,18 @@ int avic_incomplete_ipi_interception(struct kvm_vcpu = *vcpu) trace_kvm_avic_incomplete_ipi(vcpu->vcpu_id, icrh, icrl, id, index); =20 switch (id) { + case AVIC_IPI_FAILURE_INVALID_TARGET: case AVIC_IPI_FAILURE_INVALID_INT_TYPE: /* * Emulate IPIs that are not handled by AVIC hardware, which - * only virtualizes Fixed, Edge-Triggered INTRs. The exit is - * a trap, e.g. ICR holds the correct value and RIP has been - * advanced, KVM is responsible only for emulating the IPI. - * Sadly, hardware may sometimes leave the BUSY flag set, in - * which case KVM needs to emulate the ICR write as well in + * only virtualizes Fixed, Edge-Triggered INTRs, and falls over + * if _any_ targets are invalid, e.g. if the logical mode mask + * is a superset of running vCPUs. + * + * The exit is a trap, e.g. ICR holds the correct value and RIP + * has been advanced, KVM is responsible only for emulating the + * IPI. Sadly, hardware may sometimes leave the BUSY flag set, + * in which case KVM needs to emulate the ICR write as well in * order to clear the BUSY flag. */ if (icrl & APIC_ICR_BUSY) @@ -525,8 +529,6 @@ int avic_incomplete_ipi_interception(struct kvm_vcpu *v= cpu) */ avic_kick_target_vcpus(vcpu->kvm, apic, icrl, icrh, index); break; - case AVIC_IPI_FAILURE_INVALID_TARGET: - break; case AVIC_IPI_FAILURE_INVALID_BACKING_PAGE: WARN_ONCE(1, "Invalid backing page\n"); break; --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7E61C6FA82 for ; Tue, 20 Sep 2022 23:32:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231209AbiITXcH (ORCPT ); Tue, 20 Sep 2022 19:32:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44860 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231139AbiITXbz (ORCPT ); Tue, 20 Sep 2022 19:31:55 -0400 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95B927285C for ; Tue, 20 Sep 2022 16:31:45 -0700 (PDT) Received: by mail-pf1-x449.google.com with SMTP id u131-20020a627989000000b0054d3cf50780so2488355pfc.22 for ; Tue, 20 Sep 2022 16:31:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=dYLN9GBGgw9bb1ictRproowJt/YAf1zd5j5g6hcPFfg=; b=kNqSYhb/HAnrt536HOs7xUAP4Z2+7GGcDgLkQVMvZqfyl5tPjooDHiqOcT+hrnFN6E NV+klM1GvU8zWTdvsAQPfxnB+k72U8P3S9vAPn593sWkyBbLZDqrAJIah2qCIk8MQA5B BkKg+IbnGJ+iA+FRSstmyq2M2O3FKSbjt55t+bsFKCJDFGDdZ6gqnjh258gvh4GES1iP LL3NjesyU1IelEuHxXvC3J5TdXwm/79ao2Z4a9goLw5SEceUmR3aJDsQovaB6mP6Y36u GRPh+4hn6t9TEiGYM0/7cWKn7NzoNbjVzISOiJQvdJxAM7rW7tvReOt6UJMUrZCm0rmT tKSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=dYLN9GBGgw9bb1ictRproowJt/YAf1zd5j5g6hcPFfg=; b=wIzwfA+kpsiDRT+RUV+3qPzK2isqtK4DJ+M378GUdLRtWT+vFulK9SF+op7S0/zTA0 MIU22zWjT38EJwMUjjTMMtW2S9ETdmJVrGTGTs+vnb8uY7k0YfacBR6vc5PjtWR2a2ab zfZjA8kO1CaIxGDyD7joEgX5I5eHEtKf9MEA0H5Oyi3SejUbYM1PJE//iPW+VuYQlwhW 34Stg56kKCVc0sqwr4TH0w7FgPks9NYq9LwcU/7Y4kvTR7lZTpFu8RkglbeRRPHiyY6F A1y80VW7+Tibr8vYeTkKh618nut3Hhzw7i3M+XqISFid13V+v71cc34p+8NG1RauQeWS Eo5A== X-Gm-Message-State: ACrzQf25kO861UJMHmjeZ6fhy7lwKhEF6KIwzXyX9sh1QM59DAisnoOX h6JJEvw7DX8L7E/N14elq/x4wNr2nMI= X-Google-Smtp-Source: AMsMyM68+xmkQUernGEuZHH60GWob96nzK2+b7JDn2jZj9scVDx7yQG4DjR+nvfV9+T5ZlLt3sFaV2nltFg= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90a:a407:b0:202:e6eb:4b7c with SMTP id y7-20020a17090aa40700b00202e6eb4b7cmr6297652pjp.15.1663716705161; Tue, 20 Sep 2022 16:31:45 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:11 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-6-seanjc@google.com> Subject: [PATCH v3 05/28] KVM: x86: Don't inhibit APICv/AVIC if xAPIC ID mismatch is due to 32-bit ID From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Truncate the vcpu_id, a.k.a. x2APIC ID, to an 8-bit value when comparing it against the xAPIC ID to avoid false positives (sort of) on systems with >255 CPUs, i.e. with IDs that don't fit into a u8. The intent of APIC_ID_MODIFIED is to inhibit APICv/AVIC when the xAPIC is changed from it's original value, The mismatch isn't technically a false positive, as architecturally the xAPIC IDs do end up being aliased in this scenario, and neither APICv nor AVIC correctly handles IPI virtualization when there is aliasing. However, KVM already deliberately does not honor the aliasing behavior that results when an x2APIC ID gets truncated to an xAPIC ID. I.e. the resulting APICv/AVIC behavior is aligned with KVM's existing behavior when KVM's x2APIC hotplug hack is effectively enabled. If/when KVM provides a way to disable the hotplug hack, APICv/AVIC can piggyback whatever logic disables the optimized APIC map (which is what provides the hotplug hack), i.e. so that KVM's optimized map and APIC virtualization yield the same behavior. For now, fix the immediate problem of APIC virtualization being disabled for large VMs, which is a much more pressing issue than ensuring KVM honors architectural behavior for APIC ID aliasing. Fixes: 3743c2f02517 ("KVM: x86: inhibit APICv/AVIC on changes to APIC ID or= APIC base") Reported-by: Suravee Suthikulpanit Cc: Maxim Levitsky Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index adac6ca9b7dc..a02defa3f7b5 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -2075,7 +2075,12 @@ static void kvm_lapic_xapic_id_updated(struct kvm_la= pic *apic) if (KVM_BUG_ON(apic_x2apic_mode(apic), kvm)) return; =20 - if (kvm_xapic_id(apic) =3D=3D apic->vcpu->vcpu_id) + /* + * Deliberately truncate the vCPU ID when detecting a modified APIC ID + * to avoid false positives if the vCPU ID, i.e. x2APIC ID, is a 32-bit + * value. + */ + if (kvm_xapic_id(apic) =3D=3D (u8)apic->vcpu->vcpu_id) return; =20 kvm_set_apicv_inhibit(apic->vcpu->kvm, APICV_INHIBIT_REASON_APIC_ID_MODIF= IED); --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B46FEC54EE9 for ; Tue, 20 Sep 2022 23:32:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231298AbiITXcL (ORCPT ); Tue, 20 Sep 2022 19:32:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231158AbiITXb5 (ORCPT ); Tue, 20 Sep 2022 19:31:57 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D134B785AE for ; Tue, 20 Sep 2022 16:31:49 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id j3-20020a170902da8300b001782a6fbc87so2613060plx.5 for ; Tue, 20 Sep 2022 16:31:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=Kmkqo8W6GEB/9Ej5pR2iGXpBCCrUFtWow+gW+3A4WGM=; b=jlBDemICDWcRC4bNuLagL5EeQYJbqTC+cVge16/mzolq+Nu8oE2n/ZaebmDTseeeI0 47guimRf1vs/qEcvZRD99qKTYtaQ5D4ANQ/nnKBhXPcIXtg5zmU3p8hARLuMhAUEEpqV 4qAyenaqAF2PpLwpUW0PR51xUWl33iiffFHZYi/K2aWbiHwoC98MP5lsJ10rkyoBTq5o 2W/RXxxnD91vDxJaQQrR20VeXbxnNT4tSNdU/p4jKP/RRGIxr+SOWRGzMrQDi6qEaF8v ezt8XlfD6olcafjbmTAjDtSlIVsIMOJhZw8Hf5JBXYuPUf20J/UV8yn+HDM5IGFAA8Kn Blxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=Kmkqo8W6GEB/9Ej5pR2iGXpBCCrUFtWow+gW+3A4WGM=; b=RMSKhhZoNqM8KfwIGYdl0toBo4vfql4sGvu9ZvZAeCq21yMvb7gGWJFZPtml6JfFyc QbjTd2TkDlSiSaEo2JQ9zeFTw9RoCxi3uFMHC5wMtnlubcvtLNvLXTZ7pov+Io9iBJir KcMMK+kzHYmviDm2aJL9LPAjJpCkGcIL5CZnZ7lBkID4ivVgha2YDdMlb9db7t4DkMMz RFZpTviyGDvpg310WPRbOcjO8f6xdhUXft6chn1bE2cTFOp3J5WUSozEmk1hYTjm4d31 CL9xJtEtENhNYBHq+dl7JyArH2ME+x2kJx6ZV4hYLTo88wh5K5kDvQIrOP2IHQJD4kBe tXKA== X-Gm-Message-State: ACrzQf0gd7ZDGLe697lkDTxQtb7Lc535pmQGZPGUfPVgpT27ZmD0CNy2 sRYIandz0HlCN2yDQbXpiBIoklhtIMo= X-Google-Smtp-Source: AMsMyM7zQaWg9XVmM3OjbFCQJcICwP8w12Tk/Gla3LUSE5B4/TcfGAPAslcnJX1fDxYVwl3WDW/YfRfqQg8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90b:10a:b0:200:2849:235f with SMTP id p10-20020a17090b010a00b002002849235fmr524110pjz.1.1663716706972; Tue, 20 Sep 2022 16:31:46 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:12 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-7-seanjc@google.com> Subject: [PATCH v3 06/28] KVM: x86: Move APIC access page helper to common x86 code From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move the APIC access page allocation helper function to common x86 code, the allocation routine is virtually identical between APICv (VMX) and AVIC (SVM). Keep APICv's gfn_to_page() + put_page() sequence, which verifies that a backing page can be allocated, i.e. that the system isn't under heavy memory pressure. Forcing the backing page to be populated isn't strictly necessary, but skipping the effective prefetch only delays the inevitable. Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 35 +++++++++++++++++++++++++++++++++++ arch/x86/kvm/lapic.h | 1 + arch/x86/kvm/svm/avic.c | 41 +++++++---------------------------------- arch/x86/kvm/vmx/vmx.c | 35 +---------------------------------- 4 files changed, 44 insertions(+), 68 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index a02defa3f7b5..99994d2470a2 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -2433,6 +2433,41 @@ void kvm_apic_update_apicv(struct kvm_vcpu *vcpu) } EXPORT_SYMBOL_GPL(kvm_apic_update_apicv); =20 +int kvm_alloc_apic_access_page(struct kvm *kvm) +{ + struct page *page; + void __user *hva; + int ret =3D 0; + + mutex_lock(&kvm->slots_lock); + if (kvm->arch.apic_access_memslot_enabled) + goto out; + + hva =3D __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, + APIC_DEFAULT_PHYS_BASE, PAGE_SIZE); + if (IS_ERR(hva)) { + ret =3D PTR_ERR(hva); + goto out; + } + + page =3D gfn_to_page(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT); + if (is_error_page(page)) { + ret =3D -EFAULT; + goto out; + } + + /* + * Do not pin the page in memory, so that memory hot-unplug + * is able to migrate it. + */ + put_page(page); + kvm->arch.apic_access_memslot_enabled =3D true; +out: + mutex_unlock(&kvm->slots_lock); + return ret; +} +EXPORT_SYMBOL_GPL(kvm_alloc_apic_access_page); + void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) { struct kvm_lapic *apic =3D vcpu->arch.apic; diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h index 117a46df5cc1..6d06397683d0 100644 --- a/arch/x86/kvm/lapic.h +++ b/arch/x86/kvm/lapic.h @@ -111,6 +111,7 @@ int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_= lapic_irq *irq, struct dest_map *dest_map); int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type); void kvm_apic_update_apicv(struct kvm_vcpu *vcpu); +int kvm_alloc_apic_access_page(struct kvm *kvm); =20 bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src, struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map); diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 3b2c88b168ba..0424a5e664bb 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -256,39 +256,6 @@ static u64 *avic_get_physical_id_entry(struct kvm_vcpu= *vcpu, return &avic_physical_id_table[index]; } =20 -/* - * Note: - * AVIC hardware walks the nested page table to check permissions, - * but does not use the SPA address specified in the leaf page - * table entry since it uses address in the AVIC_BACKING_PAGE pointer - * field of the VMCB. Therefore, we set up the - * APIC_ACCESS_PAGE_PRIVATE_MEMSLOT (4KB) here. - */ -static int avic_alloc_access_page(struct kvm *kvm) -{ - void __user *ret; - int r =3D 0; - - mutex_lock(&kvm->slots_lock); - - if (kvm->arch.apic_access_memslot_enabled) - goto out; - - ret =3D __x86_set_memory_region(kvm, - APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, - APIC_DEFAULT_PHYS_BASE, - PAGE_SIZE); - if (IS_ERR(ret)) { - r =3D PTR_ERR(ret); - goto out; - } - - kvm->arch.apic_access_memslot_enabled =3D true; -out: - mutex_unlock(&kvm->slots_lock); - return r; -} - static int avic_init_backing_page(struct kvm_vcpu *vcpu) { u64 *entry, new_entry; @@ -305,7 +272,13 @@ static int avic_init_backing_page(struct kvm_vcpu *vcp= u) if (kvm_apicv_activated(vcpu->kvm)) { int ret; =20 - ret =3D avic_alloc_access_page(vcpu->kvm); + /* + * Note, AVIC hardware walks the nested page table to check + * permissions, but does not use the SPA address specified in + * the leaf SPTE since it uses address in the AVIC_BACKING_PAGE + * pointer field of the VMCB. + */ + ret =3D kvm_alloc_apic_access_page(vcpu->kvm); if (ret) return ret; } diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index c9b49a09e6b5..b39095ef9bd7 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -3818,39 +3818,6 @@ static void seg_setup(int seg) vmcs_write32(sf->ar_bytes, ar); } =20 -static int alloc_apic_access_page(struct kvm *kvm) -{ - struct page *page; - void __user *hva; - int ret =3D 0; - - mutex_lock(&kvm->slots_lock); - if (kvm->arch.apic_access_memslot_enabled) - goto out; - hva =3D __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, - APIC_DEFAULT_PHYS_BASE, PAGE_SIZE); - if (IS_ERR(hva)) { - ret =3D PTR_ERR(hva); - goto out; - } - - page =3D gfn_to_page(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT); - if (is_error_page(page)) { - ret =3D -EFAULT; - goto out; - } - - /* - * Do not pin the page in memory, so that memory hot-unplug - * is able to migrate it. - */ - put_page(page); - kvm->arch.apic_access_memslot_enabled =3D true; -out: - mutex_unlock(&kvm->slots_lock); - return ret; -} - int allocate_vpid(void) { int vpid; @@ -7356,7 +7323,7 @@ static int vmx_vcpu_create(struct kvm_vcpu *vcpu) vmx->loaded_vmcs =3D &vmx->vmcs01; =20 if (cpu_need_virtualize_apic_accesses(vcpu)) { - err =3D alloc_apic_access_page(vcpu->kvm); + err =3D kvm_alloc_apic_access_page(vcpu->kvm); if (err) goto free_vmcs; } --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2F3FC6FA82 for ; Tue, 20 Sep 2022 23:32:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231320AbiITXcP (ORCPT ); Tue, 20 Sep 2022 19:32:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45078 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230506AbiITXcD (ORCPT ); Tue, 20 Sep 2022 19:32:03 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 243AB785B4 for ; Tue, 20 Sep 2022 16:31:50 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-34577a9799dso36654637b3.6 for ; Tue, 20 Sep 2022 16:31:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=wOK1dV4BxutQZkI1CAEnMvxBp2rHNValag/vPnSM224=; b=oywBzOfXG4T/q5tSWB026gI+PUcT8WGunFspJ0GfPCZ37ekwojWgGKj3t8cANpK6M2 Irpozhmk7IebqY6T7jS0d2SZ+cihG6P/YZK0DqnNthQM1bL2PRTfApG+MvAuh/5fDrjC zhZ7kI+5a+SIO6585LLfNOgQOOSoe4C9agdyFvoQ0fQiK6hH1sKLrld0vTA3DBKoNcux tIM7mnbuaRZsqs/kPUPVvV9CCwZrlMtf+DVqN08YlzkwYvx9Y3R2E+6P36LGYu02tlLc KDalgOglp/hZ1fWS8Kg4tKVLK6cTcBjXJ3PD0qv91B5BF/klbmHg7koP4tf6Nq6VUj1G ic1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=wOK1dV4BxutQZkI1CAEnMvxBp2rHNValag/vPnSM224=; b=dzDRJ0I0coWD9BqADhVpzWlbRrx2dQWNa3OgTqhZi0OGYlLzjhlfoG0db6WqhWlXDv sVtTSjsoOkP67eP1oYbH9eLgHcOHgXVxUr4HI9XKEsnoT6IRNkrcV3p5v5YFpN8NDVeh 3NuM9iejkzkNLfJahCmbDfEx9ephDTeA55NV/eFgr4PvA/E+tn7nmiWuuNw0LrzjmuQT i6DToAXDoJ1QL8md6XXlxdsVqaPn80waDChwyNRZ2yaCpFwbT/kVL1GNU8lOIUtbCvpv TQ0zS36zyMw5CqUZKBQ7wQDlWbiikG2FJX6Y6dRtLZgCqGawpiKkRwpSel04/eavAZ3D D2eQ== X-Gm-Message-State: ACrzQf1vH6hnnST2e/MxHEz3CD9yK/8dJj28N8SROzCqkfomDEiUGv3J TdWRbj75I++IAO3Mu0tCexRTDo6s4Nw= X-Google-Smtp-Source: AMsMyM7pQ9k+3HOSGUAj7YGWwY4pwBtf/NqzJ+ZJR2MI+jHpu6MKWobBy75VSgV3AjqkwLDXln0MtXBJU0c= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:ef4f:0:b0:6ae:f5ce:91e8 with SMTP id w15-20020a25ef4f000000b006aef5ce91e8mr21952346ybm.280.1663716709400; Tue, 20 Sep 2022 16:31:49 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:13 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-8-seanjc@google.com> Subject: [PATCH v3 07/28] KVM: x86: Inhibit APIC memslot if x2APIC and AVIC are enabled From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Free the APIC access page memslot if any vCPU enables x2APIC and SVM's AVIC is enabled to prevent accesses to the virtual APIC on vCPUs with x2APIC enabled. On AMD, due to its "hybrid" mode where AVIC is enabled when x2APIC is enabled even without x2AVIC support, keeping the APIC access page memslot results in the guest being able to access the virtual APIC page as x2APIC is fully emulated by KVM. I.e. hardware isn't aware that the guest is operating in x2APIC mode. Intel doesn't suffer from the same issue as APICv has fully independent VMCS controls for xAPIC vs. x2APIC virtualization. Technically, KVM should provide bus error semantics and not memory semantics for the APIC page when x2APIC is enabled, but KVM already provides memory semantics in other scenarios, e.g. if APICv/AVIC is enabled and the APIC is hardware disabled (via APIC_BASE MSR). Reserve an inhibit bit so that common code can detect whether or not the "x2APIC inhibit" applies, but use a dedicated flag to track the inhibit so that it doesn't need to be stripped from apicv_inhibit_reasons (since it's not a "full" inhibit). Note, setting apic_access_memslot_inhibited without taking locks relies on it being sticky, and also relies on apic_access_memslot_enabled being set during vCPU creation (before kvm_vcpu_reset()). vCPUs can race to set the inhibit and delete the memslot, i.e. can get false positives, but can't false negatives as apic_access_memslot_enabled can't be toggle "on" once any vCPU reaches kvm_lapic_set_base(). Opportunistically drop the "can" while updating avic_activate_vmcb()'s comment, i.e. to state that KVM _does_ support the hybrid mode. Move the "Note:" down a line to conform to preferred kernel/KVM multi-line comment style. Opportunistically update the apicv_update_lock comment, as it isn't actually used to protect apic_access_memslot_enabled (it's protected by slots_lock). Fixes: 0e311d33bfbe ("KVM: SVM: Introduce hybrid-AVIC mode") Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_host.h | 18 ++++++++++++++--- arch/x86/kvm/lapic.c | 34 +++++++++++++++++++++++++++++++-- arch/x86/kvm/lapic.h | 1 + arch/x86/kvm/svm/avic.c | 15 ++++++++------- arch/x86/kvm/x86.c | 7 +++++++ 5 files changed, 63 insertions(+), 12 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 2c96c43c313a..6475c882b359 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1132,6 +1132,17 @@ enum kvm_apicv_inhibit { * AVIC is disabled because SEV doesn't support it. */ APICV_INHIBIT_REASON_SEV, + + /* + * Due to sharing page tables across vCPUs, the xAPIC memslot must be + * deleted if any vCPU has x2APIC enabled as SVM doesn't provide fully + * independent controls for AVIC vs. x2AVIC, and also because SVM + * supports a "hybrid" AVIC mode for CPUs that support AVIC but not + * x2AVIC. Note, this isn't a "full" inhibit and is tracked separately. + * AVIC can still be activated, but KVM must not create SPTEs for the + * APIC base. For simplicity, this is sticky. + */ + APICV_INHIBIT_REASON_X2APIC, }; =20 struct kvm_arch { @@ -1169,10 +1180,11 @@ struct kvm_arch { struct kvm_apic_map __rcu *apic_map; atomic_t apic_map_dirty; =20 - /* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */ - struct rw_semaphore apicv_update_lock; - bool apic_access_memslot_enabled; + bool apic_access_memslot_inhibited; + + /* Protects apicv_inhibit_reasons */ + struct rw_semaphore apicv_update_lock; unsigned long apicv_inhibit_reasons; =20 gpa_t wall_clock; diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 99994d2470a2..70f00eda75b2 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -2394,9 +2394,26 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 v= alue) } } =20 - if (((old_value ^ value) & X2APIC_ENABLE) && (value & X2APIC_ENABLE)) + if (((old_value ^ value) & X2APIC_ENABLE) && (value & X2APIC_ENABLE)) { kvm_apic_set_x2apic_id(apic, vcpu->vcpu_id); =20 + /* + * Mark the APIC memslot as inhibited if x2APIC is enabled and + * the x2APIC inhibit is required. The actual deletion of the + * memslot is handled by vcpu_run() as SRCU may or may not be + * held at this time, i.e. updating memslots isn't safe. Don't + * check apic_access_memslot_inhibited, this vCPU needs to + * ensure the memslot is deleted before re-entering the guest, + * i.e. needs to make the request even if the inhibit flag was + * already set by a different vCPU. + */ + if (vcpu->kvm->arch.apic_access_memslot_enabled && + static_call(kvm_x86_check_apicv_inhibit_reasons)(APICV_INHIBIT_REASO= N_X2APIC)) { + vcpu->kvm->arch.apic_access_memslot_inhibited =3D true; + kvm_make_request(KVM_REQ_UNBLOCK, vcpu); + } + } + if ((old_value ^ value) & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) { kvm_vcpu_update_apicv(vcpu); static_call_cond(kvm_x86_set_virtual_apic_mode)(vcpu); @@ -2440,7 +2457,8 @@ int kvm_alloc_apic_access_page(struct kvm *kvm) int ret =3D 0; =20 mutex_lock(&kvm->slots_lock); - if (kvm->arch.apic_access_memslot_enabled) + if (kvm->arch.apic_access_memslot_enabled || + kvm->arch.apic_access_memslot_inhibited) goto out; =20 hva =3D __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, @@ -2468,6 +2486,18 @@ int kvm_alloc_apic_access_page(struct kvm *kvm) } EXPORT_SYMBOL_GPL(kvm_alloc_apic_access_page); =20 +void kvm_free_apic_access_page(struct kvm *kvm) +{ + mutex_lock(&kvm->slots_lock); + + if (kvm->arch.apic_access_memslot_enabled) { + __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0); + kvm->arch.apic_access_memslot_enabled =3D false; + } + + mutex_unlock(&kvm->slots_lock); +} + void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) { struct kvm_lapic *apic =3D vcpu->arch.apic; diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h index 6d06397683d0..e2271ffa7ac0 100644 --- a/arch/x86/kvm/lapic.h +++ b/arch/x86/kvm/lapic.h @@ -112,6 +112,7 @@ int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_= lapic_irq *irq, int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type); void kvm_apic_update_apicv(struct kvm_vcpu *vcpu); int kvm_alloc_apic_access_page(struct kvm *kvm); +void kvm_free_apic_access_page(struct kvm *kvm); =20 bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src, struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map); diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 0424a5e664bb..8f9426f21bbf 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -72,12 +72,12 @@ static void avic_activate_vmcb(struct vcpu_svm *svm) =20 vmcb->control.int_ctl |=3D AVIC_ENABLE_MASK; =20 - /* Note: - * KVM can support hybrid-AVIC mode, where KVM emulates x2APIC - * MSR accesses, while interrupt injection to a running vCPU - * can be achieved using AVIC doorbell. The AVIC hardware still - * accelerate MMIO accesses, but this does not cause any harm - * as the guest is not supposed to access xAPIC mmio when uses x2APIC. + /* + * Note: KVM supports hybrid-AVIC mode, where KVM emulates x2APIC MSR + * accesses, while interrupt injection to a running vCPU can be + * achieved using AVIC doorbell. KVM disables the APIC access page + * (deletes the memslot) if any vCPU has x2APIC enabled, thus enabling + * AVIC in hybrid mode activates only the doorbell mechanism. */ if (apic_x2apic_mode(svm->vcpu.arch.apic) && avic_mode =3D=3D AVIC_MODE_X2) { @@ -987,7 +987,8 @@ bool avic_check_apicv_inhibit_reasons(enum kvm_apicv_in= hibit reason) BIT(APICV_INHIBIT_REASON_BLOCKIRQ) | BIT(APICV_INHIBIT_REASON_SEV) | BIT(APICV_INHIBIT_REASON_APIC_ID_MODIFIED) | - BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED); + BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED) | + BIT(APICV_INHIBIT_REASON_X2APIC); =20 return supported & BIT(reason); } diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index d7374d768296..aa5ab0c620de 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -10705,6 +10705,13 @@ static int vcpu_run(struct kvm_vcpu *vcpu) break; } =20 + if (vcpu->kvm->arch.apic_access_memslot_inhibited && + vcpu->kvm->arch.apic_access_memslot_enabled) { + kvm_vcpu_srcu_read_unlock(vcpu); + kvm_free_apic_access_page(vcpu->kvm); + kvm_vcpu_srcu_read_lock(vcpu); + } + if (__xfer_to_guest_mode_work_pending()) { kvm_vcpu_srcu_read_unlock(vcpu); r =3D xfer_to_guest_mode_handle_work(vcpu); --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC7B4C54EE9 for ; Tue, 20 Sep 2022 23:32:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231334AbiITXcU (ORCPT ); Tue, 20 Sep 2022 19:32:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44862 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231185AbiITXcD (ORCPT ); Tue, 20 Sep 2022 19:32:03 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2643785B9 for ; Tue, 20 Sep 2022 16:31:51 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id a16-20020a170902ecd000b001782ec09870so2632048plh.12 for ; Tue, 20 Sep 2022 16:31:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=whBnEK+HOKHkt5PuN+MXgSRnFM5gmru7Bat2+aOdg0k=; b=sHZkNAA/69NpV0Eb3zGTC9UX0VnPUJWlR8fC/bxFnhF8QXWtKgBbPINNSI4ROCbpFI IoljzlNVvOHvopdIRr4oo8aP1xWd91CmQlwLXgWv/zontpZNOsgGSYm5TJgQpIrEonEC sD+wALzvW24ifzHgB5zXxoHjGMeZLpNemhlga36GkpHpSgbDICwsV0/LR4eRnfUiny/k ch0eK9Ib0l4xiZfBV2M3WHYzAe44r1YPhq82nwr7HdwCdzIUxhR6+Yn//bckvrqyp9wz WeKWgpQ2wJGDXcvu34RXMtTQuN6ExPagwATR6PKomFkjRWZah9qDNFDh3w9KJeFvo1V/ kYaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=whBnEK+HOKHkt5PuN+MXgSRnFM5gmru7Bat2+aOdg0k=; b=L311FH5O/Q+S/BXK3v2bVOJRc+WLhvOVNmipJW5U/XafKWrO9PsNnp3aI3CJTb8Oht l34YNN91aGcYTit2GlvawV7RknJ0s+oNhDtx7pt4Lug87Rrq5L1WjaKcu9/hVMbvQKPg ICUPJWlM+EbvtV1dBTALfsVBuYDRyUoH6Z9Z155lm/Lt96jAEACe3FVh16hAzSmGhp79 00EhdcFsUW3nrMhu/l0d/56EhluukXwLY1ausWCo2iTvPdIjjZs9bCnHuZVbILYDaODR ctXP3rc0E068amCZWY2hqqkddmhnQ6W5srbLPENmzOuC2Le9pkGg+K47bjBG74fFoiLr ngdQ== X-Gm-Message-State: ACrzQf3F8e96L1zWzDbivlO8S0Lkyzr6ZC2xZKfKj410f5HK5MqMEWzi rF/B9ijgVc/TX84hsuj+6eNPIzE9Pvs= X-Google-Smtp-Source: AMsMyM7+WqRZ9/F6ZVFeRkBPmJ9gurF7tFxDD36jxZ9T33deQOh2arS7VM5HAkrNxB/WK6Zf0nVh6G6yYxw= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:27a1:b0:548:ea2e:885c with SMTP id bd33-20020a056a0027a100b00548ea2e885cmr26132664pfb.55.1663716711405; Tue, 20 Sep 2022 16:31:51 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:14 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-9-seanjc@google.com> Subject: [PATCH v3 08/28] KVM: SVM: Don't put/load AVIC when setting virtual APIC mode From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move the VMCB updates from avic_refresh_apicv_exec_ctrl() into avic_set_virtual_apic_mode() and invert the dependency being said functions to avoid calling avic_vcpu_{load,put}() and avic_set_pi_irte_mode() when "only" setting the virtual APIC mode. avic_set_virtual_apic_mode() is invoked from common x86 with preemption enabled, which makes avic_vcpu_{load,put}() unhappy. Luckily, calling those and updating IRTE stuff is unnecessary as the only reason avic_set_virtual_apic_mode() is called is to handle transitions between xAPIC and x2APIC that don't also toggle APICv activation. And if activation doesn't change, there's no need to fiddle with the physical APIC ID table or update IRTE. The "full" refresh is guaranteed to be called if activation changes in this case as the only call to the "set" path is: kvm_vcpu_update_apicv(vcpu); static_call_cond(kvm_x86_set_virtual_apic_mode)(vcpu); and kvm_vcpu_update_apicv() invokes the refresh if activation changes: if (apic->apicv_active =3D=3D activate) goto out; apic->apicv_active =3D activate; kvm_apic_update_apicv(vcpu); static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu); Rename the helper to reflect that it is also called during "refresh". WARNING: CPU: 183 PID: 49186 at arch/x86/kvm/svm/avic.c:1081 avic_vcpu_pu= t+0xde/0xf0 [kvm_amd] CPU: 183 PID: 49186 Comm: stable Tainted: G O 6.0.0-smp--= fcddbca45f0a-sink #34 Hardware name: Google, Inc. Arcadia_IT_80/Arcadia_IT_80, BIOS 10.48.0 01/= 27/2022 RIP: 0010:avic_vcpu_put+0xde/0xf0 [kvm_amd] avic_refresh_apicv_exec_ctrl+0x142/0x1c0 [kvm_amd] avic_set_virtual_apic_mode+0x5a/0x70 [kvm_amd] kvm_lapic_set_base+0x149/0x1a0 [kvm] kvm_set_apic_base+0x8f/0xd0 [kvm] kvm_set_msr_common+0xa3a/0xdc0 [kvm] svm_set_msr+0x364/0x6b0 [kvm_amd] __kvm_set_msr+0xb8/0x1c0 [kvm] kvm_emulate_wrmsr+0x58/0x1d0 [kvm] msr_interception+0x1c/0x30 [kvm_amd] svm_invoke_exit_handler+0x31/0x100 [kvm_amd] svm_handle_exit+0xfc/0x160 [kvm_amd] vcpu_enter_guest+0x21bb/0x23e0 [kvm] vcpu_run+0x92/0x450 [kvm] kvm_arch_vcpu_ioctl_run+0x43e/0x6e0 [kvm] kvm_vcpu_ioctl+0x559/0x620 [kvm] Fixes: 05c4fe8c1bd9 ("KVM: SVM: Refresh AVIC configuration when changing AP= IC mode") Cc: stable@vger.kernel.org Cc: Suravee Suthikulpanit Cc: Maxim Levitsky Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 31 +++++++++++++++---------------- arch/x86/kvm/svm/svm.c | 2 +- arch/x86/kvm/svm/svm.h | 2 +- 3 files changed, 17 insertions(+), 18 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 8f9426f21bbf..535e35edce1d 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -720,18 +720,6 @@ void avic_apicv_post_state_restore(struct kvm_vcpu *vc= pu) avic_handle_ldr_update(vcpu); } =20 -void avic_set_virtual_apic_mode(struct kvm_vcpu *vcpu) -{ - if (!lapic_in_kernel(vcpu) || avic_mode =3D=3D AVIC_MODE_NONE) - return; - - if (kvm_get_apic_mode(vcpu) =3D=3D LAPIC_MODE_INVALID) { - WARN_ONCE(true, "Invalid local APIC state (vcpu_id=3D%d)", vcpu->vcpu_id= ); - return; - } - avic_refresh_apicv_exec_ctrl(vcpu); -} - static int avic_set_pi_irte_mode(struct kvm_vcpu *vcpu, bool activate) { int ret =3D 0; @@ -1074,17 +1062,18 @@ void avic_vcpu_put(struct kvm_vcpu *vcpu) WRITE_ONCE(*(svm->avic_physical_id_cache), entry); } =20 - -void avic_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu) +void avic_refresh_virtual_apic_mode(struct kvm_vcpu *vcpu) { struct vcpu_svm *svm =3D to_svm(vcpu); struct vmcb *vmcb =3D svm->vmcb01.ptr; - bool activated =3D kvm_vcpu_apicv_active(vcpu); + + if (!lapic_in_kernel(vcpu) || avic_mode =3D=3D AVIC_MODE_NONE) + return; =20 if (!enable_apicv) return; =20 - if (activated) { + if (kvm_vcpu_apicv_active(vcpu)) { /** * During AVIC temporary deactivation, guest could update * APIC ID, DFR and LDR registers, which would not be trapped @@ -1098,6 +1087,16 @@ void avic_refresh_apicv_exec_ctrl(struct kvm_vcpu *v= cpu) avic_deactivate_vmcb(svm); } vmcb_mark_dirty(vmcb, VMCB_AVIC); +} + +void avic_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu) +{ + bool activated =3D kvm_vcpu_apicv_active(vcpu); + + if (!enable_apicv) + return; + + avic_refresh_virtual_apic_mode(vcpu); =20 if (activated) avic_vcpu_load(vcpu, vcpu->cpu); diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index f3813dbacb9f..2aa5069bafb2 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -4807,7 +4807,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata =3D { .enable_nmi_window =3D svm_enable_nmi_window, .enable_irq_window =3D svm_enable_irq_window, .update_cr8_intercept =3D svm_update_cr8_intercept, - .set_virtual_apic_mode =3D avic_set_virtual_apic_mode, + .set_virtual_apic_mode =3D avic_refresh_virtual_apic_mode, .refresh_apicv_exec_ctrl =3D avic_refresh_apicv_exec_ctrl, .check_apicv_inhibit_reasons =3D avic_check_apicv_inhibit_reasons, .apicv_post_state_restore =3D avic_apicv_post_state_restore, diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index 6a7686bf6900..7a95f50e80e7 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -646,7 +646,7 @@ void avic_vcpu_blocking(struct kvm_vcpu *vcpu); void avic_vcpu_unblocking(struct kvm_vcpu *vcpu); void avic_ring_doorbell(struct kvm_vcpu *vcpu); unsigned long avic_vcpu_get_apicv_inhibit_reasons(struct kvm_vcpu *vcpu); -void avic_set_virtual_apic_mode(struct kvm_vcpu *vcpu); +void avic_refresh_virtual_apic_mode(struct kvm_vcpu *vcpu); =20 =20 /* sev.c */ --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76E04C6FA82 for ; Tue, 20 Sep 2022 23:32:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231343AbiITXcY (ORCPT ); Tue, 20 Sep 2022 19:32:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44860 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231187AbiITXcE (ORCPT ); Tue, 20 Sep 2022 19:32:04 -0400 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99A10786C4 for ; Tue, 20 Sep 2022 16:31:53 -0700 (PDT) Received: by mail-pf1-x449.google.com with SMTP id br14-20020a056a00440e00b00548434985cdso2484285pfb.8 for ; Tue, 20 Sep 2022 16:31:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=daNRJzX/JREQUCEW9Tnrc/vjVXi3u+32XbOCyfukabI=; b=oZoEOxrIg2Cb/LQyEFrcgWA8UjifAjhxgo/JuUqh5AqJRObHF7f071IDrG2cSLRG4d EIObmX5+dsHiCeuFs5e5VU5wSk8lBxjJg8fF8x+PROuHjQME1t8fnAQR0i9jSNuo07T3 PjED3cuKruJPVnuDtjeky1jmJA8IilhP+4M0P1St+n7tlYp+q4PIGHgAbFf4NwBGMFxW LSdekTOigaVyvmbpmMDyRYmDugjOdiC2LpsRauwX5k/zS9R2h7VFNdlPaOqlOxOSbqDt AwqtLdKpiJ48t3UkbiN9akK6B91tjKhHCnJJzQjC0BWlKNUz2EUMOiQvrfgjd94jSuBL XMJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=daNRJzX/JREQUCEW9Tnrc/vjVXi3u+32XbOCyfukabI=; b=yY2TqaCr1A/ZXyPY1CzkR2XeOZdbIcTcYxDNyitJD9Xdgbm/wJds+0Y0M2wYyKRNHP JsfxCdsERUjmncTbXJF40BS8fCT5r1shrkrXHOFc/Luhne8TDk0DQfBxkyR090mYTQld 90yC9zXNSQ6Qc9VKA7qO1d7SoVgu/4o/1bcwJHVSxDnC8MmZFPlKJPng3K+oe5SkeQjt DFDXskD9JHIdrALOCEWKdVWAks3OUR4ASc5vEQqMC132VnDLWhMhNXlm39tVUELXaRRo yDma2J3+HyYkbxwK8G5TJHafLOi0yLMWHjrXFvxik2skWN9N8B8g5764l3PT9AeykTmu YMXg== X-Gm-Message-State: ACrzQf1fbOaGgnGj42ejo1bA2tDvaqfPL4Lo8nY74tWfTe0zh/xdHgfq LfrNWe+LDbeed+i9RSPrDWTmLipE0Jw= X-Google-Smtp-Source: AMsMyM6uWCl4kNoV3CoPtI7HFSlEXJs2HKKzM+pubhPlFVaK5M1s7N3uS9+WCbm7x8fXXICu+ekQN1Mugns= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:6b8b:b0:178:7cf5:ad62 with SMTP id p11-20020a1709026b8b00b001787cf5ad62mr1939492plk.13.1663716713144; Tue, 20 Sep 2022 16:31:53 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:15 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-10-seanjc@google.com> Subject: [PATCH v3 09/28] KVM: SVM: Replace "avic_mode" enum with "x2avic_enabled" boolean From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace the "avic_mode" enum with a single bool to track whether or not x2AVIC is enabled. KVM already has "apicv_enabled" that tracks if any flavor of AVIC is enabled, i.e. AVIC_MODE_NONE and AVIC_MODE_X1 are redundant and unnecessary noise. No functional change intended. Signed-off-by: Sean Christopherson Reviewed-by: Maxim Levitsky --- arch/x86/kvm/svm/avic.c | 46 +++++++++++++++++++---------------------- arch/x86/kvm/svm/svm.c | 2 +- arch/x86/kvm/svm/svm.h | 9 +------- 3 files changed, 23 insertions(+), 34 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 535e35edce1d..84beef0edae3 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -53,7 +53,7 @@ static DEFINE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HAS= H_BITS); static u32 next_vm_id =3D 0; static bool next_vm_id_wrapped =3D 0; static DEFINE_SPINLOCK(svm_vm_data_hash_lock); -enum avic_modes avic_mode; +bool x2avic_enabled; =20 /* * This is a wrapper of struct amd_iommu_ir_data. @@ -79,8 +79,7 @@ static void avic_activate_vmcb(struct vcpu_svm *svm) * (deletes the memslot) if any vCPU has x2APIC enabled, thus enabling * AVIC in hybrid mode activates only the doorbell mechanism. */ - if (apic_x2apic_mode(svm->vcpu.arch.apic) && - avic_mode =3D=3D AVIC_MODE_X2) { + if (x2avic_enabled && apic_x2apic_mode(svm->vcpu.arch.apic)) { vmcb->control.int_ctl |=3D X2APIC_MODE_MASK; vmcb->control.avic_physical_id |=3D X2AVIC_MAX_PHYSICAL_ID; /* Disabling MSR intercept for x2APIC registers */ @@ -247,8 +246,8 @@ static u64 *avic_get_physical_id_entry(struct kvm_vcpu = *vcpu, u64 *avic_physical_id_table; struct kvm_svm *kvm_svm =3D to_kvm_svm(vcpu->kvm); =20 - if ((avic_mode =3D=3D AVIC_MODE_X1 && index > AVIC_MAX_PHYSICAL_ID) || - (avic_mode =3D=3D AVIC_MODE_X2 && index > X2AVIC_MAX_PHYSICAL_ID)) + if ((!x2avic_enabled && index > AVIC_MAX_PHYSICAL_ID) || + (index > X2AVIC_MAX_PHYSICAL_ID)) return NULL; =20 avic_physical_id_table =3D page_address(kvm_svm->avic_physical_id_table_p= age); @@ -262,8 +261,8 @@ static int avic_init_backing_page(struct kvm_vcpu *vcpu) int id =3D vcpu->vcpu_id; struct vcpu_svm *svm =3D to_svm(vcpu); =20 - if ((avic_mode =3D=3D AVIC_MODE_X1 && id > AVIC_MAX_PHYSICAL_ID) || - (avic_mode =3D=3D AVIC_MODE_X2 && id > X2AVIC_MAX_PHYSICAL_ID)) + if ((!x2avic_enabled && id > AVIC_MAX_PHYSICAL_ID) || + (id > X2AVIC_MAX_PHYSICAL_ID)) return -EINVAL; =20 if (!vcpu->arch.apic->regs) @@ -1067,10 +1066,7 @@ void avic_refresh_virtual_apic_mode(struct kvm_vcpu = *vcpu) struct vcpu_svm *svm =3D to_svm(vcpu); struct vmcb *vmcb =3D svm->vmcb01.ptr; =20 - if (!lapic_in_kernel(vcpu) || avic_mode =3D=3D AVIC_MODE_NONE) - return; - - if (!enable_apicv) + if (!lapic_in_kernel(vcpu) || !enable_apicv) return; =20 if (kvm_vcpu_apicv_active(vcpu)) { @@ -1146,32 +1142,32 @@ bool avic_hardware_setup(struct kvm_x86_ops *x86_op= s) if (!npt_enabled) return false; =20 + /* AVIC is a prerequisite for x2AVIC. */ + if (!boot_cpu_has(X86_FEATURE_AVIC) && !force_avic) { + if (boot_cpu_has(X86_FEATURE_X2AVIC)) { + pr_warn(FW_BUG "Cannot support x2AVIC due to AVIC is disabled"); + pr_warn(FW_BUG "Try enable AVIC using force_avic option"); + } + return false; + } + if (boot_cpu_has(X86_FEATURE_AVIC)) { - avic_mode =3D AVIC_MODE_X1; pr_info("AVIC enabled\n"); } else if (force_avic) { /* * Some older systems does not advertise AVIC support. * See Revision Guide for specific AMD processor for more detail. */ - avic_mode =3D AVIC_MODE_X1; pr_warn("AVIC is not supported in CPUID but force enabled"); pr_warn("Your system might crash and burn"); } =20 /* AVIC is a prerequisite for x2AVIC. */ - if (boot_cpu_has(X86_FEATURE_X2AVIC)) { - if (avic_mode =3D=3D AVIC_MODE_X1) { - avic_mode =3D AVIC_MODE_X2; - pr_info("x2AVIC enabled\n"); - } else { - pr_warn(FW_BUG "Cannot support x2AVIC due to AVIC is disabled"); - pr_warn(FW_BUG "Try enable AVIC using force_avic option"); - } - } + x2avic_enabled =3D boot_cpu_has(X86_FEATURE_X2AVIC); + if (x2avic_enabled) + pr_info("x2AVIC enabled\n"); =20 - if (avic_mode !=3D AVIC_MODE_NONE) - amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier); + amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier); =20 - return !!avic_mode; + return true; } diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 2aa5069bafb2..709f0b3e7a48 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -821,7 +821,7 @@ void svm_set_x2apic_msr_interception(struct vcpu_svm *s= vm, bool intercept) if (intercept =3D=3D svm->x2avic_msrs_intercepted) return; =20 - if (avic_mode !=3D AVIC_MODE_X2 || + if (!x2avic_enabled || !apic_x2apic_mode(svm->vcpu.arch.apic)) return; =20 diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index 7a95f50e80e7..29c334a932c3 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -35,14 +35,7 @@ extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly; extern bool npt_enabled; extern int vgif; extern bool intercept_smi; - -enum avic_modes { - AVIC_MODE_NONE =3D 0, - AVIC_MODE_X1, - AVIC_MODE_X2, -}; - -extern enum avic_modes avic_mode; +extern bool x2avic_enabled; =20 /* * Clean bits in VMCB. --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A154BC54EE9 for ; Tue, 20 Sep 2022 23:32:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231352AbiITXcc (ORCPT ); Tue, 20 Sep 2022 19:32:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231144AbiITXcG (ORCPT ); Tue, 20 Sep 2022 19:32:06 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5078D5E64C for ; Tue, 20 Sep 2022 16:31:55 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-34a03cb9679so36912477b3.21 for ; Tue, 20 Sep 2022 16:31:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=0dxTPuTzVMWgGi4al8aBVgMoHk8EOTLA2xcY/IFfAgE=; b=AJAfFhVlpPBnrGyqemySHBHn78LZyGIFDKqO2SovfQEUEEBpazyrg8J2WovNkGyzRu 9+u8kKrfNg537aDM0xwHkDVrBu101OtxApcvm1xeSRg+SUl6hl5zuspv68wFOIKG+kWj gC6SY9fvWd4zDcTAO6ityQZr0HjCV0nbT8QeiAmZl45FJN0fMZ1/r8J0ea6ZDkTickjO kKv4Waq9sgx+OCgxBrGsg1FumPxnJ84sQaYuKw/J68PHv9xkejP2M0qm8PzgdGoiPg9S 11ejBMVxUWx1hBih50dRggux7wKclIyDwj9r/FTPascnVEF765zpaf5CS4AH8QwYQ9js +9aA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=0dxTPuTzVMWgGi4al8aBVgMoHk8EOTLA2xcY/IFfAgE=; b=TwOAS7JmDi2zVXr0cKr+lCe9LzP9p5+7ZQWlNQmlbe7DQtyaaaVxniGSTQax46ikZL aVdPIjPdYlyF97shp6HWX3o/Mjllggr5CEgFlB6fAVXQtYmcVhxuxcvgSbz7qroRkHxK P+uHViGrgBNqF4g7s4cRAs29tYVvRQ+hQdkx0RCqoJRvpatiwYsccL+YU7kco10o5CCm T3nIJgLsvzK0nYvqm65sbgYbRT27R6RTzStCuq9GtW1VrUqIDGJVmunUYciateFSEiWH Sdn0vcK43Fx+RFBRnCWFVRew2XhrB5A3fvMlg2+zVMUJcZupkriZ6zPihlS+/EWPkMPC jYBA== X-Gm-Message-State: ACrzQf3GElKF4jCw2TOyqojIXfbgj2JpyejQsPRJlKb/bIPazC9or+kk 4RrhYkU8Vz5MDbyDtDxP9FH9v++0bnY= X-Google-Smtp-Source: AMsMyM6eLstN1QP/hzF9oY2nzhUn8JfEvgl/L110KizJ9pP0dAtfP5zNb0DSnvcBY6oJuHvRYadI1Md4qd8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6902:120f:b0:6a1:f220:5ace with SMTP id s15-20020a056902120f00b006a1f2205acemr21856711ybu.141.1663716714545; Tue, 20 Sep 2022 16:31:54 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:16 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-11-seanjc@google.com> Subject: [PATCH v3 10/28] KVM: SVM: Compute dest based on sender's x2APIC status for AVIC kick From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Compute the destination from ICRH using the sender's x2APIC status, not each (potential) target's x2APIC status. Fixes: c514d3a348ac ("KVM: SVM: Update avic_kick_target_vcpus to support 32= -bit APIC ID") Cc: Li RongQing Signed-off-by: Sean Christopherson Reviewed-by: Li RongQing Reviewed-by: Maxim Levitsky --- arch/x86/kvm/svm/avic.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 84beef0edae3..e9aab8ecce83 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -429,6 +429,7 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm,= struct kvm_lapic *source static void avic_kick_target_vcpus(struct kvm *kvm, struct kvm_lapic *sour= ce, u32 icrl, u32 icrh, u32 index) { + u32 dest =3D apic_x2apic_mode(source) ? icrh : GET_XAPIC_DEST_FIELD(icrh); unsigned long i; struct kvm_vcpu *vcpu; =20 @@ -444,13 +445,6 @@ static void avic_kick_target_vcpus(struct kvm *kvm, st= ruct kvm_lapic *source, * since entered the guest will have processed pending IRQs at VMRUN. */ kvm_for_each_vcpu(i, vcpu, kvm) { - u32 dest; - - if (apic_x2apic_mode(vcpu->arch.apic)) - dest =3D icrh; - else - dest =3D GET_XAPIC_DEST_FIELD(icrh); - if (kvm_apic_match_dest(vcpu, source, icrl & APIC_SHORT_MASK, dest, icrl & APIC_DEST_MASK)) { vcpu->arch.apic->irr_pending =3D true; --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97A20C6FA8E for ; Tue, 20 Sep 2022 23:32:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231237AbiITXcg (ORCPT ); Tue, 20 Sep 2022 19:32:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231216AbiITXcH (ORCPT ); Tue, 20 Sep 2022 19:32:07 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CCDA73923 for ; Tue, 20 Sep 2022 16:31:56 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id b11-20020a170902d50b00b0017828988079so2641543plg.21 for ; Tue, 20 Sep 2022 16:31:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=qGYDlw3EvdizUpemXeSoCeVsNs+yYIOG67hOKnUatms=; b=l7Lp5U5v/vd1ssIDwUNHnPXb9ZW/u+uQ0NJ5j+WkMA0ReEnXJ+qo0JZHET5P3xvlOl Fg+Q4rtb4+WKEbaCyFcEv8dJA/Hx3JBHATOB5eaXsxR9ios9ARXSYIi2/oieY81tyHLW zKaYeYPwP6GZABws7HiWrYOq4Ts0HKt6MOgHBuXYF5RAe4ZnugBVo59OwNRytjzjD8NH hpftrXpsncCCu80m98C/hHmL5jdQNxTf94xvD8NHs/vLWBsJeg9eOsSm/SuWgSMJsoQS iJmH94vInfEtxRfgRYqcC+UHb73fkeAy5qnzplKXHqtJTGD8eEyv+zsOxxT4j9B/5ZRD 0E/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=qGYDlw3EvdizUpemXeSoCeVsNs+yYIOG67hOKnUatms=; b=u6tAmDGbE+4+xOBLxxjtorNG9PFxhE8FT1YtwkVvALZyNSLo/Td7tdTW+IWMixKBCG j/RLxbEfLob58baiFi/eip6PUdTG4CrMWkNFkfnseuHO1WffieXR0A3g0fRoFr+vJxPW Q8StRU4mnVs/9AYusal1Pv1dI9La7PXmA6qW98f6RplytRh/wEmRHq1M/lLrbVYLhxCh eZOuw0zargaDQB/4cs22Of7geEZyocV6N6rFyBYiQWAPPT5nkzCeVAmElMBAjaoUj/Uw ROV6aszs8lhsjuIEmdDHHHhacEyoR/qaZWHQ3AI88pu15d6CoDG/KHBDiQd3AdfpD5Jy oXPg== X-Gm-Message-State: ACrzQf1LSD437b6C0PSi3Ffqrt7FMYea20ouhsBo7Z+5f1odZgNN6a98 +wkYPQS7rQxTqb1umhL8EinHG4qTU8A= X-Google-Smtp-Source: AMsMyM4HNsJhYXHtBeAivKQvQTgv1IMYBwgEUlW7HSP+ZZQ3yIcOmiXAv64JsNyCa9P0thlXWKFzid9coy8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90b:1181:b0:203:ae0e:6a21 with SMTP id gk1-20020a17090b118100b00203ae0e6a21mr405142pjb.0.1663716715884; Tue, 20 Sep 2022 16:31:55 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:17 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-12-seanjc@google.com> Subject: [PATCH v3 11/28] KVM: SVM: Fix x2APIC Logical ID calculation for avic_kick_target_vcpus_fast From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Suravee Suthikulpanit For X2APIC ID in cluster mode, the logical ID is bit [15:0]. Fixes: 603ccef42ce9 ("KVM: x86: SVM: fix avic_kick_target_vcpus_fast") Cc: Maxim Levitsky Signed-off-by: Suravee Suthikulpanit Reviewed-by: Maxim Levitsky Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index e9aab8ecce83..e35e9363e7ff 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -356,7 +356,7 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm,= struct kvm_lapic *source =20 if (apic_x2apic_mode(source)) { /* 16 bit dest mask, 16 bit cluster id */ - bitmap =3D dest & 0xFFFF0000; + bitmap =3D dest & 0xFFFF; cluster =3D (dest >> 16) << 4; } else if (kvm_lapic_get_reg(source, APIC_DFR) =3D=3D APIC_DFR_FLAT) { /* 8 bit dest mask*/ --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D204C54EE9 for ; Tue, 20 Sep 2022 23:32:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231240AbiITXcl (ORCPT ); Tue, 20 Sep 2022 19:32:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45078 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231225AbiITXcH (ORCPT ); Tue, 20 Sep 2022 19:32:07 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7CC6786E3 for ; Tue, 20 Sep 2022 16:31:57 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id j3-20020a170902da8300b001782a6fbc87so2613271plx.5 for ; Tue, 20 Sep 2022 16:31:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=5/6FMBIKl7OpmtLyPOM5pBGrFGPOcVqV/DcFkynnS6M=; b=s6+5XZf6F5dXMsJyKLZY5aQvs7eLYN+0jS3lvOV6Gn+mpcEHU8ZxePDesPRPZJnRi3 aP8q2i9p/0JWeuNLQ5iyFkHI5jMty46WlVqOFKGlzg+mIKZf+9ob1KU6jj/x6Tx3lj9u owSuI55rLbxAOdJRZL09jX6iPFG48sc48ww5HbTZ0D3V5MBzmwg1HXoMHEELTau0XKpo 1PRSBeXEEc6HELf0ZuUkMS/a2bm+TMYKOBAFc4n85s+9+6at3O6CHh74xI/R3ZmjHlYm T1IO7j8yPchz+pR2HcYXnqmFF+JReRd/hL07GhJa6MuEdrFGeEdg8hLF1o223qyYus1J Y9ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=5/6FMBIKl7OpmtLyPOM5pBGrFGPOcVqV/DcFkynnS6M=; b=St01C4p5QiNAxdASRClUbLdzgDO2VE2DzvRqqni15MhRZ9R45wQ5tiliWyUluQFgpz rvnNUEwGaRhhHtd8YMtt995J1CBUYF+cBDCSS4x3JC+s1uBk59qeOWwGf6udGi81TP8Q A8laBvKaO2GfBu1t16cVvZhfEtDU6FGQ0HW50DrIwjlZz/Q2kAc0bAO+nm8eOlJk6trM OLonCqjKKYHzM/g2g8qgbiI+Hoh9cktdRcp0UZe7/SFWye1eG9QZZFookfHIkV23FJGI 9aCF3dDZntokVJn0scV3c9QK3PXOgA8AVEUMnet355OzhKVsPBEOJA7wTpd7+a8buX+r 2wHA== X-Gm-Message-State: ACrzQf2mEXsCmBL04CivmhiAQVrWV9l1YOo1ySRsat2uzoixS7b6RtDW LuDV5IjJLgYBCPF4ydFXcvx7j19fBYc= X-Google-Smtp-Source: AMsMyM4S/MFB4YYwNLQSoEWeVX9mF1SL0kxwn81DPo6+LX6WXUoG4iZ+FpWOarIh3lTy685Qkyl63M6Kkeg= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:e805:b0:177:e8af:ba43 with SMTP id u5-20020a170902e80500b00177e8afba43mr1972705plg.171.1663716717590; Tue, 20 Sep 2022 16:31:57 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:18 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-13-seanjc@google.com> Subject: [PATCH v3 12/28] Revert "KVM: SVM: Use target APIC ID to complete x2AVIC IRQs when possible" From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Due to a likely mismerge of patches, KVM ended up with a superfluous commit to "enable" AVIC's fast path for x2AVIC mode. Even worse, the superfluous commit has several bugs and creates a nasty local shadow variable. Rather than fix the bugs piece-by-piece[*] to achieve the same end result, revert the patch wholesale. Opportunistically add a comment documenting the x2AVIC dependencies. This reverts commit 8c9e639da435874fb845c4d296ce55664071ea7a. [*] https://lore.kernel.org/all/YxEP7ZBRIuFWhnYJ@google.com Fixes: 8c9e639da435 ("KVM: SVM: Use target APIC ID to complete x2AVIC IRQs = when possible") Suggested-by: Maxim Levitsky Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 29 +++++++++++------------------ 1 file changed, 11 insertions(+), 18 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index e35e9363e7ff..605c36569ddf 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -378,7 +378,17 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm= , struct kvm_lapic *source =20 logid_index =3D cluster + __ffs(bitmap); =20 - if (!apic_x2apic_mode(source)) { + if (apic_x2apic_mode(source)) { + /* + * For x2APIC, the logical APIC ID is a read-only value + * that is derived from the x2APIC ID, thus the x2APIC + * ID can be found by reversing the calculation (done + * above). Note, bits 31:20 of the x2APIC ID are not + * propagated to the logical ID, but KVM limits the + * x2APIC ID limited to KVM_MAX_VCPU_IDS. + */ + l1_physical_id =3D logid_index; + } else { u32 *avic_logical_id_table =3D page_address(kvm_svm->avic_logical_id_table_page); =20 @@ -393,23 +403,6 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm= , struct kvm_lapic *source =20 l1_physical_id =3D logid_entry & AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK; - } else { - /* - * For x2APIC logical mode, cannot leverage the index. - * Instead, calculate physical ID from logical ID in ICRH. - */ - int cluster =3D (icrh & 0xffff0000) >> 16; - int apic =3D ffs(icrh & 0xffff) - 1; - - /* - * If the x2APIC logical ID sub-field (i.e. icrh[15:0]) - * contains anything but a single bit, we cannot use the - * fast path, because it is limited to a single vCPU. - */ - if (apic < 0 || icrh !=3D (1 << apic)) - return -EINVAL; - - l1_physical_id =3D (cluster << 4) + apic; } } =20 --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E903C6FA82 for ; Tue, 20 Sep 2022 23:32:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231438AbiITXcp (ORCPT ); Tue, 20 Sep 2022 19:32:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45080 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231139AbiITXcI (ORCPT ); Tue, 20 Sep 2022 19:32:08 -0400 Received: from mail-pf1-x44a.google.com (mail-pf1-x44a.google.com [IPv6:2607:f8b0:4864:20::44a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F5B2786EB for ; Tue, 20 Sep 2022 16:31:59 -0700 (PDT) Received: by mail-pf1-x44a.google.com with SMTP id z24-20020a056a001d9800b0054667d493bdso2513555pfw.0 for ; Tue, 20 Sep 2022 16:31:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=JZAIYdYCg9gsJwY7eA6nzFlm6TxDyiq9Q8zzDq9WamE=; b=YWQAzjFU7mSAIBBpEEMWNuvmnTzsVnLRyJUTxMVfGlsNBLNsFJUVfUtCDdinXRigaJ gVdC/cngA61DrktBfUbUfLX2SzrWuJHBNCLwJVao1un1TWgVyLjRPtcFZw8ripVlXLpN c7K89ctFLKrGZUrs9+sAd7uESaXChOv/OxlbdQmr3UokDONz/mdLB2VYGGLE8GaLZTcO 7jPWJs4U6+Cn32RK0pQ+SvLmErOAvnm36xXjVrfKkSIA9or/61NEwLQZFcRsOEqqxjZz am78kmZ7SGGos06HNVUWtmSBL7iwinEvHfTFiDspb7LhE9lTz0+KP4OAIDtFuQhRksPJ 3gwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=JZAIYdYCg9gsJwY7eA6nzFlm6TxDyiq9Q8zzDq9WamE=; b=DC3q7RYWPR53PUweCxvxhzcUdleh1qu9+easoD4+D4VICIk2ETHgADl+GAYUAgvz4X YDgKzClT9vHm5bRd/qdeA0mDsIl68VEE4SHoiwuCReCwb+1asc41zh14bksEfpHyJceE a30hrGywR0zWzn3pudOY6EGJkrKjFZOjCIwmba9AZhC/t2dQxZ+TZ2M5U/toSSS+L2ie NpPxVoOauHdKC6fhH0tTt/e+k5Jh3AcMa8Tf0qCTOZTmfkL7pCe4UBfLwILThc71VC5l 2d8h3cbIPXwz1xzeazJG7ayntJE76L+3A52ge3QLuPEjQdwhm3G06xKHKR6ohemArn3J ppcg== X-Gm-Message-State: ACrzQf1/bewW+nUAahDYt64UNIEAl4MC3Tcp0lYWbf/l5BqXnB4Nhe/q Auqxa8S0PCoslHTaYX9tm8D2pOeTkvs= X-Google-Smtp-Source: AMsMyM4yevkG6l/25iock09o1aq13GNFSNZvnc9fYRAIPe6BtvBXT9K4Kv0/+u9/xt/5TQZE4hv5DTDMD/Q= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:23d0:b0:550:d950:c03e with SMTP id g16-20020a056a0023d000b00550d950c03emr7166520pfc.16.1663716719135; Tue, 20 Sep 2022 16:31:59 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:19 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-14-seanjc@google.com> Subject: [PATCH v3 13/28] KVM: SVM: Document that vCPU ID == APIC ID in AVIC kick fastpatch From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Document that AVIC is inhibited if any vCPU's APIC ID diverges from its vCPU ID, i.e. that there's no need to check for a destination match in the AVIC kick fast path. Opportunistically tweak comments to remove "guest bug", as that suggests KVM is punting on error handling, which is not the case. Targeting a non-existent vCPU or no vCPUs _may_ be a guest software bug, but whether or not it's a guest bug is irrelevant. Such behavior is architecturally legal and thus needs to faithfully emulated by KVM (and it is). Signed-off-by: Sean Christopherson Reviewed-by: Maxim Levitsky --- arch/x86/kvm/svm/avic.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 605c36569ddf..40a1ea21074d 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -368,8 +368,8 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm,= struct kvm_lapic *source cluster =3D (dest >> 4) << 2; } =20 + /* Nothing to do if there are no destinations in the cluster. */ if (unlikely(!bitmap)) - /* guest bug: nobody to send the logical interrupt to */ return 0; =20 if (!is_power_of_2(bitmap)) @@ -397,7 +397,7 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm,= struct kvm_lapic *source if (WARN_ON_ONCE(index !=3D logid_index)) return -EINVAL; =20 - /* guest bug: non existing/reserved logical destination */ + /* Nothing to do if the logical destination is invalid. */ if (unlikely(!(logid_entry & AVIC_LOGICAL_ID_ENTRY_VALID_MASK))) return 0; =20 @@ -406,9 +406,13 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm= , struct kvm_lapic *source } } =20 + /* + * KVM inhibits AVIC if any vCPU ID diverges from the vCPUs APIC ID, + * i.e. APIC ID =3D=3D vCPU ID. Once again, nothing to do if the target + * vCPU doesn't exist. + */ target_vcpu =3D kvm_get_vcpu_by_id(kvm, l1_physical_id); if (unlikely(!target_vcpu)) - /* guest bug: non existing vCPU is a target of this IPI*/ return 0; =20 target_vcpu->arch.apic->irr_pending =3D true; --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20CF9C54EE9 for ; Tue, 20 Sep 2022 23:32:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231463AbiITXcu (ORCPT ); Tue, 20 Sep 2022 19:32:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44860 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231244AbiITXcI (ORCPT ); Tue, 20 Sep 2022 19:32:08 -0400 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05E63786EF for ; Tue, 20 Sep 2022 16:32:01 -0700 (PDT) Received: by mail-pf1-x449.google.com with SMTP id z6-20020aa78886000000b005470014dc57so2483184pfe.1 for ; Tue, 20 Sep 2022 16:32:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=skon94oxKuHPyrSCQoqZBUe63SjQdco2L+TbbL4uBCU=; b=Hjp5g7m53/Dp91nmfe9aQvSSNCbSbLS48fRz6LVQD2ydP8OXIfzIUK1tUakIx5EKft qfTTKIJcO3HY41/Pzswr910irQbCD7Tat2fl1zSM5/d67ufO5XF9mXgjMrLg3DaYK63D ImyCFmQ8Z4EX6ExTelVtXumWpd3yWus80WizoQPv9NdS09OZVbimaQ1wgDOGZtMpv+LM KDd24x5tdembE2fpMbCxFockYMcaNTK2CekzpPtgRvVCKYE98YxKnoEBTHzA+hA9/gpK VGDw9iW9WdsjpqbZhJoYFTor86nTVAyUCGGtIzkL5TStsn2pTS2yfsrPqPJ4jOzfyuKI 0NMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=skon94oxKuHPyrSCQoqZBUe63SjQdco2L+TbbL4uBCU=; b=fs7R2lLtTXgjPFjphf3B5r3s3l3f0poawuuPP9qXgq+0e76NH5dB8zhiu681V8BGJL /0iwZbyNvRE+v53Mg6kt5mNGV1vAudi4GBIA+SChBgRe66t6vjkK+gruW8mpzD3szDhO AY3h5byObEn1fHbR3yS4jhcj7V6YHsX2OZjCtpDD0cg9ZXGmhbAmi8whCmmwHLRld56S 0t5h9ZGaP2QU537GcDO1FNL+x6M0ZNxLNSUjWSg5Cl6Lrzi2vZRDCiULgEudnEVyji+x ERe+dBL1vsUis+Njum3bVG8Fx38ZW4TeFvDWb1ffjCRcU4JdRfEidcdW62KhJwX4qgIU R1SA== X-Gm-Message-State: ACrzQf17DF6I6dk/0OfyxOmFNhRcEC46oksF470o6zgRnt6IOB9Vh+kJ 5n9I5QVHDItVfEJKqdGVOyhttAuikMU= X-Google-Smtp-Source: AMsMyM6dxZVAHo63ijsllpicyTPhfqV0yiHEH8OlJFbFOU4rMaDxHlrLk7dkWcMJdTG4jA0OB93KEwVbFkE= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a63:24d:0:b0:439:3804:d0ff with SMTP id 74-20020a63024d000000b004393804d0ffmr22380275pgc.414.1663716720540; Tue, 20 Sep 2022 16:32:00 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:20 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-15-seanjc@google.com> Subject: [PATCH v3 14/28] KVM: SVM: Add helper to perform final AVIC "kick" of single vCPU From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a helper to perform the final kick, two instances of the ICR decoding is one too many. No functional change intended. Signed-off-by: Sean Christopherson Reviewed-by: Maxim Levitsky --- arch/x86/kvm/svm/avic.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 40a1ea21074d..dd0e41d454a7 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -317,6 +317,16 @@ void avic_ring_doorbell(struct kvm_vcpu *vcpu) put_cpu(); } =20 + +static void avic_kick_vcpu(struct kvm_vcpu *vcpu, u32 icrl) +{ + vcpu->arch.apic->irr_pending =3D true; + svm_complete_interrupt_delivery(vcpu, + icrl & APIC_MODE_MASK, + icrl & APIC_INT_LEVELTRIG, + icrl & APIC_VECTOR_MASK); +} + /* * A fast-path version of avic_kick_target_vcpus(), which attempts to match * destination APIC ID to vCPU without looping through all vCPUs. @@ -415,11 +425,7 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm= , struct kvm_lapic *source if (unlikely(!target_vcpu)) return 0; =20 - target_vcpu->arch.apic->irr_pending =3D true; - svm_complete_interrupt_delivery(target_vcpu, - icrl & APIC_MODE_MASK, - icrl & APIC_INT_LEVELTRIG, - icrl & APIC_VECTOR_MASK); + avic_kick_vcpu(target_vcpu, icrl); return 0; } =20 @@ -443,13 +449,8 @@ static void avic_kick_target_vcpus(struct kvm *kvm, st= ruct kvm_lapic *source, */ kvm_for_each_vcpu(i, vcpu, kvm) { if (kvm_apic_match_dest(vcpu, source, icrl & APIC_SHORT_MASK, - dest, icrl & APIC_DEST_MASK)) { - vcpu->arch.apic->irr_pending =3D true; - svm_complete_interrupt_delivery(vcpu, - icrl & APIC_MODE_MASK, - icrl & APIC_INT_LEVELTRIG, - icrl & APIC_VECTOR_MASK); - } + dest, icrl & APIC_DEST_MASK)) + avic_kick_vcpu(vcpu, icrl); } } =20 --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9BD9C54EE9 for ; Tue, 20 Sep 2022 23:32:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231269AbiITXc4 (ORCPT ); Tue, 20 Sep 2022 19:32:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231250AbiITXcI (ORCPT ); Tue, 20 Sep 2022 19:32:08 -0400 Received: from mail-pj1-x104a.google.com (mail-pj1-x104a.google.com [IPv6:2607:f8b0:4864:20::104a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7CDA0786F0 for ; Tue, 20 Sep 2022 16:32:02 -0700 (PDT) Received: by mail-pj1-x104a.google.com with SMTP id 2-20020a17090a0b8200b001fdb8fd5f29so2303641pjr.8 for ; Tue, 20 Sep 2022 16:32:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=5GsqhbbGqpXSLs5HXSK0LpXI8Qc72DvGpf3l/GetlBw=; b=mjW4qwPG9BQT9ulnOXMpCgH+b9mVvqhrQ3wP9TfW80M6o9SyZmHs/vc/D20Yg7WzTA qvxOzLmOfy15+uw8dATfwuJPkgnPdLThidaqknYHPhb12OTKTUJXagoeCP8KDIFuBkEI 5AyrOOemNU/4jYkcs1Ypt8vsM9RRZUlA4te0OP/jn28C7EMNO1LJAHGdFzloqnSEjoIR 9doRixXjbNXnVAR/i9xwF6PlrBfcKeDHgCK12cW1vXgGkDPZhG9krCBIQhAV5ZrDzw2i jkqZt48isuJbkuWDLrAumAIR26rpIqBJoF3eFOud3iLY1/d7s+zqzAWcVyz3k3L47O02 eB/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=5GsqhbbGqpXSLs5HXSK0LpXI8Qc72DvGpf3l/GetlBw=; b=Up4vhDk/f8P5odEpyx3GrI5seerXFvePzFEsrMos4ap/fN43G5dt43icMXMV8ip80h 5rHcs8aGzXj2AxY5mAw/+SxqODYjJZrWSkESGgCDrL7CbSJ6HJEjeW2JsIFTyCpDoltk Ko1UkejlZ8UrogiuCryMSAZ5fqZ1rL/ju9XfYWUmWqtfYyfpzAXY5qxQhGZz3gYKeIZW RUS8G5vUlPov+r6eFmVpEv3sxYBUxv9Jif8UrkGzSH2i7NyL8UCwnTh2MlUOCdhv1K18 Cd4xabCFbA8+lkPCEeBIB98PrscLuJc+vg2TwyFrsEZP8lwNxaMDXzSt3lmtiLAn+uRH cdBw== X-Gm-Message-State: ACrzQf3qaipQe/dQYn4J1/bBJTRb2zpJMLnIyCq8ctfiprAPjUcLEm38 epvv5RESOHzzASt1FTECgVwXsFvd0E4= X-Google-Smtp-Source: AMsMyM7s03BVUNV2z6j27hTV9ODy9TShZuLIVxKcbTL8RX71hZ8H4oOP41NtdFp3qOctZc+aih0Uk7U7gUo= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:c245:b0:178:3912:f1f7 with SMTP id 5-20020a170902c24500b001783912f1f7mr1909652plg.75.1663716722102; Tue, 20 Sep 2022 16:32:02 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:21 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-16-seanjc@google.com> Subject: [PATCH v3 15/28] KVM: x86: Explicitly skip optimized logical map setup if vCPU's LDR==0 From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Explicitly skip the optimized map setup if the vCPU's LDR is '0', i.e. if the vCPU will never respond to logical mode interrupts. KVM already skips setup in this case, but relies on kvm_apic_map_get_logical_dest() to generate mask=3D=3D0. KVM still needs the mask=3D0 check as a non-zero = LDR can yield mask=3D=3D0 depending on the mode, but explicitly handling the LDR will make it simpler to clean up the logical mode tracking in the future. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 70f00eda75b2..bf647af50031 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -286,10 +286,12 @@ void kvm_recalculate_apic_map(struct kvm *kvm) continue; =20 ldr =3D kvm_lapic_get_reg(apic, APIC_LDR); + if (!ldr) + continue; =20 if (apic_x2apic_mode(apic)) { new->mode |=3D KVM_APIC_MODE_X2APIC; - } else if (ldr) { + } else { ldr =3D GET_APIC_LOGICAL_ID(ldr); if (kvm_lapic_get_reg(apic, APIC_DFR) =3D=3D APIC_DFR_FLAT) new->mode |=3D KVM_APIC_MODE_XAPIC_FLAT; --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C1F8C54EE9 for ; Tue, 20 Sep 2022 23:33:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231483AbiITXdB (ORCPT ); Tue, 20 Sep 2022 19:33:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231263AbiITXcJ (ORCPT ); Tue, 20 Sep 2022 19:32:09 -0400 Received: from mail-pg1-x54a.google.com (mail-pg1-x54a.google.com [IPv6:2607:f8b0:4864:20::54a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59C0B72EC7 for ; Tue, 20 Sep 2022 16:32:04 -0700 (PDT) Received: by mail-pg1-x54a.google.com with SMTP id 126-20020a630284000000b0043942ef3ac7so2469467pgc.11 for ; Tue, 20 Sep 2022 16:32:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=0DnOm1NQnF4hm1qkEkLlMwUTgosZ5jnSBllcwGj9ntA=; b=ceL8V6iuTN2If+GjMd7E4cw5E3mU5rOZz58FfjwrGzQ5uNfCW135h1xlxXDN8dhwMw 2N1/IEnM0z42IbDG8uclYaGuse0ixWQJzpEcqLmf/SgTuUxIdgQK3r9CFZ08u/cwR+e+ j1TLdKsQcP0CcuGLd+R3t5SjBPGmtwU3BbopZwFYdqi2bWqEppPfQxohMH4LC+05iMTJ +TDlgHTJ+yKK0vI182Nm1403BHgQUExJqbmurUwiLxMKLaXPJJ+oCt3SpxTvmXAlUxna WWHlPZp9d48JTyFJ0fFhBg1ahja0msQkz13pl2PDA2v43auqgsI3UvnnUJ4xi34js6KL 5zLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=0DnOm1NQnF4hm1qkEkLlMwUTgosZ5jnSBllcwGj9ntA=; b=m/0s9+Bj+BxXLfzqLH8yJjWwp5rbvIjc64CCwCkBYcRTbNgsvi4k6OW0b2+dyqXU4B Punp6QCH5LJF/nxMoTYyJBg4rVCTslLmsSdeLMq10BmDaCekdttdaBVmwtxLx+LZfC9M vpi+8l5uLThWwfzQqYeWVZO7ksYO5J386eVsZwrTZHN/oWxCAUelpO7XI0+bT4mAkOkh fIB8IDWeH0J3ihNR5y+RRifITIxYD+yHLvwNQu47ouzdm7smko0MA5mojPjiR2Jv4WhQ yJu2bsvOAUfYBlrpHOqRXdu+vL4r/ToxRKPvSGbyzrZDmPWwwdaybJrqU42OD0twh9Yi D6wg== X-Gm-Message-State: ACrzQf28+Zk+Ku9pVwssmpJlnKE5FGCzgDYrvQjtJFz3JdrGM5DperqO naSJUHG0A7scvsAtl/aY/V70tlzR/Y8= X-Google-Smtp-Source: AMsMyM4GS77Mx8WQq+RtjB/Ved5Et/xk/5SK5HeCEKuFxFf4ftlw3ChZyu3Kwk0MDW3j1vVGUf9Oln6+ygQ= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:1d82:b0:541:1ea2:e7e with SMTP id z2-20020a056a001d8200b005411ea20e7emr26811472pfw.71.1663716723791; Tue, 20 Sep 2022 16:32:03 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:22 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-17-seanjc@google.com> Subject: [PATCH v3 16/28] KVM: x86: Explicitly track all possibilities for APIC map's logical modes From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Track all possibilities for the optimized APIC map's logical modes instead of overloading the pseudo-bitmap and treating any "unknown" value as "invalid". As documented by the now-stale comment above the mode values, the values did have meaning when the optimized map was originally added. That dependent logical was removed by commit e45115b62f9a ("KVM: x86: use physical LAPIC array for logical x2APIC"), but the obfuscated behavior and its comment were left behind. Opportunistically rename "mode" to "logical_mode", partly to make it clear that the "disabled" case applies only to the logical map, but also to prove that there is no lurking code that expects "mode" to be a bitmap. Functionally, this is a glorified nop. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_host.h | 21 +++++++++++--------- arch/x86/kvm/lapic.c | 35 +++++++++++++++++++++++++-------- 2 files changed, 39 insertions(+), 17 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 6475c882b359..6570b5d728ef 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -955,19 +955,22 @@ struct kvm_arch_memory_slot { }; =20 /* - * We use as the mode the number of bits allocated in the LDR for the - * logical processor ID. It happens that these are all powers of two. - * This makes it is very easy to detect cases where the APICs are - * configured for multiple modes; in that case, we cannot use the map and - * hence cannot use kvm_irq_delivery_to_apic_fast either. + * Track the mode of the optimized logical map, as the rules for decoding = the + * destination vary per mode. Enabling the optimized logical map requires= all + * software-enabled local APIs to be in the same mode, each addressable AP= IC to + * be mapped to only one MDA, and each MDA to map to at most one APIC. */ -#define KVM_APIC_MODE_XAPIC_CLUSTER 4 -#define KVM_APIC_MODE_XAPIC_FLAT 8 -#define KVM_APIC_MODE_X2APIC 16 +enum kvm_apic_logical_mode { + KVM_APIC_MODE_SW_DISABLED, + KVM_APIC_MODE_XAPIC_CLUSTER, + KVM_APIC_MODE_XAPIC_FLAT, + KVM_APIC_MODE_X2APIC, + KVM_APIC_MODE_MAP_DISABLED, +}; =20 struct kvm_apic_map { struct rcu_head rcu; - u8 mode; + enum kvm_apic_logical_mode logical_mode; u32 max_apic_id; union { struct kvm_lapic *xapic_flat_map[8]; diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index bf647af50031..84b7a1c1834d 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -168,7 +168,12 @@ static bool kvm_use_posted_timer_interrupt(struct kvm_= vcpu *vcpu) =20 static inline bool kvm_apic_map_get_logical_dest(struct kvm_apic_map *map, u32 dest_id, struct kvm_lapic ***cluster, u16 *mask) { - switch (map->mode) { + switch (map->logical_mode) { + case KVM_APIC_MODE_SW_DISABLED: + /* Arbitrarily use the flat map so that @cluster isn't NULL. */ + *cluster =3D map->xapic_flat_map; + *mask =3D 0; + return true; case KVM_APIC_MODE_X2APIC: { u32 offset =3D (dest_id >> 16) * 16; u32 max_apic_id =3D map->max_apic_id; @@ -193,8 +198,10 @@ static inline bool kvm_apic_map_get_logical_dest(struc= t kvm_apic_map *map, *cluster =3D map->xapic_cluster_map[(dest_id >> 4) & 0xf]; *mask =3D dest_id & 0xf; return true; + case KVM_APIC_MODE_MAP_DISABLED: + return false; default: - /* Not optimized. */ + WARN_ON_ONCE(1); return false; } } @@ -256,10 +263,12 @@ void kvm_recalculate_apic_map(struct kvm *kvm) goto out; =20 new->max_apic_id =3D max_id; + new->logical_mode =3D KVM_APIC_MODE_SW_DISABLED; =20 kvm_for_each_vcpu(i, vcpu, kvm) { struct kvm_lapic *apic =3D vcpu->arch.apic; struct kvm_lapic **cluster; + enum kvm_apic_logical_mode logical_mode; u16 mask; u32 ldr; u8 xapic_id; @@ -282,7 +291,8 @@ void kvm_recalculate_apic_map(struct kvm *kvm) if (!apic_x2apic_mode(apic) && !new->phys_map[xapic_id]) new->phys_map[xapic_id] =3D apic; =20 - if (!kvm_apic_sw_enabled(apic)) + if (new->logical_mode =3D=3D KVM_APIC_MODE_MAP_DISABLED || + !kvm_apic_sw_enabled(apic)) continue; =20 ldr =3D kvm_lapic_get_reg(apic, APIC_LDR); @@ -290,17 +300,26 @@ void kvm_recalculate_apic_map(struct kvm *kvm) continue; =20 if (apic_x2apic_mode(apic)) { - new->mode |=3D KVM_APIC_MODE_X2APIC; + logical_mode =3D KVM_APIC_MODE_X2APIC; } else { ldr =3D GET_APIC_LOGICAL_ID(ldr); if (kvm_lapic_get_reg(apic, APIC_DFR) =3D=3D APIC_DFR_FLAT) - new->mode |=3D KVM_APIC_MODE_XAPIC_FLAT; + logical_mode =3D KVM_APIC_MODE_XAPIC_FLAT; else - new->mode |=3D KVM_APIC_MODE_XAPIC_CLUSTER; + logical_mode =3D KVM_APIC_MODE_XAPIC_CLUSTER; } + if (new->logical_mode !=3D KVM_APIC_MODE_SW_DISABLED && + new->logical_mode !=3D logical_mode) { + new->logical_mode =3D KVM_APIC_MODE_MAP_DISABLED; + continue; + } + new->logical_mode =3D logical_mode; =20 - if (!kvm_apic_map_get_logical_dest(new, ldr, &cluster, &mask)) + if (WARN_ON_ONCE(!kvm_apic_map_get_logical_dest(new, ldr, + &cluster, &mask))) { + new->logical_mode =3D KVM_APIC_MODE_MAP_DISABLED; continue; + } =20 if (mask) cluster[ffs(mask) - 1] =3D apic; @@ -953,7 +972,7 @@ static bool kvm_apic_is_broadcast_dest(struct kvm *kvm,= struct kvm_lapic **src, { if (kvm->arch.x2apic_broadcast_quirk_disabled) { if ((irq->dest_id =3D=3D APIC_BROADCAST && - map->mode !=3D KVM_APIC_MODE_X2APIC)) + map->logical_mode !=3D KVM_APIC_MODE_X2APIC)) return true; if (irq->dest_id =3D=3D X2APIC_BROADCAST) return true; --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F253BC6FA82 for ; Tue, 20 Sep 2022 23:33:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231499AbiITXdG (ORCPT ); Tue, 20 Sep 2022 19:33:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231272AbiITXcJ (ORCPT ); Tue, 20 Sep 2022 19:32:09 -0400 Received: from mail-pj1-x104a.google.com (mail-pj1-x104a.google.com [IPv6:2607:f8b0:4864:20::104a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B1BC786F7 for ; Tue, 20 Sep 2022 16:32:06 -0700 (PDT) Received: by mail-pj1-x104a.google.com with SMTP id il18-20020a17090b165200b002038e81ee7dso4682775pjb.4 for ; Tue, 20 Sep 2022 16:32:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=BnU9R4OOCMoxOu19YfLjACcEr3TMCmK9pmle1GpcXiY=; b=qkXh507ROI+ln1N42ZCLl+6rk1+yF6u0MvgZC8G61grkt4oNHATMOaF87TJHgQB2dt OIl/FI2kTZRtXS3ZxXxv/+B0KdqYzMcTjzNyOLaH8vMj3Mpihq63pA5jyp7eOIlpWp7t DtzeO4l78LWAX423XHA5+gOKIdrAXe1AlEEHa5oDOSWM6AWBGK/mF/OpyG00g5fnhdej IJjpZgzC3Pd+IUn5G7bAAaqfA4cW5W0tWuviP4ly3WhRtPUdm3AmT0qbNZ2EMZei8lRG q92ZeW2c7l3Kqpg5FSF4HV9clwc4BbPv7N7Etg2jbgLNy3fRkHXmGM8ctb4CNXa85Spg Ic+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=BnU9R4OOCMoxOu19YfLjACcEr3TMCmK9pmle1GpcXiY=; b=myVDtjOGJq93mPXs8Ji2nx4ick3w9TekJIwCcBJVvEZJu1djPk8C7EzjFYdnfsJ8vJ uAMMxPCVO1EzDG++ja1tWgdRKC0gzJbWd/B0NRW7dJauf98wizb8IRqos2NN4796+XmT GhQ6ToebrcXMKPideQpPyvOrPMkXMLvU1TwP5L8ZMjcjDZpmskCb5RyRbX5CyP7ul63P VyZ2hkj2WkrxhNMHbMCaFHs2MuJJIyjEvMm0kqlLU9us+d6cXguCZyam6olvoryCukG7 Mk2s1xBkTCV93BV+w3eEq1DRK80wHauRI/VoAk2+U59cUFBnGJjGMI0R60L/yUKMLLLG +soQ== X-Gm-Message-State: ACrzQf2hIxnh6AFOW8+Fw3xX4JzYaqSoicWKnHX8jH52TR8QcD4N5BX4 VryRX0JTvT4kixfFstBtnrRZtGsZqeU= X-Google-Smtp-Source: AMsMyM7neXTpgHwVbxMnJQHoICcB5V232AiZhjbclpKaLMnonVbkV0dJGKRuGnJUgQAZiyotXAXTdFgZP1I= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90b:1181:b0:203:ae0e:6a21 with SMTP id gk1-20020a17090b118100b00203ae0e6a21mr405202pjb.0.1663716725368; Tue, 20 Sep 2022 16:32:05 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:23 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-18-seanjc@google.com> Subject: [PATCH v3 17/28] KVM: x86: Skip redundant x2APIC logical mode optimized cluster setup From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Skip the optimized cluster[] setup for x2APIC logical mode, as KVM reuses the optimized map's phys_map[] and doesn't actually need to insert the target apic into the cluster[]. The LDR is derived from the x2APIC ID, and both are read-only in KVM, thus the vCPU's cluster[ldr] is guaranteed to be the same entry as the vCPU's phys_map[x2apic_id] entry. Skipping the unnecessary setup will allow a future fix for aliased xAPIC logical IDs to simply require that cluster[ldr] is non-NULL, i.e. won't have to special case x2APIC. Alternatively, the future check could allow "cluster[ldr] =3D=3D apic", but that ends up being terribly confusing because cluster[ldr] is only set at the very end, i.e. it's only possible due to x2APIC's shenanigans. Another alternative would be to send x2APIC down a separate path _after_ the calculation and then assert that all of the above, but the resulting code is rather messy, and it's arguably unnecessary since asserting that the actual LDR matches the expected LDR means that simply testing that interrupts are delivered correctly provides the same guarantees. Reported-by: Suravee Suthikulpanit Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 84b7a1c1834d..7a39d7be4cc9 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -166,6 +166,11 @@ static bool kvm_use_posted_timer_interrupt(struct kvm_= vcpu *vcpu) return kvm_can_post_timer_interrupt(vcpu) && vcpu->mode =3D=3D IN_GUEST_M= ODE; } =20 +static inline u32 kvm_apic_calc_x2apic_ldr(u32 id) +{ + return ((id >> 4) << 16) | (1 << (id & 0xf)); +} + static inline bool kvm_apic_map_get_logical_dest(struct kvm_apic_map *map, u32 dest_id, struct kvm_lapic ***cluster, u16 *mask) { switch (map->logical_mode) { @@ -315,6 +320,18 @@ void kvm_recalculate_apic_map(struct kvm *kvm) } new->logical_mode =3D logical_mode; =20 + /* + * In x2APIC mode, the LDR is read-only and derived directly + * from the x2APIC ID, thus is guaranteed to be addressable. + * KVM reuses kvm_apic_map.phys_map to optimize logical mode + * x2APIC interrupts by reversing the LDR calculation to get + * cluster of APICs, i.e. no additional work is required. + */ + if (apic_x2apic_mode(apic)) { + WARN_ON_ONCE(ldr !=3D kvm_apic_calc_x2apic_ldr(x2apic_id)); + continue; + } + if (WARN_ON_ONCE(!kvm_apic_map_get_logical_dest(new, ldr, &cluster, &mask))) { new->logical_mode =3D KVM_APIC_MODE_MAP_DISABLED; @@ -381,11 +398,6 @@ static inline void kvm_apic_set_dfr(struct kvm_lapic *= apic, u32 val) atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); } =20 -static inline u32 kvm_apic_calc_x2apic_ldr(u32 id) -{ - return ((id >> 4) << 16) | (1 << (id & 0xf)); -} - static inline void kvm_apic_set_x2apic_id(struct kvm_lapic *apic, u32 id) { u32 ldr =3D kvm_apic_calc_x2apic_ldr(id); --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7828C6FA82 for ; Tue, 20 Sep 2022 23:33:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231511AbiITXdK (ORCPT ); Tue, 20 Sep 2022 19:33:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44944 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231279AbiITXcJ (ORCPT ); Tue, 20 Sep 2022 19:32:09 -0400 Received: from mail-pj1-x1049.google.com (mail-pj1-x1049.google.com [IPv6:2607:f8b0:4864:20::1049]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF09F4B0DD for ; Tue, 20 Sep 2022 16:32:07 -0700 (PDT) Received: by mail-pj1-x1049.google.com with SMTP id o23-20020a17090aac1700b002006b02384fso7296646pjq.3 for ; Tue, 20 Sep 2022 16:32:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=bOqaUaJyqI3z8R7EROs3ckH7IV3vf21Y4AlyOgMQUZo=; b=ZZJ/8TUjBMyr2KLCj8eOdJ2dhuEEWsGbVkKnR5ZrnRuALq+3XMkFrL1FMkfwpqOi+G nifNhjyeZUTdoEi+0Q6iZ2S2BJMxVg9Vkf6laqKQi8xHg4s1cYdxxRJ4fRkYAEcXYjMt 5J802K6stGF8zcH+b2fkwJGh6vKICdcqpiBezd7GwvkzQad+mcuIO8Z2y7R1VMThvzM1 R+hnnoiZPn80BpvWrhAncqwr0nzXktn7ij3jpwCjDMBiH6qnzJmg6wkcqenCOPMKhFCu YmiQ7aH0LxOjvtpZ9cZ0eyKLqSgtqTLGpTH+7D2dhTgQcc0sMa/FAG3RbKSn2YoQ2uVb npPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=bOqaUaJyqI3z8R7EROs3ckH7IV3vf21Y4AlyOgMQUZo=; b=x5PvquSum7d4N28SOpQtDnl6YZcZGYH/FE3PoStzyw5FQSPGhgSRL+s0lCjtT9lQES uNwi6zIlCY6Yv8ZLMN01Tmkok8FPeOteNwMKimsU1FcwsaFFcp+88y9NdoAiljYVu7hv UJ2zm89sZmuM008rm/HoTLaDXfAf6TERZjVmM6xBzeL4xMAJr565GQFAUY57l3/Gxk+t XafQU9JO1Oh2AxlhxZy2grQ3jOsSzgWT0qbMxAG9hjkhk+te0grKDUHXdG/DSRX+e9Xx 6e14elz0KHgOyfQTZZZsuQdZLnZZZa0x4dRE+Np+/G7P+bOTiIJZa2jEpTDplEbso3Ze UCIw== X-Gm-Message-State: ACrzQf3qfNJ2dgbbdMgkePW6sCPP9y1c3/9vSo8W0yJHZS4vfmHC2ljl SRCtD48T44ETaTphCAA2fZ6Ta+wKlZA= X-Google-Smtp-Source: AMsMyM4VxJpTz8og5f4YXhJR9xCeJq1cJtncTXNnCfQzORrxjVwc26sG+xw2a9l7lQFaJD5fQg5XU0fKxPs= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:27a0:b0:54b:e645:d5d8 with SMTP id bd32-20020a056a0027a000b0054be645d5d8mr20734835pfb.86.1663716727284; Tue, 20 Sep 2022 16:32:07 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:24 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-19-seanjc@google.com> Subject: [PATCH v3 18/28] KVM: x86: Disable APIC logical map if logical ID covers multiple MDAs From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Disable the optimized APIC logical map if a logical ID covers multiple MDAs, i.e. if a vCPU has multiple bits set in its ID. In logical mode, events match if "ID & MDA !=3D 0", i.e. creating an entry for only the first bit can cause interrupts to be missed. Note, creating an entry for every bit is also wrong as KVM would generate IPIs for every matching bit. It would be possible to teach KVM to play nice with this edge case, but it is very much an edge case and probably not used in any real world OS, i.e. it's not worth optimizing. Fixes: 1e08ec4a130e ("KVM: optimize apic interrupt delivery") Signed-off-by: Sean Christopherson Reviewed-by: Maxim Levitsky --- arch/x86/kvm/lapic.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 7a39d7be4cc9..a12360fd4df6 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -338,8 +338,14 @@ void kvm_recalculate_apic_map(struct kvm *kvm) continue; } =20 - if (mask) - cluster[ffs(mask) - 1] =3D apic; + if (!mask) + continue; + + if (!is_power_of_2(mask)) { + new->logical_mode =3D KVM_APIC_MODE_MAP_DISABLED; + continue; + } + cluster[ffs(mask) - 1] =3D apic; } out: old =3D rcu_dereference_protected(kvm->arch.apic_map, --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 958BBC54EE9 for ; Tue, 20 Sep 2022 23:33:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231558AbiITXdU (ORCPT ); Tue, 20 Sep 2022 19:33:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231293AbiITXcK (ORCPT ); Tue, 20 Sep 2022 19:32:10 -0400 Received: from mail-pj1-x104a.google.com (mail-pj1-x104a.google.com [IPv6:2607:f8b0:4864:20::104a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80FB0785B5 for ; Tue, 20 Sep 2022 16:32:09 -0700 (PDT) Received: by mail-pj1-x104a.google.com with SMTP id ev16-20020a17090aead000b00202cf672e74so2324426pjb.2 for ; Tue, 20 Sep 2022 16:32:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=EpWQgthCzwVlN1+QDovdFCTrEnPbNzZiM48g8Uk0Cqs=; b=ICkmuWwmWjHn4KH3q8vaKoU16Z+bWz2DowxDhujdMEzB4uglAaJiFzMAss0+DLyuDO 4fNdkoSB8JYdRaGEpHnzEnhiq785DVElXgbyUcuOChJgA41emKrbWTngTVeVcueUoOgI YFHuQUcSCcics6ETwR02K4I0A+ZayxoP7IhtLDAWhxt7mlhQBg5v5y+/dS+zbD9eKIS4 rQPOwk/qRQTMyP9J2O2FiCtSr/VJBcZi6svRQL0s/afLyA7ZTzP/n4l95BkMARxEAs1z KLmOzY9/A/Vw1TJHiiN945z7KYKvMUzxuL4YY0HGjPCDBZkQ+IIua5Ey2487KkJLl4yD YLDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=EpWQgthCzwVlN1+QDovdFCTrEnPbNzZiM48g8Uk0Cqs=; b=YX8h6pUQIF4vw/GZ1dxXoY636IERmQWzX0merQKZHidbRo9wbb5bGfk+9uIXuZ0eJ1 qDfa3kjzxnG8IuudRwdkVPRi6U9VVNpbQqS2oW8rqDg8ZBVjXG0JX4zTOLkO2BkFnIlH 31i+c5KTgK272lW/vwh1IFRgVTo2JmXeBaD/pEuaF6FU4iS5FHCTmAgary7L+fAWlG9G 3AItbL+ajLMI9CzMcNfI66iPNO/SsqT76byzmFuWCx7O8j6U4jOQiz/P0mTwEE3mYA2Z FP0kzJu+82oj7156byPsDNs08iycnA0WU8ssyxu0FDrbJHp13lCO35ZdaAx06bTTcd8r OaWg== X-Gm-Message-State: ACrzQf1Nj671SRQxS0xU+zAmUdJTYp2RUQlnXtfZyeE9bw31SS4cNbbt 3aJqu89i2bxiDR/JNfruyY27fcju+CM= X-Google-Smtp-Source: AMsMyM64WYPPbsmc8kPNJpF8TVe2l1U1WthIbKGNZq82LyCgxeCwhItfCI6/KUPndfsknD2/gAtJHYvyGoM= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:7586:b0:172:d0de:7a3c with SMTP id j6-20020a170902758600b00172d0de7a3cmr2021687pll.38.1663716729065; Tue, 20 Sep 2022 16:32:09 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:25 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-20-seanjc@google.com> Subject: [PATCH v3 19/28] KVM: x86: Disable APIC logical map if vCPUs are aliased in logical mode From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Disable the optimized APIC logical map if multiple vCPUs are aliased to the same logical ID. Architecturally, all CPUs whose logical ID matches the MDA are supposed to receive the interrupt; overwriting existing map entries can result in missed IPIs. Fixes: 1e08ec4a130e ("KVM: optimize apic interrupt delivery") Signed-off-by: Sean Christopherson Reviewed-by: Maxim Levitsky --- arch/x86/kvm/lapic.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index a12360fd4df6..e447278d1986 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -341,11 +341,12 @@ void kvm_recalculate_apic_map(struct kvm *kvm) if (!mask) continue; =20 - if (!is_power_of_2(mask)) { + ldr =3D ffs(mask) - 1; + if (!is_power_of_2(mask) || cluster[ldr]) { new->logical_mode =3D KVM_APIC_MODE_MAP_DISABLED; continue; } - cluster[ffs(mask) - 1] =3D apic; + cluster[ldr] =3D apic; } out: old =3D rcu_dereference_protected(kvm->arch.apic_map, --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03881C6FA91 for ; Tue, 20 Sep 2022 23:33:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230116AbiITXdZ (ORCPT ); Tue, 20 Sep 2022 19:33:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45078 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231299AbiITXcM (ORCPT ); Tue, 20 Sep 2022 19:32:12 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4C22785AE for ; Tue, 20 Sep 2022 16:32:10 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id z7-20020a170903018700b0017835863686so2649726plg.11 for ; Tue, 20 Sep 2022 16:32:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=rTWaBPwz2/qNlI0UhodZEKKRNq3tjBG1e+PkMgoZ0tg=; b=oKlfB3thr/sXblrFDvi74UIewrbWkHY5kRCv1R9A8hrArpJUX30GPkTsgCDp1mfHnw rUlq7oVUhzdGd+fe9Zwty3Ougt0DY1qystlre6w2QNGh/53jaEIy29TGO6dA+U1qJlIP /kbDC6///FmBuRMX310eo1wo43zp134Ft+kFsgvrow7IYxsS49FLWP/3zzQJfuyMZyAv njLma4eaXZL1RmniT8QbVEU3no/pK6+mlVci9ddTQSowSIDEkus22+IN1n0elOepPHLY JPSE/M9NC/ssQNFHkeJwDlaAEHWsQc79GtFanHLF+HV8d/c5bsoxI7c1OxNAOqPJ9U8P vBQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=rTWaBPwz2/qNlI0UhodZEKKRNq3tjBG1e+PkMgoZ0tg=; b=gi0kAIMvuiNxGUszl48Vy/VFZeyQRTpVMDbgJ9397yBngvcqCX5ROAM0aG16wAV1nt LxW1fTamGLJsBpAqUFNzC5yb4g3cfP/pkZ7hC5+h6NFsTPRkbqc5nAKKy/R58WMevVII Xbv75kmIxfutNc0ljyZ9DpsR1qrIT7ZSEKd+6FTQueR0yHnr66wpn49XXJ4+dvc+ArBg zLhRtvXcik1apELaFGmbUdavHZQ2a8qoqF6cgtVX0sKQ2U+cq0M51wqJCmHK65m/OVW+ ed/Rn8yV9GrGD6n1FOtAkPOL3/C7HvPcBeR2Dt76YJKdl9ZaMPHt5KKCiGEHzFYWFUaO fP2A== X-Gm-Message-State: ACrzQf3oSuZ29Hf7tiS+iutMjSmOx6MLqv9wjEDHr9xiYlOLF+RaUZwC 0mOuvR/uBY7nhsoMUdDxEegf2Co46YI= X-Google-Smtp-Source: AMsMyM4V3pc2cKqI076/ChjACASYI/YZw4EK+gQ82lufp1Q+NZA9R6JRWx0McNN3uL/KQdo7atvkApl7cfo= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:903:1112:b0:178:a030:5f72 with SMTP id n18-20020a170903111200b00178a0305f72mr1982480plh.12.1663716730489; Tue, 20 Sep 2022 16:32:10 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:26 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-21-seanjc@google.com> Subject: [PATCH v3 20/28] KVM: x86: Honor architectural behavior for aliased 8-bit APIC IDs From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Apply KVM's hotplug hack if and only if userspace has enabled 32-bit IDs for x2APIC. If 32-bit IDs are not enabled, disable the optimized map to honor x86 architectural behavior if multiple vCPUs shared a physical APIC ID. As called out in the changelog that added the hack, all CPUs whose (possibly truncated) APIC ID matches the target are supposed to receive the IPI. KVM intentionally differs from real hardware, because real hardware (Knights Landing) does just "x2apic_id & 0xff" to decide whether to accept the interrupt in xAPIC mode and it can deliver one interrupt to more than one physical destination, e.g. 0x123 to 0x123 and 0x23. Applying the hack even when x2APIC is not fully enabled means KVM doesn't correctly handle scenarios where the guest has aliased xAPIC IDs across multiple vCPUs, as only the vCPU with the lowest vCPU ID will receive any interrupts. It's extremely unlikely any real world guest aliase APIC IDs, or even modifies APIC IDs, but KVM's behavior is arbitrary, e.g. the lowest vCPU ID "wins" regardless of which vCPU is "aliasing" and which vCPU is "normal". Furthermore, the hack is _not_ guaranteed to work! The hack works if and only if the optimized APIC map is successfully allocated. If the map allocation fails (unlikely), KVM will fall back to its unoptimized behavior, which _does_ honor the architectural behavior. Pivot on 32-bit x2APIC IDs being enabled as that is required to take advantage of the hotplug hack (see kvm_apic_state_fixup()), i.e. won't break existing setups unless they are way, way off in the weeds. And an entry in KVM's errata to document the hack. Alternatively, KVM could provide an actual x2APIC quirk and document the hack that way, but there's unlikely to ever be a use case for disabling the quirk. Go the errata route to avoid having to validate a quirk no one cares about. Fixes: 5bd5db385b3e ("KVM: x86: allow hotplug of VCPU with APIC ID over 0xf= f") Signed-off-by: Sean Christopherson --- Documentation/virt/kvm/x86/errata.rst | 11 ++++++ arch/x86/kvm/lapic.c | 50 ++++++++++++++++++++++----- 2 files changed, 52 insertions(+), 9 deletions(-) diff --git a/Documentation/virt/kvm/x86/errata.rst b/Documentation/virt/kvm= /x86/errata.rst index 410e0aa63493..49a05f24747b 100644 --- a/Documentation/virt/kvm/x86/errata.rst +++ b/Documentation/virt/kvm/x86/errata.rst @@ -37,3 +37,14 @@ Nested virtualization features ------------------------------ =20 TBD + +x2APIC +------ +When KVM_X2APIC_API_USE_32BIT_IDS is enabled, KVM activates a hack/quirk t= hat +allows sending events to a single vCPU using its x2APIC ID even if the tar= get +vCPU has legacy xAPIC enabled, e.g. to bring up hotplugged vCPUs via INIT-= SIPI +on VMs with > 255 vCPUs. A side effect of the quirk is that, if multiple = vCPUs +have the same physical APIC ID, KVM will deliver events targeting that API= C ID +only to the vCPU with the lowest vCPU ID. If KVM_X2APIC_API_USE_32BIT_IDS= is +not enabled, KVM follows x86 architecture when processing interrupts (all = vCPUs +matching the target APIC ID receive the interrupt). diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index e447278d1986..b344ab52556e 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -274,10 +274,10 @@ void kvm_recalculate_apic_map(struct kvm *kvm) struct kvm_lapic *apic =3D vcpu->arch.apic; struct kvm_lapic **cluster; enum kvm_apic_logical_mode logical_mode; + u32 x2apic_id, physical_id; u16 mask; u32 ldr; u8 xapic_id; - u32 x2apic_id; =20 if (!kvm_apic_present(vcpu)) continue; @@ -285,16 +285,48 @@ void kvm_recalculate_apic_map(struct kvm *kvm) xapic_id =3D kvm_xapic_id(apic); x2apic_id =3D kvm_x2apic_id(apic); =20 - /* Hotplug hack: see kvm_apic_match_physical_addr(), ... */ - if ((apic_x2apic_mode(apic) || x2apic_id > 0xff) && - x2apic_id <=3D new->max_apic_id) - new->phys_map[x2apic_id] =3D apic; /* - * ... xAPIC ID of VCPUs with APIC ID > 0xff will wrap-around, - * prevent them from masking VCPUs with APIC ID <=3D 0xff. + * Apply KVM's hotplug hack if userspace has enable 32-bit APIC + * IDs. Allow sending events to vCPUs by their x2APIC ID even + * if the target vCPU is in legacy xAPIC mode, and silently + * ignore aliased xAPIC IDs (the x2APIC ID is truncated to 8 + * bits, causing IDs > 0xff to wrap and collide). + * + * Honor the architectural (and KVM's non-optimized) behavior + * if userspace has not enabled 32-bit x2APIC IDs. Each APIC + * is supposed to process messages independently. If multiple + * vCPUs have the same effective APIC ID, e.g. due to the + * x2APIC wrap or because the guest manually modified its xAPIC + * IDs, events targeting that ID are supposed to be recognized + * by all vCPUs with said ID. */ - if (!apic_x2apic_mode(apic) && !new->phys_map[xapic_id]) - new->phys_map[xapic_id] =3D apic; + if (kvm->arch.x2apic_format) { + /* See also kvm_apic_match_physical_addr(). */ + if ((apic_x2apic_mode(apic) || x2apic_id > 0xff) && + x2apic_id <=3D new->max_apic_id) + new->phys_map[x2apic_id] =3D apic; + + if (!apic_x2apic_mode(apic) && !new->phys_map[xapic_id]) + new->phys_map[xapic_id] =3D apic; + } else { + /* + * Disable the optimized map if the physical APIC ID is + * already mapped, i.e. is aliased to multiple vCPUs. + * The optimized map requires a strict 1:1 mapping + * between IDs and vCPUs. + */ + if (apic_x2apic_mode(apic)) + physical_id =3D x2apic_id; + else + physical_id =3D xapic_id; + + if (new->phys_map[physical_id]) { + kvfree(new); + new =3D NULL; + goto out; + } + new->phys_map[physical_id] =3D apic; + } =20 if (new->logical_mode =3D=3D KVM_APIC_MODE_MAP_DISABLED || !kvm_apic_sw_enabled(apic)) --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A63BC54EE9 for ; Tue, 20 Sep 2022 23:33:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231576AbiITXd2 (ORCPT ); Tue, 20 Sep 2022 19:33:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46148 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231232AbiITXce (ORCPT ); Tue, 20 Sep 2022 19:32:34 -0400 Received: from mail-pf1-x44a.google.com (mail-pf1-x44a.google.com [IPv6:2607:f8b0:4864:20::44a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82FE8786F6 for ; Tue, 20 Sep 2022 16:32:12 -0700 (PDT) Received: by mail-pf1-x44a.google.com with SMTP id k19-20020a056a00135300b0054096343fc6so2505973pfu.10 for ; Tue, 20 Sep 2022 16:32:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=g79qUsYaWi35oGsfhRv6mmj8mg5DWdHzyNJhsg4wv1U=; b=hK3090xNbEEAnH2ylBAx4vDXE98QTnHl+P7+5k+euLTCeFTJSirCLZhWk9JDzQ9I8Y S+FsgUh+YE//NEaNGciDy7xPDaKvtjALTFBaeLcvlbD1Lef1S+5UX40jzItqVf3GlYq5 ilS9sudcfDC+B7t/Ck/O+5qseLAKjJ4ZzSivJLJYubWpm21tSXHfc4FTpHiVPxLRezLJ Tw55NDd4PTuKyZXndJkDXcmk7+r5BUtQs9BczQkNxwoav4SLqmx5It3z8K4b09YN8gPZ HhQ7p1CJ/69KF7fm6MT5VfC6hfzet5ZSWc6gldJH2mkWTgyk/ncjTqyaOHFlhyLm3PS9 vjQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=g79qUsYaWi35oGsfhRv6mmj8mg5DWdHzyNJhsg4wv1U=; b=B6U/U+znOfLy9C/qo3anccsihFo4K+Zz31mJmMnuqbkyMuWEnTb7dUCVzAUGEylVg4 lGQzXeF8GuAiAjs0TcSKV95NDYgyIZV1T9hmhShAemsnD6OKAVSCXtsR2AxR4YvfBlA/ tTZX6NxrNn1MhYWArCZ3iBus3NzVZzDw3jhPDF0/HBvcKJXcA1Ue0RB85M5/LwvcG6Sr MKal4VqZVUSUR+MZZUOBe9lbfWEIk4HL1VGNDvUvsgkZVEMVpkDDDogyFEfNEaOLmcLC c9WEtWEUyg45g+kUrMPiMGQy46AL5DxEXx12ARXDagOYV8sVZiIxj+q0Ek2G2cg7Jnxp FrTQ== X-Gm-Message-State: ACrzQf2VWcDO91+uYxmBY92XdgrVwE0/jibrunS+8X7Ul4GceHsQ8R0A vM89X9z5ym4KnKYtzNetf5bybgUA0cQ= X-Google-Smtp-Source: AMsMyM4T+0uGRWLvUovEbMN3yV1wo9usbWAkNU8jPpUn8DEKDDnv55anNtH7szbeb0HOG1dxEUj7l7LV5jE= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a63:3d82:0:b0:43b:d646:1bb5 with SMTP id k124-20020a633d82000000b0043bd6461bb5mr3432423pga.620.1663716731774; Tue, 20 Sep 2022 16:32:11 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:27 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-22-seanjc@google.com> Subject: [PATCH v3 21/28] KVM: x86: Inhibit APICv/AVIC if the optimized physical map is disabled From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Inhibit APICv/AVIC if the optimized physical map is disabled so that KVM KVM provides consistent APIC behavior if xAPIC IDs are aliased due to vcpu_id being truncated and the x2APIC hotplug hack isn't enabled. If the hotplug hack is disabled, events that are emulated by KVM will follow architectural behavior (all matching vCPUs receive events, even if the "match" is due to truncation), whereas APICv and AVIC will deliver events only to the first matching vCPU, i.e. the vCPU that matches without truncation. Note, the "extra" inhibit is needed because KVM deliberately ignores mismatches due to truncation when applying the APIC_ID_MODIFIED inhibit so that large VMs (>255 vCPUs) can run with APICv/AVIC. Fixes: TDB Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_host.h | 6 ++++++ arch/x86/kvm/lapic.c | 13 ++++++++++++- arch/x86/kvm/svm/avic.c | 1 + arch/x86/kvm/vmx/vmx.c | 1 + 4 files changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 6570b5d728ef..594674eefe59 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1097,6 +1097,12 @@ enum kvm_apicv_inhibit { */ APICV_INHIBIT_REASON_BLOCKIRQ, =20 + /* + * APICv is disabled because not all vCPUs have a 1:1 mapping between + * APIC ID and vCPU, _and_ KVM is not applying its x2APIC hotplug hack. + */ + APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED, + /* * For simplicity, the APIC acceleration is inhibited * first time either APIC ID or APIC base are changed by the guest diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index b344ab52556e..4db162b1f0b1 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -381,6 +381,16 @@ void kvm_recalculate_apic_map(struct kvm *kvm) cluster[ldr] =3D apic; } out: + /* + * The optimized map is effectively KVM's internal version of APICv, + * and all unwanted aliasing that results in disabling the optimized + * map also applies to APICv. + */ + if (!new) + kvm_set_apicv_inhibit(kvm, APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED); + else + kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED); + old =3D rcu_dereference_protected(kvm->arch.apic_map, lockdep_is_held(&kvm->arch.apic_map_lock)); rcu_assign_pointer(kvm->arch.apic_map, new); @@ -2150,7 +2160,8 @@ static void kvm_lapic_xapic_id_updated(struct kvm_lap= ic *apic) /* * Deliberately truncate the vCPU ID when detecting a modified APIC ID * to avoid false positives if the vCPU ID, i.e. x2APIC ID, is a 32-bit - * value. + * value. If the wrap/truncation results in unwatned aliasing, APICv + * will be inhibited as part of updating KVM's optimized APIC maps. */ if (kvm_xapic_id(apic) =3D=3D (u8)apic->vcpu->vcpu_id) return; diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index dd0e41d454a7..2908adc79ea6 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -965,6 +965,7 @@ bool avic_check_apicv_inhibit_reasons(enum kvm_apicv_in= hibit reason) BIT(APICV_INHIBIT_REASON_PIT_REINJ) | BIT(APICV_INHIBIT_REASON_BLOCKIRQ) | BIT(APICV_INHIBIT_REASON_SEV) | + BIT(APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED) | BIT(APICV_INHIBIT_REASON_APIC_ID_MODIFIED) | BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED) | BIT(APICV_INHIBIT_REASON_X2APIC); diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index b39095ef9bd7..0f9f8ae59f85 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -7963,6 +7963,7 @@ static bool vmx_check_apicv_inhibit_reasons(enum kvm_= apicv_inhibit reason) BIT(APICV_INHIBIT_REASON_ABSENT) | BIT(APICV_INHIBIT_REASON_HYPERV) | BIT(APICV_INHIBIT_REASON_BLOCKIRQ) | + BIT(APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED) | BIT(APICV_INHIBIT_REASON_APIC_ID_MODIFIED) | BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED); =20 --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88D1BC54EE9 for ; Tue, 20 Sep 2022 23:33:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231598AbiITXdr (ORCPT ); Tue, 20 Sep 2022 19:33:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231437AbiITXcp (ORCPT ); Tue, 20 Sep 2022 19:32:45 -0400 Received: from mail-pg1-x549.google.com (mail-pg1-x549.google.com [IPv6:2607:f8b0:4864:20::549]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A06178BD7 for ; Tue, 20 Sep 2022 16:32:15 -0700 (PDT) Received: by mail-pg1-x549.google.com with SMTP id w1-20020a63d741000000b0042c254a4ccdso2461622pgi.15 for ; Tue, 20 Sep 2022 16:32:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=vsB2EXY9q1cnnbhcdlWF5rsjKI75izh6EDAPIDxJ6Xw=; b=bAJ+timLm9bQ/xjMToD+8hIRKEhT5G4/eow6iqd/oCrUU1Th682zYJLp9CmuweIK+h FHkCiCip6gMjjAmhl2K7/108Tk2/avuol43nXGBGrDH2Chjck4ekNFs9GbOcLBpGr+CN pxIPOdfDGkQBLyU/QwhsjLPiFmhH4f5M5EHNq4C+yjFn8xRBjIXPfL9XCbGAsTW57WEt AmO2zcCd6MtrTPUjfRxCOPtLhmCiFIugUbtHd9bSDMQvj2NzYZDDtNQU/YXynKdm17eb iV2aaTyeIA5FUasRIARSCaYhFE2Zbe1Qp4qwdFp6/BuDFKcW762bIk9Pfg8vFfbu7l5k WdCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=vsB2EXY9q1cnnbhcdlWF5rsjKI75izh6EDAPIDxJ6Xw=; b=Cs32pYA5BVmRqAk7RXN3j/AXf2jP9jW1wWRFJc7fjMbKVHDM/G4rV+i75X1yONDNIK Frp7u73Uaaket/jDBcNX+jCi5YGcRf9i8MIu/5S5yIIW6Tpj1SfmDiCsnS3FvBSaWaeL 46itxtxQQOBxd72PnAMkwbkquPg0J7GcHxa4y/w7rkOy/SFob1R1Xh6SMQwMa5qHppPD fxQwcn8ePTYSUNXd4Yqpz6kAP2Y7xK0EKhqIda61oIjjbs5ql6PsgAxKQpdJePqbd8lT J8rhZagI/p9M/RIRWHLnA48+86TRtoQ0QQM7046jstdeU0SnNKGBDFnToHR1Meppae0u xMBQ== X-Gm-Message-State: ACrzQf3D5hGItSoN8USy9cZMYGsc2VycOgTggH/1cMngRp4uQFHIFU3J 48Bev1aYpLZZ17mpY3dHQgQ3Ml6buJU= X-Google-Smtp-Source: AMsMyM6gwxE+9V1iUOnFoB3jGYRREssKhetvh4T5MdU4y0U/leMrubqM0MU6KrMORuQPVeU27W//QbTQbSU= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90b:10a:b0:200:2849:235f with SMTP id p10-20020a17090b010a00b002002849235fmr524276pjz.1.1663716733523; Tue, 20 Sep 2022 16:32:13 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:28 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-23-seanjc@google.com> Subject: [PATCH v3 22/28] KVM: SVM: Inhibit AVIC if vCPUs are aliased in logical mode From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Inhibit SVM's AVIC if multiple vCPUs are aliased to the same logical ID. Architecturally, all CPUs whose logical ID matches the MDA are supposed to receive the interrupt; overwriting existing entries in AVIC's logical=3D>physical map can result in missed IPIs. Fixes: 18f40c53e10f ("svm: Add VMEXIT handlers for AVIC") Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_host.h | 6 ++++++ arch/x86/kvm/lapic.c | 5 +++++ arch/x86/kvm/svm/avic.c | 3 ++- 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 594674eefe59..32c0bca052e3 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1152,6 +1152,12 @@ enum kvm_apicv_inhibit { * APIC base. For simplicity, this is sticky. */ APICV_INHIBIT_REASON_X2APIC, + + /* + * AVIC is disabled because not all vCPUs with a valid LDR have a 1:1 + * mapping between logical ID and vCPU. + */ + APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED, }; =20 struct kvm_arch { diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 4db162b1f0b1..804d529d9bfb 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -391,6 +391,11 @@ void kvm_recalculate_apic_map(struct kvm *kvm) else kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED); =20 + if (!new || new->logical_mode =3D=3D KVM_APIC_MODE_MAP_DISABLED) + kvm_set_apicv_inhibit(kvm, APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED); + else + kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED); + old =3D rcu_dereference_protected(kvm->arch.apic_map, lockdep_is_held(&kvm->arch.apic_map_lock)); rcu_assign_pointer(kvm->arch.apic_map, new); diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 2908adc79ea6..27d5abc15a91 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -968,7 +968,8 @@ bool avic_check_apicv_inhibit_reasons(enum kvm_apicv_in= hibit reason) BIT(APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED) | BIT(APICV_INHIBIT_REASON_APIC_ID_MODIFIED) | BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED) | - BIT(APICV_INHIBIT_REASON_X2APIC); + BIT(APICV_INHIBIT_REASON_X2APIC) | + BIT(APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED); =20 return supported & BIT(reason); } --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11D0AC54EE9 for ; Tue, 20 Sep 2022 23:33:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231267AbiITXdv (ORCPT ); Tue, 20 Sep 2022 19:33:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231455AbiITXct (ORCPT ); Tue, 20 Sep 2022 19:32:49 -0400 Received: from mail-pg1-x549.google.com (mail-pg1-x549.google.com [IPv6:2607:f8b0:4864:20::549]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97BD078BED for ; Tue, 20 Sep 2022 16:32:16 -0700 (PDT) Received: by mail-pg1-x549.google.com with SMTP id q188-20020a632ac5000000b004393cb3da9cso2447535pgq.3 for ; Tue, 20 Sep 2022 16:32:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=5PPiHmOlyBinhsVtkg4FLSXk3S2F6RJIaf8EEfXCkkQ=; b=jUuxCAKHOyyYp3PG4HHDfuIcy4xUpMFWycUNM2JeRtue3zQlBTNhkNr8Gd7U2FTM0N zWbfderN7vCQ68VH2UOwVB5cnT3PtAkYifqa2ZVh+JepTi/UGrCvLhN/q/gBs3FVOnsb WUEdb7sod9Ypmx9HX9ymuKeE24+uymIphp12PfPUVgpPc47XAECyPbtXy5MRF8Vs7xY4 BOUtuHewNgayEOV+wP5fje3Tmqw7q9b2FpWKxTEIv9SMpfU9zMA4k0LAjvDL8/cPYeKC /8rn52bZexvIms5fpXQOFcVSFVvMPmBZwe84VN9w9EXUkgT7nGH8R2Sh3LXScDXSbPLi 9slg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=5PPiHmOlyBinhsVtkg4FLSXk3S2F6RJIaf8EEfXCkkQ=; b=M+wuB/Bo/K71v9H19UdCTYYxUxOsa2H6Nnzkv/JgpzoM25/j6cixveQxWpLZr65eIF TgErovLGhVhcsf4Ke6eesfGOH0ZDPmY5YHJtw12gpu/w6M6dVbmBwUK/FC/9+NggKos+ gNFulzph+RciAE32cguHF6r1PLkmMHDuT/RkfmNt7+33F2FSKoE0l92tujHwVOP0F/t+ 2DOaBHdjKbFH7a+Re7ck79IYWbKfN6W5wKfc5cc8i2+HTK2uYI+PKrqbeji3eRd9mkNT pJzr74PYajUMziUOXC7+OS95PEX70bSkqckTu0RrhoRCg5sc/yrRiA1TXQ6B/XjC+JjB 3vQw== X-Gm-Message-State: ACrzQf0Y5NC0nHZwen7uk6/dOsSz5HM5NPxC6mC24aPalG4+n7BJzdAg FV5vlnCPgaj0ZJ5L06Dgm6FFLpUGtC8= X-Google-Smtp-Source: AMsMyM4xBVaTeZv3hBwTLr49+Dfwlb5OEp1MqWuMfp24/e4oTNBNZyUdM7jvieIgly5g/xSVZvrP32vQVh8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90b:1181:b0:203:ae0e:6a21 with SMTP id gk1-20020a17090b118100b00203ae0e6a21mr405253pjb.0.1663716735563; Tue, 20 Sep 2022 16:32:15 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:29 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-24-seanjc@google.com> Subject: [PATCH v3 23/28] KVM: SVM: Always update local APIC on writes to logical dest register From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update the vCPU's local (virtual) APIC on LDR writes even if the write "fails". The APIC needs to recalc the optimized logical map even if the LDR is invalid or zero, e.g. if the guest clears its LDR, the optimized map will be left as is and the vCPU will receive interrupts using its old LDR. Fixes: 18f40c53e10f ("svm: Add VMEXIT handlers for AVIC") Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 27d5abc15a91..2b640c73f447 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -573,7 +573,7 @@ static void avic_invalidate_logical_id_entry(struct kvm= _vcpu *vcpu) clear_bit(AVIC_LOGICAL_ID_ENTRY_VALID_BIT, (unsigned long *)entry); } =20 -static int avic_handle_ldr_update(struct kvm_vcpu *vcpu) +static void avic_handle_ldr_update(struct kvm_vcpu *vcpu) { int ret =3D 0; struct vcpu_svm *svm =3D to_svm(vcpu); @@ -582,10 +582,10 @@ static int avic_handle_ldr_update(struct kvm_vcpu *vc= pu) =20 /* AVIC does not support LDR update for x2APIC */ if (apic_x2apic_mode(vcpu->arch.apic)) - return 0; + return; =20 if (ldr =3D=3D svm->ldr_reg) - return 0; + return; =20 avic_invalidate_logical_id_entry(vcpu); =20 @@ -594,8 +594,6 @@ static int avic_handle_ldr_update(struct kvm_vcpu *vcpu) =20 if (!ret) svm->ldr_reg =3D ldr; - - return ret; } =20 static void avic_handle_dfr_update(struct kvm_vcpu *vcpu) @@ -617,8 +615,7 @@ static int avic_unaccel_trap_write(struct kvm_vcpu *vcp= u) =20 switch (offset) { case APIC_LDR: - if (avic_handle_ldr_update(vcpu)) - return 0; + avic_handle_ldr_update(vcpu); break; case APIC_DFR: avic_handle_dfr_update(vcpu); --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 570C1C54EE9 for ; Tue, 20 Sep 2022 23:34:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231540AbiITXeC (ORCPT ); Tue, 20 Sep 2022 19:34:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47944 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231519AbiITXdR (ORCPT ); Tue, 20 Sep 2022 19:33:17 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D00AF792C3 for ; Tue, 20 Sep 2022 16:32:17 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id b11-20020a170902d50b00b0017828988079so2642035plg.21 for ; Tue, 20 Sep 2022 16:32:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=OkHaILPvf1HA3nSnkTLahu7Ca4yPvuSnba/nduwob0E=; b=JH7dhQqG5zTordzAfDTjeeBqvOVulWkZMQkCj92ds5fDKJctEQpS1Sv3CkJnu1WTt/ waumob7YC3YkW2No77geghKOYxno/ivyNgL6wfn0SiPGQikVvno2hyg+pIS0sS3D04yz YgCEq7sc+VX23Z0Y6bqT5ifVv9YSLKz0ncyH+ljSBH+GuihbAiJ/87bSM7UIiZe9nQlT vVJkhzpeopjaiYzSkDy1GFFxK1K2ir73Oro948CDDvtt3TAiafJh4oovyc6b1lvmDHnK IcrsgJ0OqqOPfJP0FwYuJv0+AND6N5/loC4otkORzVStY8tIeD7cscocVY9jojhQ8fXs 5qlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=OkHaILPvf1HA3nSnkTLahu7Ca4yPvuSnba/nduwob0E=; b=Jd9M9I3pL5tPM0Md0p4EObyXg+q7vws9VtaaCC/05Q4Te1J7XHfmpz/s9RQoAs/crG TTtd2uJ87P2gClSBpx5iqFJVJEd/kCJQO7Eh6Qzw3CDctBLbsg/7eE0U9lWAeIQ7WDe8 YBfY9bhsoS7n6DvolwAaJQJEC/gE0Omiv+c5skZwkjHV+aoM91f0PntMCO2G9kkhE0TY TRDNh0wGmxaCiqZAeuhF4WpWfcG7e/FEvKLVpS6yEEkzkg9IL73OxQNnxa0qa7sJ0CGq lfmCT6f0i0UEECM2p1ogN9sVvpPIF1U/4tNWD6QNoyHwRMadbM0Bw58CsFhR/t/wXFQW /3Nw== X-Gm-Message-State: ACrzQf2nXNKoHFyFEdY9pBmkRuCthCVDAkU4APSkR4vnLRGuNg1r2ePa Q8s5674vDkoBTeFnnBjAUoNDVfhTlu0= X-Google-Smtp-Source: AMsMyM4R7AbZyJkDw21beG1HAE7KQ6sHhNkRMrKQLrpn+MKOwqmcxuUPKFb961xEmvUyQ/9ccIM+ko3AEnc= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:230f:b0:53e:2c2c:5c03 with SMTP id h15-20020a056a00230f00b0053e2c2c5c03mr25714349pfh.11.1663716737387; Tue, 20 Sep 2022 16:32:17 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:30 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-25-seanjc@google.com> Subject: [PATCH v3 24/28] KVM: SVM: Update svm->ldr_reg cache even if LDR is "bad" From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update SVM's cache of the LDR even if the new value is "bad". Leaving stale information in the cache can result in KVM missing updates and/or invalidating the wrong entry, e.g. if avic_invalidate_logical_id_entry() is triggered after a different vCPU has "claimed" the old LDR. Fixes: 18f40c53e10f ("svm: Add VMEXIT handlers for AVIC") Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 2b640c73f447..4b6fc9d64f4d 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -539,23 +539,24 @@ static u32 *avic_get_logical_id_entry(struct kvm_vcpu= *vcpu, u32 ldr, bool flat) return &logical_apic_id_table[index]; } =20 -static int avic_ldr_write(struct kvm_vcpu *vcpu, u8 g_physical_id, u32 ldr) +static void avic_ldr_write(struct kvm_vcpu *vcpu, u8 g_physical_id, u32 ld= r) { bool flat; u32 *entry, new_entry; =20 + if (!ldr) + return; + flat =3D kvm_lapic_get_reg(vcpu->arch.apic, APIC_DFR) =3D=3D APIC_DFR_FLA= T; entry =3D avic_get_logical_id_entry(vcpu, ldr, flat); if (!entry) - return -EINVAL; + return; =20 new_entry =3D READ_ONCE(*entry); new_entry &=3D ~AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK; new_entry |=3D (g_physical_id & AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_M= ASK); new_entry |=3D AVIC_LOGICAL_ID_ENTRY_VALID_MASK; WRITE_ONCE(*entry, new_entry); - - return 0; } =20 static void avic_invalidate_logical_id_entry(struct kvm_vcpu *vcpu) @@ -575,7 +576,6 @@ static void avic_invalidate_logical_id_entry(struct kvm= _vcpu *vcpu) =20 static void avic_handle_ldr_update(struct kvm_vcpu *vcpu) { - int ret =3D 0; struct vcpu_svm *svm =3D to_svm(vcpu); u32 ldr =3D kvm_lapic_get_reg(vcpu->arch.apic, APIC_LDR); u32 id =3D kvm_xapic_id(vcpu->arch.apic); @@ -589,11 +589,8 @@ static void avic_handle_ldr_update(struct kvm_vcpu *vc= pu) =20 avic_invalidate_logical_id_entry(vcpu); =20 - if (ldr) - ret =3D avic_ldr_write(vcpu, id, ldr); - - if (!ret) - svm->ldr_reg =3D ldr; + svm->ldr_reg =3D ldr; + avic_ldr_write(vcpu, id, ldr); } =20 static void avic_handle_dfr_update(struct kvm_vcpu *vcpu) --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B8F1C54EE9 for ; Tue, 20 Sep 2022 23:34:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231626AbiITXeZ (ORCPT ); Tue, 20 Sep 2022 19:34:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231437AbiITXdt (ORCPT ); Tue, 20 Sep 2022 19:33:49 -0400 Received: from mail-pg1-x54a.google.com (mail-pg1-x54a.google.com [IPv6:2607:f8b0:4864:20::54a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBF80792CA for ; Tue, 20 Sep 2022 16:32:30 -0700 (PDT) Received: by mail-pg1-x54a.google.com with SMTP id d5-20020a63fd05000000b0043be829b589so215595pgh.20 for ; Tue, 20 Sep 2022 16:32:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=IwIDRB2fdBDsWatYvvn/b5WepxQQ5yAW/agrrgEdwWA=; b=g5gYWoKJoWP2RKZ3tCd/tFFumUE5tJ+17slStwiTofUeIt1XFXEgUug1yMs9fCzmv0 GtpIf5KmYiUj7YVwZYueywqj7c7Wcs3DcsciGcOOJ4Eck11+wyMYKSrYU+12WSAHPHyZ 01yND6PkWOjj0UhoJ3OOkuWCURQdbGpnDVkAjr0otE6fa5IYI6UWr/5OlIVYTIcpVGxp 97r8c5kTc0JzaB4w69EDF4ZAzdJx+AFs0OT0H2EjuYcpcy7fcP4W/TPihb3yUXdnvhfm qjsaOzYq7GMFxrDydVy9cxVBPCFZ9tSEB6I7DDORbMewr95GvUbnsL+BJRNzPtrouVXH Vlag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=IwIDRB2fdBDsWatYvvn/b5WepxQQ5yAW/agrrgEdwWA=; b=0GAF41Ex0vYQ7/5gO0KiGMf6X61NRnOL+ZNqGFxzeO4/4VDJCzMFFNLZ58LNMy2ujl D6NgRYXJlSJNB8bZFPGemi5FRvk+cZW03yCA8kzXhV2X7jKC2ysbW1BvHoVOW3mt/IaL /tUyrCPCdxdBuAYXRaPvfzr3Dp6bnGgvN8SyOAwWNLfyWKPI8gmHfo4z46nS41K7QHrj Ke/uprRmLhaAcnLGLmBcuWPODLohdQYkoOOokBnAuK1D+yydLD73jk376+D6xZc1NgE7 R8weQ6qJFG9SFIWdmm1emqXuFOpizyXgAQkKVYuiCsaKvKQ+SmpQ/hsm+4H8cw00iKrz 37Sg== X-Gm-Message-State: ACrzQf13Rm3dIbz+4FqnltjCPiavn117mf2XqE6q1AKTU8RQ3k2ICWtq e7CPeG5Vv7m9gV18WKxdaFZ6DO+fjl4= X-Google-Smtp-Source: AMsMyM6Ifd/fZX0J5EwCgTEYcvX7LrIRtY5UFKVCalU9/wioZU7W+kaizfcv0gYwyjWidSPJAaZcixpUHss= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a62:2983:0:b0:54e:7cd5:adb3 with SMTP id p125-20020a622983000000b0054e7cd5adb3mr13239877pfp.38.1663716739239; Tue, 20 Sep 2022 16:32:19 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:31 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-26-seanjc@google.com> Subject: [PATCH v3 25/28] KVM: SVM: Require logical ID to be power-of-2 for AVIC entry From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Do not modify AVIC's logical ID table if the logical ID portion of the LDR is not a power-of-2, i.e. if the LDR has multiple bits set. Taking only the first bit means that KVM will fail to match MDAs that intersect with "higher" bits in the "ID" The "ID" acts as a bitmap, but is referred to as an ID because theres an implicit, unenforced "requirement" that software only set one bit. This edge case is arguably out-of-spec behavior, but KVM cleanly handles it in all other cases, e.g. the optimized logical map (and AVIC!) is also disabled in this scenario. Refactor the code to consolidate the checks, and so that the code looks more like avic_kick_target_vcpus_fast(). Fixes: 18f40c53e10f ("svm: Add VMEXIT handlers for AVIC") Cc: Suravee Suthikulpanit Cc: Maxim Levitsky Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 4b6fc9d64f4d..a9e4e09f83fc 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -513,26 +513,26 @@ unsigned long avic_vcpu_get_apicv_inhibit_reasons(str= uct kvm_vcpu *vcpu) static u32 *avic_get_logical_id_entry(struct kvm_vcpu *vcpu, u32 ldr, bool= flat) { struct kvm_svm *kvm_svm =3D to_kvm_svm(vcpu->kvm); - int index; u32 *logical_apic_id_table; - int dlid =3D GET_APIC_LOGICAL_ID(ldr); + u32 cluster, index; =20 - if (!dlid) - return NULL; + ldr =3D GET_APIC_LOGICAL_ID(ldr); =20 - if (flat) { /* flat */ - index =3D ffs(dlid) - 1; - if (index > 7) + if (flat) { + cluster =3D 0; + } else { + cluster =3D (ldr >> 4) << 2; + if (cluster >=3D 0xf) return NULL; - } else { /* cluster */ - int cluster =3D (dlid & 0xf0) >> 4; - int apic =3D ffs(dlid & 0x0f) - 1; - - if ((apic < 0) || (apic > 7) || - (cluster >=3D 0xf)) - return NULL; - index =3D (cluster << 2) + apic; + ldr &=3D 0xf; } + if (!ldr || !is_power_of_2(ldr)) + return NULL; + + index =3D __ffs(ldr); + if (WARN_ON_ONCE(index > 7)) + return NULL; + index +=3D (cluster << 2); =20 logical_apic_id_table =3D (u32 *) page_address(kvm_svm->avic_logical_id_t= able_page); =20 --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8901C6FA82 for ; Tue, 20 Sep 2022 23:34:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231546AbiITXeI (ORCPT ); Tue, 20 Sep 2022 19:34:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231543AbiITXdT (ORCPT ); Tue, 20 Sep 2022 19:33:19 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6F14792F1 for ; Tue, 20 Sep 2022 16:32:21 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id z7-20020a170903018700b0017835863686so2649964plg.11 for ; Tue, 20 Sep 2022 16:32:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=Y2mxingAcVD8OpNkNaphL85hmhgxmTn5FoNS+KNkw44=; b=VXXXTJ7BYRbG6nlbu1VrzgvdMyEqH7d/1MLymukG0AlmT4n6X+NbTQ2lFJp6AUgihb UckV68pN4vFFgBWpSSt/yDj6/ng/oKfte/WZ5xOa8GbxHNBEfVoh8SPINEhER0Ua2xHk O0Ms8lYzWhIujGxRPPN2w83e1Q0De5DOxpUtg/vysHiYXbDOBCQaBl48QatM9IakooKt GO9+EVhJezFOvESkn4ty5fpDAPYLdBqypAurI/smVBYREQCLwqo0HQktgM8wVw152Lac KotVR95bDLBcLpsG70H3qyLzpOB9ZblrhY3MZESQqjW0sovtqQ3UIFGyrWuFC6Cw/49Z HTyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=Y2mxingAcVD8OpNkNaphL85hmhgxmTn5FoNS+KNkw44=; b=cqlms4PKV7aCZNsSc51DKFQDoHpsa0W4dt1a6H/vRYxsdsK5644A9HD1oJIi3vLwVq 5bE1QQgrS3lBLrVEpS1YIs7sKJQIIwyuwUwhaHSEOVdYW9Et4B49YII+i2W3+hNap4UJ FUNry2RKVlpp1kDQ8q0T2gC7GqE2doTBMUukIAHRGu60RydNEqO3jTpFil2RwSML8Mf8 fSdxBDYnhgfq3HTZ/ZH21eGoVkaLjGNokIDzOXyDrBNriyt8DvJhwfs9bE1QQFRtN3Pz gJqbj4GC131Fj3igVfRpwOwMYzLUyhrz2A2nXxWi6NetcrpHqCcFezHqeVmwlO2l+xR0 sEcA== X-Gm-Message-State: ACrzQf1YVNhMqOoVeb4jquKg+ki1U4yeR4sM+UHgXe7en5ndUflsidz+ GGdTpl/1mBiJOFw5+qYXrhQTg7Y5aSQ= X-Google-Smtp-Source: AMsMyM45cFB+sFZ2HPiwgd8z39M26jt6cxDGyOAb+0DvcJ/ne4uMQy089f0gQoOJSHIg70PjLvXy5xmNUME= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:903:2104:b0:176:a9ef:418b with SMTP id o4-20020a170903210400b00176a9ef418bmr1946412ple.134.1663716741153; Tue, 20 Sep 2022 16:32:21 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:32 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-27-seanjc@google.com> Subject: [PATCH v3 26/28] KVM: SVM: Handle multiple logical targets in AVIC kick fastpath From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Iterate over all target logical IDs in the AVIC kick fastpath instead of bailing if there is more than one target. Now that KVM inhibits AVIC if vCPUs aren't mapped 1:1 with logical IDs, each bit in the destination is guaranteed to match to at most one vCPU, i.e. iterating over the bitmap is guaranteed to kick each valid target exactly once. Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 112 ++++++++++++++++++++++------------------ 1 file changed, 63 insertions(+), 49 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index a9e4e09f83fc..17e64b056e4e 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -327,6 +327,50 @@ static void avic_kick_vcpu(struct kvm_vcpu *vcpu, u32 = icrl) icrl & APIC_VECTOR_MASK); } =20 +static void avic_kick_vcpu_by_physical_id(struct kvm *kvm, u32 physical_id, + u32 icrl) +{ + /* + * KVM inhibits AVIC if any vCPU ID diverges from the vCPUs APIC ID, + * i.e. APIC ID =3D=3D vCPU ID. + */ + struct kvm_vcpu *target_vcpu =3D kvm_get_vcpu_by_id(kvm, physical_id); + + /* Once again, nothing to do if the target vCPU doesn't exist. */ + if (unlikely(!target_vcpu)) + return; + + avic_kick_vcpu(target_vcpu, icrl); +} + +static void avic_kick_vcpu_by_logical_id(struct kvm *kvm, u32 *avic_logica= l_id_table, + u32 logid_index, u32 icrl) +{ + u32 physical_id; + + if (avic_logical_id_table) { + u32 logid_entry =3D avic_logical_id_table[logid_index]; + + /* Nothing to do if the logical destination is invalid. */ + if (unlikely(!(logid_entry & AVIC_LOGICAL_ID_ENTRY_VALID_MASK))) + return; + + physical_id =3D logid_entry & + AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK; + } else { + /* + * For x2APIC, the logical APIC ID is a read-only value that is + * derived from the x2APIC ID, thus the x2APIC ID can be found + * by reversing the calculation (stored in logid_index). Note, + * bits 31:20 of the x2APIC ID aren't propagated to the logical + * ID, but KVM limits the x2APIC ID limited to KVM_MAX_VCPU_IDS. + */ + physical_id =3D logid_index; + } + + avic_kick_vcpu_by_physical_id(kvm, physical_id, icrl); +} + /* * A fast-path version of avic_kick_target_vcpus(), which attempts to match * destination APIC ID to vCPU without looping through all vCPUs. @@ -334,11 +378,10 @@ static void avic_kick_vcpu(struct kvm_vcpu *vcpu, u32= icrl) static int avic_kick_target_vcpus_fast(struct kvm *kvm, struct kvm_lapic *= source, u32 icrl, u32 icrh, u32 index) { - u32 l1_physical_id, dest; - struct kvm_vcpu *target_vcpu; int dest_mode =3D icrl & APIC_DEST_MASK; int shorthand =3D icrl & APIC_SHORT_MASK; struct kvm_svm *kvm_svm =3D to_kvm_svm(kvm); + u32 dest; =20 if (shorthand !=3D APIC_DEST_NOSHORT) return -EINVAL; @@ -355,14 +398,14 @@ static int avic_kick_target_vcpus_fast(struct kvm *kv= m, struct kvm_lapic *source if (!apic_x2apic_mode(source) && dest =3D=3D APIC_BROADCAST) return -EINVAL; =20 - l1_physical_id =3D dest; - - if (WARN_ON_ONCE(l1_physical_id !=3D index)) + if (WARN_ON_ONCE(dest !=3D index)) return -EINVAL; =20 + avic_kick_vcpu_by_physical_id(kvm, dest, icrl); } else { - u32 bitmap, cluster; - int logid_index; + u32 *avic_logical_id_table; + unsigned long bitmap, i; + u32 cluster; =20 if (apic_x2apic_mode(source)) { /* 16 bit dest mask, 16 bit cluster id */ @@ -382,50 +425,21 @@ static int avic_kick_target_vcpus_fast(struct kvm *kv= m, struct kvm_lapic *source if (unlikely(!bitmap)) return 0; =20 - if (!is_power_of_2(bitmap)) - /* multiple logical destinations, use slow path */ - return -EINVAL; - - logid_index =3D cluster + __ffs(bitmap); - - if (apic_x2apic_mode(source)) { - /* - * For x2APIC, the logical APIC ID is a read-only value - * that is derived from the x2APIC ID, thus the x2APIC - * ID can be found by reversing the calculation (done - * above). Note, bits 31:20 of the x2APIC ID are not - * propagated to the logical ID, but KVM limits the - * x2APIC ID limited to KVM_MAX_VCPU_IDS. - */ - l1_physical_id =3D logid_index; - } else { - u32 *avic_logical_id_table =3D - page_address(kvm_svm->avic_logical_id_table_page); - - u32 logid_entry =3D avic_logical_id_table[logid_index]; - - if (WARN_ON_ONCE(index !=3D logid_index)) - return -EINVAL; - - /* Nothing to do if the logical destination is invalid. */ - if (unlikely(!(logid_entry & AVIC_LOGICAL_ID_ENTRY_VALID_MASK))) - return 0; - - l1_physical_id =3D logid_entry & - AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK; - } + if (apic_x2apic_mode(source)) + avic_logical_id_table =3D NULL; + else + avic_logical_id_table =3D page_address(kvm_svm->avic_logical_id_table_p= age); + + /* + * AVIC is inhibited if vCPUs aren't mapped 1:1 with logical + * IDs, thus each bit in the destination is guaranteed to map + * to at most one vCPU. + */ + for_each_set_bit(i, &bitmap, 16) + avic_kick_vcpu_by_logical_id(kvm, avic_logical_id_table, + cluster + i, icrl); } =20 - /* - * KVM inhibits AVIC if any vCPU ID diverges from the vCPUs APIC ID, - * i.e. APIC ID =3D=3D vCPU ID. Once again, nothing to do if the target - * vCPU doesn't exist. - */ - target_vcpu =3D kvm_get_vcpu_by_id(kvm, l1_physical_id); - if (unlikely(!target_vcpu)) - return 0; - - avic_kick_vcpu(target_vcpu, icrl); return 0; } =20 --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 355F4C54EE9 for ; Tue, 20 Sep 2022 23:35:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231653AbiITXfG (ORCPT ); Tue, 20 Sep 2022 19:35:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231521AbiITXej (ORCPT ); Tue, 20 Sep 2022 19:34:39 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3F1E796BB for ; Tue, 20 Sep 2022 16:32:42 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-349e6acbac9so36947077b3.2 for ; Tue, 20 Sep 2022 16:32:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=xUOdAjq4HghazHAVl8uNVyB4YOKA/waPzXFg86fSMzY=; b=GNllrm4L9CZmpMD9pUmTSbbWaQ2LqdS5FhgNQXlKhue1ouCs813O4ecTeppy5hzlD8 DXlt249g1xAabM9LHj6lHJw1NSEnmBtvT2lrw/qIhnxx6TS57AQ2Ps6gzvHKqOtxemnJ pHosztHMSzde6gStbqA+/7DuWZTDzvsxi/MA6RK+b/2cw35l1oqFqcnt+9Evp194dyy7 Frs3Lt3dM2Z8nnQXyjenPltVU4RhtZ4gZpIorxiAHT1qJenMswhN9md8+CgDl/VEPKiC acxyEM9ftA3rcvzVcVaFM4+r+GWYTWyBoqOQO3ccaRpdBmea5lemgrfmgTbzkCqTCt75 l+zQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=xUOdAjq4HghazHAVl8uNVyB4YOKA/waPzXFg86fSMzY=; b=k7AFR/pRmyesFSHXrWbufIobbeRtKEsoEq2tjAbppD9nWayxHitr4ylZ+J0PycKngP n0SFZjnGyJ0jeTMeMJ4Y43Nmv9QYNn0YIoexo5QOD8RGiLoG1rrALib7Z6G89WRyGUji Qg5bj0Vcf0gc/GvFHFEvyBQcFew2r+wnxH3ycbZIGH4fhwtomAdWW3/MXrL6a4aa66Xi nYHSgG3VJkepUAujPn0UjpEcuc3Wh5oU7Q17vzvBcMq76EpwqbTZmbMi3OkCtrC0o4+O eR+6FpqT0p5caNHP3xHxrwxAxzyZGd3uYOQBLyfiqxYXpL8h1dxgFye2xGLc7EXKx8A7 w2/g== X-Gm-Message-State: ACrzQf3NJIjKBLjlbr1GT9xnr+CXo0kwoON0BqWXvPc+0sCowViMsCI8 PORd5+fGao4V+GZbgHvFZib7M7sENgQ= X-Google-Smtp-Source: AMsMyM4445S/CUA4Jiq0RDx3o58oHuxBMaDY5o5srIKAlusEo6GR3leX7sjWCZQbW23SxbfuEamg6P+BCKc= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a81:4c45:0:b0:345:4178:1805 with SMTP id z66-20020a814c45000000b0034541781805mr22344482ywa.114.1663716742852; Tue, 20 Sep 2022 16:32:22 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:33 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-28-seanjc@google.com> Subject: [PATCH v3 27/28] KVM: SVM: Ignore writes to Remote Read Data on AVIC write traps From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Drop writes to APIC_RRR, a.k.a. Remote Read Data Register, on AVIC unaccelerated write traps. The register is read-only and isn't emulated by KVM. Sending the register through kvm_apic_write_nodecode() will result in screaming when x2APIC is enabled due to the unexpected failure to retrieve the MSR (KVM expects that only "legal" accesses will trap). Fixes: 4d1d7942e36a ("KVM: SVM: Introduce logic to (de)activate x2AVIC mode= ") Signed-off-by: Sean Christopherson Reviewed-by: Maxim Levitsky --- arch/x86/kvm/svm/avic.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 17e64b056e4e..953b1fd14b6d 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -631,6 +631,9 @@ static int avic_unaccel_trap_write(struct kvm_vcpu *vcp= u) case APIC_DFR: avic_handle_dfr_update(vcpu); break; + case APIC_RRR: + /* Ignore writes to Read Remote Data, it's read-only. */ + return 1; default: break; } --=20 2.37.3.968.ga6b4b080e4-goog From nobody Thu Apr 2 19:58:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3543AC6FA82 for ; Tue, 20 Sep 2022 23:34:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231254AbiITXev (ORCPT ); Tue, 20 Sep 2022 19:34:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231440AbiITXeS (ORCPT ); Tue, 20 Sep 2022 19:34:18 -0400 Received: from mail-pf1-x44a.google.com (mail-pf1-x44a.google.com [IPv6:2607:f8b0:4864:20::44a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2D39786E8 for ; Tue, 20 Sep 2022 16:32:45 -0700 (PDT) Received: by mail-pf1-x44a.google.com with SMTP id y22-20020a626416000000b0054769104b0cso2502098pfb.20 for ; Tue, 20 Sep 2022 16:32:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=VSS9P4anBFtLf4B9B5LJylk6y1/+T/yH5E3Gi46su5c=; b=dzsAR999gAs5GI60MjtbEHw4Ha/P3CgSWfoPQo+P1oGkQfkJGxCOO8KVHK+jiDCOip Dq5472xUqeafNkymSqfry21kzntpgn2WKqFC3+REW0Wx64ayEeTgGLzEULjQOS1DrggQ erpBK+2sNCkvu3XVL/M99PwZkjL4NwLAKqGtpoi7WOuRWsw60fxIPvCXn/tZVBvoqHf9 YtArUePHaI/K2gcgIlT166ynrxbeS2KYNMXZ+hVw4ch9X7wv+1mTki606d+Ky0Pho56C v0EgLgu/uRuWd5TYowHX3TVLuamYHv2sUrWVDMEwWK9NIFbgxBeDE+2zzGSEYx7pgs2Z g62Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=VSS9P4anBFtLf4B9B5LJylk6y1/+T/yH5E3Gi46su5c=; b=IrxI8BxIM9KjRScnd2w9veAwCDDHGQaQLrouLdfTSSXvFH+UVpiZ/RYA0x+kMLx1aK 7If9thtXGfGa0qjBRHkfhhZh4wETmeIbUJWHGJ90l7aC41K/JI4V4sF2PFOUg6VytZ/N UsiW4QdOnRm3+noNEjXcx8GmDryLxRI90Ya75obgsd8NfPIf+SMnMVTnUSDnAdiykjuT M8iu7vL9/aKEnix63X6y5fOiIfP0Gmun5kj7RFliwYasCZc5J+XRgG/1Q+2VAfzCVYoO 1UEaD/jPKR+MBJfzUId/uvcB4v3g6jBwIbTMaGaTf5JeZng3Wzvrhbyuo8U5y9JrDzFL msNw== X-Gm-Message-State: ACrzQf3tH5Z2Ce1Idp1dPlLKmyDSrEMQF4zFOlE/nPezkNbwH4O2YL5j +/wPqilRegXPxgv7KNOQpVvatPasWao= X-Google-Smtp-Source: AMsMyM5AYuJd6z3doTqWLCrZVEZtzqlgEgckGLurEasrMrybraXxa+ZuJxu+ZTtvOe7/iw9ugkJWD8ci2mc= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:10cf:b0:528:48c3:79e0 with SMTP id d15-20020a056a0010cf00b0052848c379e0mr25917775pfu.18.1663716744442; Tue, 20 Sep 2022 16:32:24 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 20 Sep 2022 23:31:34 +0000 In-Reply-To: <20220920233134.940511-1-seanjc@google.com> Mime-Version: 1.0 References: <20220920233134.940511-1-seanjc@google.com> X-Mailer: git-send-email 2.37.3.968.ga6b4b080e4-goog Message-ID: <20220920233134.940511-29-seanjc@google.com> Subject: [PATCH v3 28/28] Revert "KVM: SVM: Do not throw warning when calling avic_vcpu_load on a running vcpu" From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Turns out that some warnings exist for good reasons. Restore the warning in avic_vcpu_load() that guards against calling avic_vcpu_load() on a running vCPU now that KVM avoids doing so when switching between x2APIC and xAPIC. The entire point of the WARN is to highlight that KVM should not be reloading an AVIC. Opportunistically convert the WARN_ON() to WARN_ON_ONCE() to avoid spamming the kernel if it does fire. This reverts commit c0caeee65af3944b7b8abbf566e7cc1fae15c775. Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 953b1fd14b6d..35b0ef877e53 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -1038,6 +1038,7 @@ void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu) return; =20 entry =3D READ_ONCE(*(svm->avic_physical_id_cache)); + WARN_ON_ONCE(entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK); =20 entry &=3D ~AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK; entry |=3D (h_physical_id & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK); --=20 2.37.3.968.ga6b4b080e4-goog