From nobody Thu Apr 2 21:30:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A17EC54EE9 for ; Tue, 20 Sep 2022 13:48:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229605AbiITNso (ORCPT ); Tue, 20 Sep 2022 09:48:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230369AbiITNsm (ORCPT ); Tue, 20 Sep 2022 09:48:42 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 274A65722A for ; Tue, 20 Sep 2022 06:48:41 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 26D0313D5; Tue, 20 Sep 2022 06:48:47 -0700 (PDT) Received: from e121896.cambridge.arm.com (e121896.cambridge.arm.com [10.1.38.12]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 715EF3F73D; Tue, 20 Sep 2022 06:48:38 -0700 (PDT) From: James Clark To: suzuki.poulose@arm.com, coresight@lists.linaro.org, mathieu.poirier@linaro.org Cc: mike.leach@linaro.org, leo.yan@linaro.org, James Clark , Alexander Shishkin , Mark Brown , Catalin Marinas , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] coresight: Use new autogenerated sysreg definitions Date: Tue, 20 Sep 2022 14:48:27 +0100 Message-Id: <20220920134827.31738-1-james.clark@arm.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fix the build by updating registers to use the new autogenerated format. Fixes: c0357a73fa4a ("arm64/sysreg: Align field names in ID_AA64DFR0_EL1 wi= th architecture") Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 4 ++-- drivers/hwtracing/coresight/coresight-trbe.h | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/h= wtracing/coresight/coresight-etm4x-core.c index d39660a3e50c..80fefaba58ee 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -966,7 +966,7 @@ static inline bool cpu_supports_sysreg_trace(void) { u64 dfr0 =3D read_sysreg_s(SYS_ID_AA64DFR0_EL1); =20 - return ((dfr0 >> ID_AA64DFR0_TRACEVER_SHIFT) & 0xfUL) > 0; + return ((dfr0 >> ID_AA64DFR0_EL1_TraceVer_SHIFT) & 0xfUL) > 0; } =20 static bool etm4_init_sysreg_access(struct etmv4_drvdata *drvdata, @@ -1054,7 +1054,7 @@ static void cpu_detect_trace_filtering(struct etmv4_d= rvdata *drvdata) u64 trfcr; =20 drvdata->trfcr =3D 0; - if (!cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_TRACE_FILT_SH= IFT)) + if (!cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceFilt= _SHIFT)) return; =20 /* diff --git a/drivers/hwtracing/coresight/coresight-trbe.h b/drivers/hwtraci= ng/coresight/coresight-trbe.h index 30e4d7db4f8e..98ff1b17ad07 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.h +++ b/drivers/hwtracing/coresight/coresight-trbe.h @@ -20,7 +20,8 @@ static inline bool is_trbe_available(void) { u64 aa64dfr0 =3D read_sysreg_s(SYS_ID_AA64DFR0_EL1); - unsigned int trbe =3D cpuid_feature_extract_unsigned_field(aa64dfr0, ID_A= A64DFR0_TRBE_SHIFT); + unsigned int trbe =3D cpuid_feature_extract_unsigned_field(aa64dfr0, + ID_AA64DFR0_EL1_TraceBuffer_SHIFT); =20 return trbe >=3D 0b0001; } --=20 2.28.0