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[86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:05 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Ahmad Fatoum , Srinivas Kandagatla Subject: [PATCH 01/13] nvmem: add driver handling U-Boot environment variables Date: Fri, 16 Sep 2022 13:20:48 +0100 Message-Id: <20220916122100.170016-2-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rafa=C5=82 Mi=C5=82ecki U-Boot stores its setup as environment variables. It's a list of key-value pairs stored on flash device with a custom header. This commit adds an NVMEM driver that: 1. Provides NVMEM access to environment vars binary data 2. Extracts variables as NVMEM cells Current Linux's NVMEM sysfs API allows reading whole NVMEM data block. It can be used by user-space tools for reading U-Boot env vars block without the hassle of finding its location. Parsing will still need to be re-done there. Kernel-parsed NVMEM cells can be read however by Linux drivers. This may be useful for Ethernet drivers for reading device MAC address which is often stored as U-Boot env variable. Signed-off-by: Rafa=C5=82 Mi=C5=82ecki Reviewed-by: Ahmad Fatoum Signed-off-by: Srinivas Kandagatla --- MAINTAINERS | 1 + drivers/nvmem/Kconfig | 13 +++ drivers/nvmem/Makefile | 2 + drivers/nvmem/u-boot-env.c | 218 +++++++++++++++++++++++++++++++++++++ 4 files changed, 234 insertions(+) create mode 100644 drivers/nvmem/u-boot-env.c diff --git a/MAINTAINERS b/MAINTAINERS index 8a5012ba6ff9..94aa8ef17535 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20731,6 +20731,7 @@ U-BOOT ENVIRONMENT VARIABLES M: Rafa=C5=82 Mi=C5=82ecki S: Maintained F: Documentation/devicetree/bindings/nvmem/u-boot,env.yaml +F: drivers/nvmem/u-boot-env.c =20 UACCE ACCELERATOR FRAMEWORK M: Zhangfei Gao diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index d72d879a6d34..bab8a29c9861 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -344,4 +344,17 @@ config NVMEM_APPLE_EFUSES This driver can also be built as a module. If so, the module will be called nvmem-apple-efuses. =20 +config NVMEM_U_BOOT_ENV + tristate "U-Boot environment variables support" + depends on OF && MTD + select CRC32 + help + U-Boot stores its setup as environment variables. This driver adds + support for verifying & exporting such data. It also exposes variables + as NVMEM cells so they can be referenced by other drivers. + + Currently this drivers works only with env variables on top of MTD. + + If compiled as module it will be called nvmem_u-boot-env. + endif diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index c710b64f9fe4..399f9972d45b 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -69,3 +69,5 @@ obj-$(CONFIG_NVMEM_APPLE_EFUSES) +=3D nvmem-apple-efuses.o nvmem-apple-efuses-y :=3D apple-efuses.o obj-$(CONFIG_MICROCHIP_OTPC) +=3D nvmem-microchip-otpc.o nvmem-microchip-otpc-y :=3D microchip-otpc.o +obj-$(CONFIG_NVMEM_U_BOOT_ENV) +=3D nvmem_u-boot-env.o +nvmem_u-boot-env-y :=3D u-boot-env.o diff --git a/drivers/nvmem/u-boot-env.c b/drivers/nvmem/u-boot-env.c new file mode 100644 index 000000000000..9b9abfb8f187 --- /dev/null +++ b/drivers/nvmem/u-boot-env.c @@ -0,0 +1,218 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Rafa=C5=82 Mi=C5=82ecki + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum u_boot_env_format { + U_BOOT_FORMAT_SINGLE, + U_BOOT_FORMAT_REDUNDANT, +}; + +struct u_boot_env { + struct device *dev; + enum u_boot_env_format format; + + struct mtd_info *mtd; + + /* Cells */ + struct nvmem_cell_info *cells; + int ncells; +}; + +struct u_boot_env_image_single { + __le32 crc32; + uint8_t data[]; +} __packed; + +struct u_boot_env_image_redundant { + __le32 crc32; + u8 mark; + uint8_t data[]; +} __packed; + +static int u_boot_env_read(void *context, unsigned int offset, void *val, + size_t bytes) +{ + struct u_boot_env *priv =3D context; + struct device *dev =3D priv->dev; + size_t bytes_read; + int err; + + err =3D mtd_read(priv->mtd, offset, bytes, &bytes_read, val); + if (err && !mtd_is_bitflip(err)) { + dev_err(dev, "Failed to read from mtd: %d\n", err); + return err; + } + + if (bytes_read !=3D bytes) { + dev_err(dev, "Failed to read %zu bytes\n", bytes); + return -EIO; + } + + return 0; +} + +static int u_boot_env_add_cells(struct u_boot_env *priv, uint8_t *buf, + size_t data_offset, size_t data_len) +{ + struct device *dev =3D priv->dev; + char *data =3D buf + data_offset; + char *var, *value, *eq; + int idx; + + priv->ncells =3D 0; + for (var =3D data; var < data + data_len && *var; var +=3D strlen(var) + = 1) + priv->ncells++; + + priv->cells =3D devm_kcalloc(dev, priv->ncells, sizeof(*priv->cells), GFP= _KERNEL); + if (!priv->cells) + return -ENOMEM; + + for (var =3D data, idx =3D 0; + var < data + data_len && *var; + var =3D value + strlen(value) + 1, idx++) { + eq =3D strchr(var, '=3D'); + if (!eq) + break; + *eq =3D '\0'; + value =3D eq + 1; + + priv->cells[idx].name =3D devm_kstrdup(dev, var, GFP_KERNEL); + if (!priv->cells[idx].name) + return -ENOMEM; + priv->cells[idx].offset =3D data_offset + value - data; + priv->cells[idx].bytes =3D strlen(value); + } + + if (WARN_ON(idx !=3D priv->ncells)) + priv->ncells =3D idx; + + return 0; +} + +static int u_boot_env_parse(struct u_boot_env *priv) +{ + struct device *dev =3D priv->dev; + size_t crc32_data_offset; + size_t crc32_data_len; + size_t crc32_offset; + size_t data_offset; + size_t data_len; + uint32_t crc32; + uint32_t calc; + size_t bytes; + uint8_t *buf; + int err; + + buf =3D kcalloc(1, priv->mtd->size, GFP_KERNEL); + if (!buf) { + err =3D -ENOMEM; + goto err_out; + } + + err =3D mtd_read(priv->mtd, 0, priv->mtd->size, &bytes, buf); + if ((err && !mtd_is_bitflip(err)) || bytes !=3D priv->mtd->size) { + dev_err(dev, "Failed to read from mtd: %d\n", err); + goto err_kfree; + } + + switch (priv->format) { + case U_BOOT_FORMAT_SINGLE: + crc32_offset =3D offsetof(struct u_boot_env_image_single, crc32); + crc32_data_offset =3D offsetof(struct u_boot_env_image_single, data); + data_offset =3D offsetof(struct u_boot_env_image_single, data); + break; + case U_BOOT_FORMAT_REDUNDANT: + crc32_offset =3D offsetof(struct u_boot_env_image_redundant, crc32); + crc32_data_offset =3D offsetof(struct u_boot_env_image_redundant, mark); + data_offset =3D offsetof(struct u_boot_env_image_redundant, data); + break; + } + crc32 =3D le32_to_cpu(*(uint32_t *)(buf + crc32_offset)); + crc32_data_len =3D priv->mtd->size - crc32_data_offset; + data_len =3D priv->mtd->size - data_offset; + + calc =3D crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L; + if (calc !=3D crc32) { + dev_err(dev, "Invalid calculated CRC32: 0x%08x (expected: 0x%08x)\n", ca= lc, crc32); + err =3D -EINVAL; + goto err_kfree; + } + + buf[priv->mtd->size - 1] =3D '\0'; + err =3D u_boot_env_add_cells(priv, buf, data_offset, data_len); + if (err) + dev_err(dev, "Failed to add cells: %d\n", err); + +err_kfree: + kfree(buf); +err_out: + return err; +} + +static int u_boot_env_probe(struct platform_device *pdev) +{ + struct nvmem_config config =3D { + .name =3D "u-boot-env", + .reg_read =3D u_boot_env_read, + }; + struct device *dev =3D &pdev->dev; + struct device_node *np =3D dev->of_node; + struct u_boot_env *priv; + int err; + + priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + priv->dev =3D dev; + + priv->format =3D (uintptr_t)of_device_get_match_data(dev); + + priv->mtd =3D of_get_mtd_device_by_node(np); + if (IS_ERR(priv->mtd)) { + dev_err_probe(dev, PTR_ERR(priv->mtd), "Failed to get %pOF MTD\n", np); + return PTR_ERR(priv->mtd); + } + + err =3D u_boot_env_parse(priv); + if (err) + return err; + + config.dev =3D dev; + config.cells =3D priv->cells; + config.ncells =3D priv->ncells; + config.priv =3D priv; + config.size =3D priv->mtd->size; + + return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &config)); +} + +static const struct of_device_id u_boot_env_of_match_table[] =3D { + { .compatible =3D "u-boot,env", .data =3D (void *)U_BOOT_FORMAT_SINGLE, }, + { .compatible =3D "u-boot,env-redundant-bool", .data =3D (void *)U_BOOT_F= ORMAT_REDUNDANT, }, + { .compatible =3D "u-boot,env-redundant-count", .data =3D (void *)U_BOOT_= FORMAT_REDUNDANT, }, + {}, +}; + +static struct platform_driver u_boot_env_driver =3D { + .probe =3D u_boot_env_probe, + .driver =3D { + .name =3D "u_boot_env", + .of_match_table =3D u_boot_env_of_match_table, + }, +}; +module_platform_driver(u_boot_env_driver); + +MODULE_AUTHOR("Rafa=C5=82 Mi=C5=82ecki"); +MODULE_LICENSE("GPL"); +MODULE_DEVICE_TABLE(of, u_boot_env_of_match_table); --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF59AC54EE9 for ; Fri, 16 Sep 2022 12:21:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231235AbiIPMVa (ORCPT ); Fri, 16 Sep 2022 08:21:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231497AbiIPMVQ (ORCPT ); Fri, 16 Sep 2022 08:21:16 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1352EB14EF for ; Fri, 16 Sep 2022 05:21:09 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id r5-20020a1c4405000000b003b494ffc00bso1071858wma.0 for ; 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[86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:07 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Miquel Raynal , Srinivas Kandagatla Subject: [PATCH 02/13] mtd: allow getting MTD device associated with a specific DT node Date: Fri, 16 Sep 2022 13:20:49 +0100 Message-Id: <20220916122100.170016-3-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rafa=C5=82 Mi=C5=82ecki MTD subsystem API allows interacting with MTD devices (e.g. reading, writing, handling bad blocks). So far a random driver could get MTD device only by its name (get_mtd_device_nm()). This change allows getting them also by a DT node. This API is required for drivers handling DT defined MTD partitions in a specific way (e.g. U-Boot (sub)partition with environment variables). Signed-off-by: Rafa=C5=82 Mi=C5=82ecki Acked-by: Miquel Raynal Signed-off-by: Srinivas Kandagatla --- drivers/mtd/mtdcore.c | 28 ++++++++++++++++++++++++++++ include/linux/mtd/mtd.h | 1 + 2 files changed, 29 insertions(+) diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index a9b8be9f40dc..e3bee273595e 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -1217,6 +1217,34 @@ int __get_mtd_device(struct mtd_info *mtd) } EXPORT_SYMBOL_GPL(__get_mtd_device); =20 +/** + * of_get_mtd_device_by_node - obtain an MTD device associated with a give= n node + * + * @np: device tree node + */ +struct mtd_info *of_get_mtd_device_by_node(struct device_node *np) +{ + struct mtd_info *mtd =3D NULL; + struct mtd_info *tmp; + int err; + + mutex_lock(&mtd_table_mutex); + + err =3D -EPROBE_DEFER; + mtd_for_each_device(tmp) { + if (mtd_get_of_node(tmp) =3D=3D np) { + mtd =3D tmp; + err =3D __get_mtd_device(mtd); + break; + } + } + + mutex_unlock(&mtd_table_mutex); + + return err ? ERR_PTR(err) : mtd; +} +EXPORT_SYMBOL_GPL(of_get_mtd_device_by_node); + /** * get_mtd_device_nm - obtain a validated handle for an MTD device by * device name diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 955aee14b0f7..6fc841ceef31 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -677,6 +677,7 @@ extern int mtd_device_unregister(struct mtd_info *maste= r); extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num); extern int __get_mtd_device(struct mtd_info *mtd); extern void __put_mtd_device(struct mtd_info *mtd); +extern struct mtd_info *of_get_mtd_device_by_node(struct device_node *np); extern struct mtd_info *get_mtd_device_nm(const char *name); extern void put_mtd_device(struct mtd_info *mtd); =20 --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C1E9ECAAD8 for ; Fri, 16 Sep 2022 12:21:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229462AbiIPMVf (ORCPT ); Fri, 16 Sep 2022 08:21:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231494AbiIPMVT (ORCPT ); Fri, 16 Sep 2022 08:21:19 -0400 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B7D9CB029E for ; Fri, 16 Sep 2022 05:21:11 -0700 (PDT) Received: by mail-wm1-x330.google.com with SMTP id ay7-20020a05600c1e0700b003b49861bf48so969082wmb.0 for ; Fri, 16 Sep 2022 05:21:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=a3ltSV10gjE+B1vHCJrys5NABOlxdayq5iZ4NHV92/Q=; b=slESl/j88QOOc87v/2bAejq41J/Y/cCR6TJPJVKaLq6RgQSJk+kXudHtWADPyzc8VZ EUsKR3SUURy/mr/nqL01GHhy9UCOEhPwRMlpywY6KQL4LfRh6ye97sxxDYBkbkPI5NqI SOvPbgpg7om0f43POKh8/cWUbIa4FteaTnVcjwaf8/1pNYU8ETGD5DLsYSB5RadQ0q9q xCE8amHEhrqJ9ahaqJEl6l7KNxQKHTTvouYfq2FbAtQm6N17dAT8ioItygG6P270Xlk7 HZ6SHbykvPukAU/a1LvVIyQW0MD92yPIRy1oDcszNWHgyj7hoPjkgFaMyE1YmJBS8ns0 yELg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=a3ltSV10gjE+B1vHCJrys5NABOlxdayq5iZ4NHV92/Q=; b=1U3i/tMPAHUKAUuZYvLUdXFvuTHR/0qT7IvzpRdGh6+XN8HuzC6WTVXe89Zu5YC0Wp JjaMwfdbt0j807SIp5kplnp5kBVJcaeRT4UDqHskcB2Mv4JJFhQtxpGUlhHfg0YnAPGq D2snoeF+klTPnDr2dTlC9fjBMp3mZr093mgtOrbfrj/2Ds4HajqVkRAXtxBQ2/YK+Xly Y/ZEi/V54EgIexMDZ/bZDJ9J4iQDyn93EX73SmN0oiBXh8AllPGodEJ1btzietXRceGr Iu3gfenAJ8GRpFEjmEQEFWnQqnqvsgL1MXmdBcYN+h4sGqX2JK3pJ3rUVk/nwoDFr0cY Izxg== X-Gm-Message-State: ACrzQf2LPj8W2fTIAvY0t0bD1+hU7JgryY9KUaZaUEbjCNrAE6+Fmg3J vJ1lUi85IYB9kzRBfERG8jFlbA== X-Google-Smtp-Source: AMsMyM6cTMY01i1R+dUcenZcRHXGQTwP87HTQm/LRqse38Zc25FHj56pGL7Ck7e53wGnQvRWmcKwig== X-Received: by 2002:a05:600c:3b8c:b0:3b4:8ad1:d894 with SMTP id n12-20020a05600c3b8c00b003b48ad1d894mr3163089wms.113.1663330869457; Fri, 16 Sep 2022 05:21:09 -0700 (PDT) Received: from srini-hackbase.lan (cpc90716-aztw32-2-0-cust825.18-1.cable.virginm.net. [86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:08 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Gaosheng Cui , Srinivas Kandagatla Subject: [PATCH 03/13] nvmem: core: add error handling for dev_set_name Date: Fri, 16 Sep 2022 13:20:50 +0100 Message-Id: <20220916122100.170016-4-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Gaosheng Cui The type of return value of dev_set_name is int, which may return wrong result, so we add error handling for it to reclaim memory of nvmem resource, and return early when an error occurs. Signed-off-by: Gaosheng Cui Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/core.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 2164efd12ba9..321d7d63e068 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -810,18 +810,24 @@ struct nvmem_device *nvmem_register(const struct nvme= m_config *config) =20 switch (config->id) { case NVMEM_DEVID_NONE: - dev_set_name(&nvmem->dev, "%s", config->name); + rval =3D dev_set_name(&nvmem->dev, "%s", config->name); break; case NVMEM_DEVID_AUTO: - dev_set_name(&nvmem->dev, "%s%d", config->name, nvmem->id); + rval =3D dev_set_name(&nvmem->dev, "%s%d", config->name, nvmem->id); break; default: - dev_set_name(&nvmem->dev, "%s%d", + rval =3D dev_set_name(&nvmem->dev, "%s%d", config->name ? : "nvmem", config->name ? config->id : nvmem->id); break; } =20 + if (rval) { + ida_free(&nvmem_ida, nvmem->id); + kfree(nvmem); + return ERR_PTR(rval); + } + nvmem->read_only =3D device_property_present(config->dev, "read-only") || config->read_only || !nvmem->reg_write; =20 --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06E39C54EE9 for ; Fri, 16 Sep 2022 12:21:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231572AbiIPMV0 (ORCPT ); Fri, 16 Sep 2022 08:21:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53430 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231453AbiIPMVP (ORCPT ); Fri, 16 Sep 2022 08:21:15 -0400 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC51EB14FB for ; Fri, 16 Sep 2022 05:21:12 -0700 (PDT) Received: by mail-wm1-x32d.google.com with SMTP id n17-20020a05600c501100b003a84bf9b68bso15742642wmr.3 for ; Fri, 16 Sep 2022 05:21:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=zo8kVKLKtNbL7LV3ucP5GI+hqu0rYi1ISG3c79jI6bk=; b=H4iAzZYZ+xk0hTaVbutPPEiHQr70DA4fV99XQry0LkYqrdXQC2nm2atc0SE/c/H8mW MSeEeTUZAvOZ39KCibaha5kVLEIE+ysdd58pG9znjZTQ3iV/eDN9nL51AF0uqsK5LYLj apCf8G8+9dsCn6xhMoYKUjsR/6t9V1l7MuueXj8wAn84gfHgO2aaJuAYOA/O6mnGNCnS joIvajR77qkCaVohOQgpPNXoQyR2j7eGqOmXLMQxsPVRTMZbakByEM20gVA0SoK1iWwP 5lDQ9GHA+d126VYwVlTht+vvAhtiBakEB0zaqOshJf7LwNHxr337uJcxHaM47hjLSsYK ulCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=zo8kVKLKtNbL7LV3ucP5GI+hqu0rYi1ISG3c79jI6bk=; b=GIQF+9Pr4banzHr1UEuGM+I0i5mucHziYGuLULFVFQR8szLERzD3jI1hIkeIRNK70T mPpwMmdzSxYZUhVsFNapgkx/cGcCF7096B7sGn+Uyn6rsJTdopQh0ddeYNhoBvkKexI4 kQOZ6jy+i0bn0KkWQtltRh5mCuMnh7N93vGYrIt79SQFGaTBzWLoRgmUHcSZbXVmYrCJ LpY7ExVqQklVwjG4aA1Pc3pcCC/MmaUbh2tOLnNAm9oSdub56Mn4/hK+K1FANX2nl8Lw lD+grX/HJ23GKJ5GfmPT9bt5BAi4Wd6I4DsWaVfmSKzxx/pMzysOB9NvDANDdoVszXpC XMoA== X-Gm-Message-State: ACgBeo2vuUbmT2OQA9gvAlsv1FeOkQl43F8emQX9DKJe0Rh26SKNs9Ve b4GSgaiCBdXBv+A2+Nxq/+eJ9/Fp3FSi9A== X-Google-Smtp-Source: AA6agR4ZvYxD4ZAQKOL7+MxGdvwiOOZ8f2ZfEziEvmtGZkPLTxBDZ0IBIBXOImfaZivaePnAhca23g== X-Received: by 2002:a1c:6a0b:0:b0:3b3:3ed4:9bef with SMTP id f11-20020a1c6a0b000000b003b33ed49befmr10549468wmc.84.1663330870991; Fri, 16 Sep 2022 05:21:10 -0700 (PDT) Received: from srini-hackbase.lan (cpc90716-aztw32-2-0-cust825.18-1.cable.virginm.net. [86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:10 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Johnson Wang , Krzysztof Kozlowski , Srinivas Kandagatla Subject: [PATCH 04/13] dt-bindings: nvmem: mediatek: efuse: Add support for MT8188 Date: Fri, 16 Sep 2022 13:20:51 +0100 Message-Id: <20220916122100.170016-5-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Johnson Wang Add compatible for MT8188 SoC. Signed-off-by: Johnson Wang Acked-by: Krzysztof Kozlowski Signed-off-by: Srinivas Kandagatla --- Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml b/= Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml index b5a1109f2ee1..75e0a516e59a 100644 --- a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml @@ -30,6 +30,7 @@ properties: - mediatek,mt8173-efuse - mediatek,mt8183-efuse - mediatek,mt8186-efuse + - mediatek,mt8188-efuse - mediatek,mt8192-efuse - mediatek,mt8195-efuse - mediatek,mt8516-efuse --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2D64C54EE9 for ; Fri, 16 Sep 2022 12:21:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231460AbiIPMVy (ORCPT ); Fri, 16 Sep 2022 08:21:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231551AbiIPMVX (ORCPT ); Fri, 16 Sep 2022 08:21:23 -0400 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E4C3B1B83 for ; Fri, 16 Sep 2022 05:21:13 -0700 (PDT) Received: by mail-wr1-x42d.google.com with SMTP id k9so35807692wri.0 for ; Fri, 16 Sep 2022 05:21:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=roKqTDfIrTl9uRri+S8php+Fd9yWmb1Y8cdQ+WhhXiY=; b=XXv4s6fz2yp/sVM9BNSs6pAQS67/Ovdc6+oBUAk/GIOfV3f6ZSnldpSkMVh77Kb5r+ rQ0VeXTVcju9ovRoHRSj9QSPDZdi/fRxfFMyxg4uazjPU5dZACPF5KH0g+x+hL3uA6uG qNvseJxrRhzaC2YH3Z0+SgzAncDEV32klVtuTQ7bjxTSZBvQWvnduUd1NkChqINFXDA0 jKpAatYzt/O6JdC9W+SxNv+atFYDoWlmk576tHBjuBVSz5ZAcMllg20+1wC3ShYgU/b4 u51PfPuj8i1DP3saRTXWYPEqFPjk4+fvWJNzShsl8XVkYgbx4IuEk/ibb6XDAmfEKmvw FFHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=roKqTDfIrTl9uRri+S8php+Fd9yWmb1Y8cdQ+WhhXiY=; b=AM2aoeCGaVQZGtZbdSf541yBTHfcoqV9k57VJ9vsGP0VF6KOxW56zzFya8Ltg/EIT5 htKvk347d8UI8vminZof3Lp3uL22+CUgTsgz/BLjhku/P2QQCl+ujqHCWR0pD8CEdra9 9VPo//fUuQ6MNANgB6R6f8r7xSFatCQopjlpre9sJ6D4tV+dJWzpA60nzUABFmJfZL/7 Pf6Sh2xqLNDOrdcY5qcG1kZaCqcS6tGOpFo8p0Oc930oJynxpJfjpwtT04YlsGuOOsE1 XuYveeRv4lw8aLW+nquI01gEWk2xRGWvIHf0zZl6wuMh0d8AbBJNHJrP6afrzLU4Dsz5 SQ7w== X-Gm-Message-State: ACrzQf0lZ+a3m8Dx/QX/ETIPYV43iCvCOTwOTjJfyzh0ezJ3HE905QCt 3O8xWbcWGHz0IO0VnVCwuty9Rw== X-Google-Smtp-Source: AMsMyM4EQs92CwSmr+cSOC4oeYAgXnOVnoC9TqrK+2emcejHvVllu/KDocuYhA7gQ2UUVXjg1uGJWQ== X-Received: by 2002:a5d:69cf:0:b0:22a:c2d3:1d4a with SMTP id s15-20020a5d69cf000000b0022ac2d31d4amr2735175wrw.473.1663330872063; Fri, 16 Sep 2022 05:21:12 -0700 (PDT) Received: from srini-hackbase.lan (cpc90716-aztw32-2-0-cust825.18-1.cable.virginm.net. [86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:11 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Kenneth Lee , Srinivas Kandagatla Subject: [PATCH 05/13] nvmem: brcm_nvram: Use kzalloc for allocating only one element Date: Fri, 16 Sep 2022 13:20:52 +0100 Message-Id: <20220916122100.170016-6-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kenneth Lee Use kzalloc(...) rather than kcalloc(1, ...) because the number of elements we are specifying in this case is 1, so kzalloc would accomplish the same thing and we can simplify. Signed-off-by: Kenneth Lee Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/brcm_nvram.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/nvmem/brcm_nvram.c b/drivers/nvmem/brcm_nvram.c index 450b927691c3..4441daa20965 100644 --- a/drivers/nvmem/brcm_nvram.c +++ b/drivers/nvmem/brcm_nvram.c @@ -96,7 +96,7 @@ static int brcm_nvram_parse(struct brcm_nvram *priv) =20 len =3D le32_to_cpu(header.len); =20 - data =3D kcalloc(1, len, GFP_KERNEL); + data =3D kzalloc(len, GFP_KERNEL); memcpy_fromio(data, priv->base, len); data[len - 1] =3D '\0'; =20 --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB107C54EE9 for ; Fri, 16 Sep 2022 12:21:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231520AbiIPMVk (ORCPT ); Fri, 16 Sep 2022 08:21:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231531AbiIPMVW (ORCPT ); Fri, 16 Sep 2022 08:21:22 -0400 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11599B14ED for ; Fri, 16 Sep 2022 05:21:15 -0700 (PDT) Received: by mail-wm1-x330.google.com with SMTP id n8so8457452wmr.5 for ; Fri, 16 Sep 2022 05:21:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=s2q2GhLpVfz2HreaKFxxQqbdd2/gRY5+cPvd0gHqtUM=; b=pXdp2gYt/E3X5A1iEsCGf9a/VG5uPhfqC/l4GMORAzbN6dYD/mZldd6UrzfnIQj6+v WNoE/OioyyYYBibILRu7ECc/l1e0udfZcG58fjQxO3nA5d84eEDDtRVLB9wZkTqJ39/7 fJGkM34bmo08UK4kApzR7qJ/KkHqdNiUdlTgfKR1kAiM+hlAbjrzdRrfxmzCVtC98zq6 Y1hF6MgdV/daj+XHK967sXOmxIW7iEf7Hx0svHDkyK8wyLY6gK03rZUV7zXsg9um0YIE Q0UhBUI7nSx45KtuttjnGi5t27jKsbDZ5/jsFMNfzQCOkwacgHkQezrHex7ZCZ/HO9xU V36w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=s2q2GhLpVfz2HreaKFxxQqbdd2/gRY5+cPvd0gHqtUM=; b=rqDwY9lmBuGSYuMxtHRtPSaHSV4+xXucHvoSBdk+1j/qTbR9BzpJJ6tPdcOvCaDfDD 8wwLyU9vPf+Yu/YiyIjKkBcciB7Df5CkN1HX2RTm6yBonPD3xvBgYL5XpaPUX3LU3ISo CPRO7rr/CFl0VXBfbEiAc5pJjYv/xVSpn//JXADXkERKcLiRwhKRXitfY4Cm8SEzbEDS HWCU7nSLBDwVUb38qHMbSmfElb/jAEJN7nKUC/kuUd4yrY5rn23Zq/mtk2a8jgwQH21y 5dhlvDvJ+3BmYkHj+o74uFlC00bxz/b9DsuDpS5LVPsMyoHj/KjxSyipLRq3ETvkBflS htYg== X-Gm-Message-State: ACgBeo3Ui+8M4+FxtwqOK0h/VOSUlK3gioojMynhLXPZ1TbStPVHtCl0 eBhdTMwjzKMqvBCAW7tFhTE19A== X-Google-Smtp-Source: AA6agR7hYqWY2cOpTuVv/zCjt4nFs7uJnCuK8Tf8oQ10AQ+ZubcUFwKT56gtfbZI8USmeXMh5K8hkA== X-Received: by 2002:a05:600c:35d2:b0:3b4:a897:d48 with SMTP id r18-20020a05600c35d200b003b4a8970d48mr6669891wmq.48.1663330873513; Fri, 16 Sep 2022 05:21:13 -0700 (PDT) Received: from srini-hackbase.lan (cpc90716-aztw32-2-0-cust825.18-1.cable.virginm.net. [86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:12 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Srinivas Kandagatla Subject: [PATCH 06/13] dt-bindings: nvmem: qfprom: add IPQ8064 and SDM630 compatibles Date: Fri, 16 Sep 2022 13:20:53 +0100 Message-Id: <20220916122100.170016-7-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Krzysztof Kozlowski Document compatibles for QFPROM used on IPQ8064 and SDM630. They are compatible with generic QFPROM fallback. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Srinivas Kandagatla --- Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Doc= umentation/devicetree/bindings/nvmem/qcom,qfprom.yaml index dede8892ee01..b4163086a5be 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml @@ -18,6 +18,7 @@ properties: - enum: - qcom,apq8064-qfprom - qcom,apq8084-qfprom + - qcom,ipq8064-qfprom - qcom,msm8974-qfprom - qcom,msm8916-qfprom - qcom,msm8996-qfprom @@ -25,6 +26,7 @@ properties: - qcom,qcs404-qfprom - qcom,sc7180-qfprom - qcom,sc7280-qfprom + - qcom,sdm630-qfprom - qcom,sdm845-qfprom - const: qcom,qfprom =20 --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1650AECAAD8 for ; Fri, 16 Sep 2022 12:21:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231623AbiIPMVi (ORCPT ); Fri, 16 Sep 2022 08:21:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231460AbiIPMVT (ORCPT ); Fri, 16 Sep 2022 08:21:19 -0400 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C79C3B14DE for ; Fri, 16 Sep 2022 05:21:16 -0700 (PDT) Received: by mail-wm1-x330.google.com with SMTP id az24-20020a05600c601800b003a842e4983cso15795808wmb.0 for ; Fri, 16 Sep 2022 05:21:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=j55fMh+OHOKODl1aHbY7wvu70GX+4q6XWj5jz6YZ/q8=; b=Yqq9ILdRmuoaZBtr0yI89aveS04xGGS14ncyoucBsgO+zD/0t3xIYC/8KWEnWKKpBI iuwQWHPgyruNM91BoCVySjPasuL5n4OtaZNKkmX9tYmpatcFrA+JJ4Nj8TnuLkq/bFeK aDNQRoF3vRz0bMAV2KeihcGO1JfXLolg7aUvaSybgMPLFLg5GDlElacFGrmFvH6jmQD1 SqRTfuVNYCIlRvvLtboMtJX9WgffsopMwHgnODmNieePaeEhvBEQuHKwaZ14+sofUIP6 OeAJ9ZlFskwrR7OCX65V4/J2olU01MyvxilnWUccl9BJSwMpo9BnmcwPVX+QwlN/kF8V iq8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=j55fMh+OHOKODl1aHbY7wvu70GX+4q6XWj5jz6YZ/q8=; b=e1/6CTOUI/abcrGttAy60hke6GZm29BUUZytZMAy9ncCgTacA/1g/mYoOLXWxxsF0h TSckszVqnryqnrtR71cBF6R2Cs17RRyj5iTLulfXflflrgwo5OQW4p21T66cZMfUnQrh mFaDjIeYx1hnbwfFftxPWMo5+5X+xoaE3SYw0PcZUrlCvh+HIv0bmPlmEYWkmE33nm/9 qi+jTB8rnRxfjbnO9kfLJt1u84ZmUOkxsclZVhG+DMd/g4pf3tODJF+2q76Ly/kdBjiT BbigX+kSj7KwmyE1MXgLF3q+H+02WIEC2AB/cetVuOXWMPG8NbVnVlF5qCSyPXEzgMN8 1+RQ== X-Gm-Message-State: ACrzQf0YKaOSchW61njmFJV6mAwogEH0ZhTdERhObx5HLzhOrP0XaVm+ 4Gg+fn0vSGih7k5QCrLVnt9Vzw== X-Google-Smtp-Source: AMsMyM5/8WlN0k/sZTbwMe9WFyeo2Pu150D60iIRw1aFG1LhFEUW+cDEmsDnUEhK5BWlnWicNkM94Q== X-Received: by 2002:a05:600c:434c:b0:3b4:82fb:5f78 with SMTP id r12-20020a05600c434c00b003b482fb5f78mr3163677wme.157.1663330874665; Fri, 16 Sep 2022 05:21:14 -0700 (PDT) Received: from srini-hackbase.lan (cpc90716-aztw32-2-0-cust825.18-1.cable.virginm.net. [86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:14 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Arnd Bergmann , Matthias Brugger , Srinivas Kandagatla Subject: [PATCH 07/13] nvmem: prefix all symbols with NVMEM_ Date: Fri, 16 Sep 2022 13:20:54 +0100 Message-Id: <20220916122100.170016-8-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rafa=C5=82 Mi=C5=82ecki This unifies all NVMEM symbols. They follow one style now. Signed-off-by: Rafa=C5=82 Mi=C5=82ecki Acked-by: Arnd Bergmann Reviewed-by: Matthias Brugger Signed-off-by: Srinivas Kandagatla Acked-by: Amit Kucheria --- arch/arm/configs/multi_v7_defconfig | 6 +++--- arch/arm/configs/qcom_defconfig | 2 +- arch/arm64/configs/defconfig | 10 +++++----- arch/mips/configs/ci20_defconfig | 2 +- drivers/cpufreq/Kconfig.arm | 2 +- drivers/nvmem/Kconfig | 24 ++++++++++++------------ drivers/nvmem/Makefile | 24 ++++++++++++------------ drivers/soc/mediatek/Kconfig | 2 +- drivers/thermal/qcom/Kconfig | 2 +- 9 files changed, 37 insertions(+), 37 deletions(-) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v= 7_defconfig index 12b35008571f..e52edcc8ec41 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -1193,11 +1193,11 @@ CONFIG_TI_PIPE3=3Dy CONFIG_TWL4030_USB=3Dm CONFIG_RAS=3Dy CONFIG_NVMEM_IMX_OCOTP=3Dy -CONFIG_QCOM_QFPROM=3Dy -CONFIG_ROCKCHIP_EFUSE=3Dm +CONFIG_NVMEM_QCOM_QFPROM=3Dy +CONFIG_NVMEM_ROCKCHIP_EFUSE=3Dm CONFIG_NVMEM_SUNXI_SID=3Dy CONFIG_NVMEM_VF610_OCOTP=3Dy -CONFIG_MESON_MX_EFUSE=3Dm +CONFIG_NVMEM_MESON_MX_EFUSE=3Dm CONFIG_NVMEM_RMEM=3Dm CONFIG_FSI=3Dm CONFIG_FSI_MASTER_GPIO=3Dm diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defcon= fig index 8a59441701a8..fb8c03bd80d7 100644 --- a/arch/arm/configs/qcom_defconfig +++ b/arch/arm/configs/qcom_defconfig @@ -278,7 +278,7 @@ CONFIG_PHY_QCOM_QMP=3Dy CONFIG_PHY_QCOM_USB_HS=3Dy CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=3Dy CONFIG_PHY_QCOM_USB_HSIC=3Dy -CONFIG_QCOM_QFPROM=3Dy +CONFIG_NVMEM_QCOM_QFPROM=3Dy CONFIG_INTERCONNECT=3Dy CONFIG_INTERCONNECT_QCOM=3Dy CONFIG_INTERCONNECT_QCOM_MSM8974=3Dm diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d5b2d2dd4904..c6e82787cca3 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1236,12 +1236,12 @@ CONFIG_QCOM_L3_PMU=3Dy CONFIG_HISI_PMU=3Dy CONFIG_NVMEM_IMX_OCOTP=3Dy CONFIG_NVMEM_IMX_OCOTP_SCU=3Dy -CONFIG_MTK_EFUSE=3Dy -CONFIG_QCOM_QFPROM=3Dy -CONFIG_ROCKCHIP_EFUSE=3Dy +CONFIG_NVMEM_MTK_EFUSE=3Dy +CONFIG_NVMEM_QCOM_QFPROM=3Dy +CONFIG_NVMEM_ROCKCHIP_EFUSE=3Dy CONFIG_NVMEM_SUNXI_SID=3Dy -CONFIG_UNIPHIER_EFUSE=3Dy -CONFIG_MESON_EFUSE=3Dm +CONFIG_NVMEM_UNIPHIER_EFUSE=3Dy +CONFIG_NVMEM_MESON_EFUSE=3Dm CONFIG_NVMEM_RMEM=3Dm CONFIG_NVMEM_LAYERSCAPE_SFP=3Dm CONFIG_FPGA=3Dy diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defc= onfig index cc69b215854e..e1b49f77414a 100644 --- a/arch/mips/configs/ci20_defconfig +++ b/arch/mips/configs/ci20_defconfig @@ -143,7 +143,7 @@ CONFIG_MEMORY=3Dy CONFIG_JZ4780_NEMC=3Dy CONFIG_PWM=3Dy CONFIG_PWM_JZ4740=3Dm -CONFIG_JZ4780_EFUSE=3Dy +CONFIG_NVMEM_JZ4780_EFUSE=3Dy CONFIG_JZ4770_PHY=3Dy CONFIG_EXT4_FS=3Dy # CONFIG_DNOTIFY is not set diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm index 954749afb5fe..82e5de1f6f8c 100644 --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -153,7 +153,7 @@ config ARM_OMAP2PLUS_CPUFREQ config ARM_QCOM_CPUFREQ_NVMEM tristate "Qualcomm nvmem based CPUFreq" depends on ARCH_QCOM - depends on QCOM_QFPROM + depends on NVMEM_QCOM_QFPROM depends on QCOM_SMEM select PM_OPP help diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index bab8a29c9861..691375c13381 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -52,7 +52,7 @@ config NVMEM_IMX_OCOTP_SCU This is a driver for the SCU On-Chip OTP Controller (OCOTP) available on i.MX8 SoCs. =20 -config JZ4780_EFUSE +config NVMEM_JZ4780_EFUSE tristate "JZ4780 EFUSE Memory Support" depends on MACH_INGENIC || COMPILE_TEST depends on HAS_IOMEM @@ -96,7 +96,7 @@ config NVMEM_MXS_OCOTP This driver can also be built as a module. If so, the module will be called nvmem-mxs-ocotp. =20 -config MTK_EFUSE +config NVMEM_MTK_EFUSE tristate "Mediatek SoCs EFUSE support" depends on ARCH_MEDIATEK || COMPILE_TEST depends on HAS_IOMEM @@ -107,7 +107,7 @@ config MTK_EFUSE This driver can also be built as a module. If so, the module will be called efuse-mtk. =20 -config MICROCHIP_OTPC +config NVMEM_MICROCHIP_OTPC tristate "Microchip OTPC support" depends on ARCH_AT91 || COMPILE_TEST help @@ -126,7 +126,7 @@ config NVMEM_NINTENDO_OTP This driver can also be built as a module. If so, the module will be called nvmem-nintendo-otp. =20 -config QCOM_QFPROM +config NVMEM_QCOM_QFPROM tristate "QCOM QFPROM Support" depends on ARCH_QCOM || COMPILE_TEST depends on HAS_IOMEM @@ -145,7 +145,7 @@ config NVMEM_SPMI_SDAM Qualcomm Technologies, Inc. PMICs. It provides the clients an interface to read/write to the SDAM module's shared memory. =20 -config ROCKCHIP_EFUSE +config NVMEM_ROCKCHIP_EFUSE tristate "Rockchip eFuse Support" depends on ARCH_ROCKCHIP || COMPILE_TEST depends on HAS_IOMEM @@ -156,7 +156,7 @@ config ROCKCHIP_EFUSE This driver can also be built as a module. If so, the module will be called nvmem_rockchip_efuse. =20 -config ROCKCHIP_OTP +config NVMEM_ROCKCHIP_OTP tristate "Rockchip OTP controller support" depends on ARCH_ROCKCHIP || COMPILE_TEST depends on HAS_IOMEM @@ -199,7 +199,7 @@ config NVMEM_SUNXI_SID This driver can also be built as a module. If so, the module will be called nvmem_sunxi_sid. =20 -config UNIPHIER_EFUSE +config NVMEM_UNIPHIER_EFUSE tristate "UniPhier SoCs eFuse support" depends on ARCH_UNIPHIER || COMPILE_TEST depends on HAS_IOMEM @@ -221,7 +221,7 @@ config NVMEM_VF610_OCOTP This driver can also be build as a module. If so, the module will be called nvmem-vf610-ocotp. =20 -config MESON_EFUSE +config NVMEM_MESON_EFUSE tristate "Amlogic Meson GX eFuse Support" depends on (ARCH_MESON || COMPILE_TEST) && MESON_SM help @@ -231,7 +231,7 @@ config MESON_EFUSE This driver can also be built as a module. If so, the module will be called nvmem_meson_efuse. =20 -config MESON_MX_EFUSE +config NVMEM_MESON_MX_EFUSE tristate "Amlogic Meson6/Meson8/Meson8b eFuse Support" depends on ARCH_MESON || COMPILE_TEST help @@ -251,13 +251,13 @@ config NVMEM_SNVS_LPGPR This driver can also be built as a module. If so, the module will be called nvmem-snvs-lpgpr. =20 -config RAVE_SP_EEPROM +config NVMEM_RAVE_SP_EEPROM tristate "Rave SP EEPROM Support" depends on RAVE_SP_CORE help Say y here to enable Rave SP EEPROM support. =20 -config SC27XX_EFUSE +config NVMEM_SC27XX_EFUSE tristate "Spreadtrum SC27XX eFuse Support" depends on MFD_SC27XX_PMIC || COMPILE_TEST depends on HAS_IOMEM @@ -278,7 +278,7 @@ config NVMEM_ZYNQMP =20 If sure, say yes. If unsure, say no. =20 -config SPRD_EFUSE +config NVMEM_SPRD_EFUSE tristate "Spreadtrum SoC eFuse Support" depends on ARCH_SPRD || COMPILE_TEST depends on HAS_IOMEM diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 399f9972d45b..7ac988c6966e 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -15,7 +15,7 @@ obj-$(CONFIG_NVMEM_IMX_OCOTP) +=3D nvmem-imx-ocotp.o nvmem-imx-ocotp-y :=3D imx-ocotp.o obj-$(CONFIG_NVMEM_IMX_OCOTP_SCU) +=3D nvmem-imx-ocotp-scu.o nvmem-imx-ocotp-scu-y :=3D imx-ocotp-scu.o -obj-$(CONFIG_JZ4780_EFUSE) +=3D nvmem_jz4780_efuse.o +obj-$(CONFIG_NVMEM_JZ4780_EFUSE) +=3D nvmem_jz4780_efuse.o nvmem_jz4780_efuse-y :=3D jz4780-efuse.o obj-$(CONFIG_NVMEM_LPC18XX_EEPROM) +=3D nvmem_lpc18xx_eeprom.o nvmem_lpc18xx_eeprom-y :=3D lpc18xx_eeprom.o @@ -25,37 +25,37 @@ obj-$(CONFIG_NVMEM_MXS_OCOTP) +=3D nvmem-mxs-ocotp.o nvmem-mxs-ocotp-y :=3D mxs-ocotp.o obj-$(CONFIG_NVMEM_NINTENDO_OTP) +=3D nvmem-nintendo-otp.o nvmem-nintendo-otp-y :=3D nintendo-otp.o -obj-$(CONFIG_MTK_EFUSE) +=3D nvmem_mtk-efuse.o +obj-$(CONFIG_NVMEM_MTK_EFUSE) +=3D nvmem_mtk-efuse.o nvmem_mtk-efuse-y :=3D mtk-efuse.o -obj-$(CONFIG_QCOM_QFPROM) +=3D nvmem_qfprom.o +obj-$(CONFIG_NVMEM_QCOM_QFPROM) +=3D nvmem_qfprom.o nvmem_qfprom-y :=3D qfprom.o obj-$(CONFIG_NVMEM_SPMI_SDAM) +=3D nvmem_qcom-spmi-sdam.o nvmem_qcom-spmi-sdam-y +=3D qcom-spmi-sdam.o -obj-$(CONFIG_ROCKCHIP_EFUSE) +=3D nvmem_rockchip_efuse.o +obj-$(CONFIG_NVMEM_ROCKCHIP_EFUSE) +=3D nvmem_rockchip_efuse.o nvmem_rockchip_efuse-y :=3D rockchip-efuse.o -obj-$(CONFIG_ROCKCHIP_OTP) +=3D nvmem-rockchip-otp.o +obj-$(CONFIG_NVMEM_ROCKCHIP_OTP) +=3D nvmem-rockchip-otp.o nvmem-rockchip-otp-y :=3D rockchip-otp.o obj-$(CONFIG_NVMEM_SUNXI_SID) +=3D nvmem_sunxi_sid.o nvmem_stm32_romem-y :=3D stm32-romem.o obj-$(CONFIG_NVMEM_STM32_ROMEM) +=3D nvmem_stm32_romem.o nvmem_sunxi_sid-y :=3D sunxi_sid.o -obj-$(CONFIG_UNIPHIER_EFUSE) +=3D nvmem-uniphier-efuse.o +obj-$(CONFIG_NVMEM_UNIPHIER_EFUSE) +=3D nvmem-uniphier-efuse.o nvmem-uniphier-efuse-y :=3D uniphier-efuse.o obj-$(CONFIG_NVMEM_VF610_OCOTP) +=3D nvmem-vf610-ocotp.o nvmem-vf610-ocotp-y :=3D vf610-ocotp.o -obj-$(CONFIG_MESON_EFUSE) +=3D nvmem_meson_efuse.o +obj-$(CONFIG_NVMEM_MESON_EFUSE) +=3D nvmem_meson_efuse.o nvmem_meson_efuse-y :=3D meson-efuse.o -obj-$(CONFIG_MESON_MX_EFUSE) +=3D nvmem_meson_mx_efuse.o +obj-$(CONFIG_NVMEM_MESON_MX_EFUSE) +=3D nvmem_meson_mx_efuse.o nvmem_meson_mx_efuse-y :=3D meson-mx-efuse.o obj-$(CONFIG_NVMEM_SNVS_LPGPR) +=3D nvmem_snvs_lpgpr.o nvmem_snvs_lpgpr-y :=3D snvs_lpgpr.o -obj-$(CONFIG_RAVE_SP_EEPROM) +=3D nvmem-rave-sp-eeprom.o +obj-$(CONFIG_NVMEM_RAVE_SP_EEPROM) +=3D nvmem-rave-sp-eeprom.o nvmem-rave-sp-eeprom-y :=3D rave-sp-eeprom.o -obj-$(CONFIG_SC27XX_EFUSE) +=3D nvmem-sc27xx-efuse.o +obj-$(CONFIG_NVMEM_SC27XX_EFUSE) +=3D nvmem-sc27xx-efuse.o nvmem-sc27xx-efuse-y :=3D sc27xx-efuse.o obj-$(CONFIG_NVMEM_ZYNQMP) +=3D nvmem_zynqmp_nvmem.o nvmem_zynqmp_nvmem-y :=3D zynqmp_nvmem.o -obj-$(CONFIG_SPRD_EFUSE) +=3D nvmem_sprd_efuse.o +obj-$(CONFIG_NVMEM_SPRD_EFUSE) +=3D nvmem_sprd_efuse.o nvmem_sprd_efuse-y :=3D sprd-efuse.o obj-$(CONFIG_NVMEM_RMEM) +=3D nvmem-rmem.o nvmem-rmem-y :=3D rmem.o @@ -67,7 +67,7 @@ obj-$(CONFIG_NVMEM_SUNPLUS_OCOTP) +=3D nvmem_sunplus_ocot= p.o nvmem_sunplus_ocotp-y :=3D sunplus-ocotp.o obj-$(CONFIG_NVMEM_APPLE_EFUSES) +=3D nvmem-apple-efuses.o nvmem-apple-efuses-y :=3D apple-efuses.o -obj-$(CONFIG_MICROCHIP_OTPC) +=3D nvmem-microchip-otpc.o +obj-$(CONFIG_NVMEM_MICROCHIP_OTPC) +=3D nvmem-microchip-otpc.o nvmem-microchip-otpc-y :=3D microchip-otpc.o obj-$(CONFIG_NVMEM_U_BOOT_ENV) +=3D nvmem_u-boot-env.o nvmem_u-boot-env-y :=3D u-boot-env.o diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig index 3c3eedea35f7..9b44dc3d9dff 100644 --- a/drivers/soc/mediatek/Kconfig +++ b/drivers/soc/mediatek/Kconfig @@ -75,7 +75,7 @@ config MTK_MMSYS =20 config MTK_SVS tristate "MediaTek Smart Voltage Scaling(SVS)" - depends on MTK_EFUSE && NVMEM + depends on NVMEM_MTK_EFUSE && NVMEM help The Smart Voltage Scaling(SVS) engine is a piece of hardware which has several controllers(banks) for calculating suitable diff --git a/drivers/thermal/qcom/Kconfig b/drivers/thermal/qcom/Kconfig index bfd889422dd3..2c7f3f9a26eb 100644 --- a/drivers/thermal/qcom/Kconfig +++ b/drivers/thermal/qcom/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config QCOM_TSENS tristate "Qualcomm TSENS Temperature Alarm" - depends on QCOM_QFPROM + depends on NVMEM_QCOM_QFPROM depends on ARCH_QCOM || COMPILE_TEST help This enables the thermal sysfs driver for the TSENS device. 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[86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:15 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Srinivas Kandagatla Subject: [PATCH 08/13] nvmem: sort config symbols alphabetically Date: Fri, 16 Sep 2022 13:20:55 +0100 Message-Id: <20220916122100.170016-9-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rafa=C5=82 Mi=C5=82ecki 1. Match what most subsystems do 2. Simplify maintenance a bit 3. Reduce amount of conflicts for new drivers patches While at it unify indent level in Makefile. Signed-off-by: Rafa=C5=82 Mi=C5=82ecki Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/Kconfig | 300 +++++++++++++++++++++-------------------- drivers/nvmem/Makefile | 114 ++++++++-------- 2 files changed, 208 insertions(+), 206 deletions(-) diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index 691375c13381..7f2557934834 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -21,6 +21,40 @@ config NVMEM_SYSFS This interface is mostly used by userspace applications to read/write directly into nvmem. =20 +# Devices + +config NVMEM_APPLE_EFUSES + tristate "Apple eFuse support" + depends on ARCH_APPLE || COMPILE_TEST + default ARCH_APPLE + help + Say y here to enable support for reading eFuses on Apple SoCs + such as the M1. These are e.g. used to store factory programmed + calibration data required for the PCIe or the USB-C PHY. + + This driver can also be built as a module. If so, the module will + be called nvmem-apple-efuses. + +config NVMEM_BCM_OCOTP + tristate "Broadcom On-Chip OTP Controller support" + depends on ARCH_BCM_IPROC || COMPILE_TEST + depends on HAS_IOMEM + default ARCH_BCM_IPROC + help + Say y here to enable read/write access to the Broadcom OTP + controller. + + This driver can also be built as a module. If so, the module + will be called nvmem-bcm-ocotp. + +config NVMEM_BRCM_NVRAM + tristate "Broadcom's NVRAM support" + depends on ARCH_BCM_5301X || COMPILE_TEST + depends on HAS_IOMEM + help + This driver provides support for Broadcom's NVRAM that can be accessed + using I/O mapping. + config NVMEM_IMX_IIM tristate "i.MX IC Identification Module support" depends on ARCH_MXC || COMPILE_TEST @@ -64,6 +98,19 @@ config NVMEM_JZ4780_EFUSE To compile this driver as a module, choose M here: the module will be called nvmem_jz4780_efuse. =20 +config NVMEM_LAYERSCAPE_SFP + tristate "Layerscape SFP (Security Fuse Processor) support" + depends on ARCH_LAYERSCAPE || COMPILE_TEST + depends on HAS_IOMEM + select REGMAP_MMIO + help + This driver provides support to read the eFuses on Freescale + Layerscape SoC's. For example, the vendor provides a per part + unique ID there. + + This driver can also be built as a module. If so, the module + will be called layerscape-sfp. + config NVMEM_LPC18XX_EEPROM tristate "NXP LPC18XX EEPROM Memory Support" depends on ARCH_LPC18XX || COMPILE_TEST @@ -84,17 +131,32 @@ config NVMEM_LPC18XX_OTP To compile this driver as a module, choose M here: the module will be called nvmem_lpc18xx_otp. =20 -config NVMEM_MXS_OCOTP - tristate "Freescale MXS On-Chip OTP Memory Support" - depends on ARCH_MXS || COMPILE_TEST - depends on HAS_IOMEM +config NVMEM_MESON_EFUSE + tristate "Amlogic Meson GX eFuse Support" + depends on (ARCH_MESON || COMPILE_TEST) && MESON_SM help - If you say Y here, you will get readonly access to the - One Time Programmable memory pages that are stored - on the Freescale i.MX23/i.MX28 processor. + This is a driver to retrieve specific values from the eFuse found on + the Amlogic Meson GX SoCs. =20 This driver can also be built as a module. If so, the module - will be called nvmem-mxs-ocotp. + will be called nvmem_meson_efuse. + +config NVMEM_MESON_MX_EFUSE + tristate "Amlogic Meson6/Meson8/Meson8b eFuse Support" + depends on ARCH_MESON || COMPILE_TEST + help + This is a driver to retrieve specific values from the eFuse found on + the Amlogic Meson6, Meson8 and Meson8b SoCs. + + This driver can also be built as a module. If so, the module + will be called nvmem_meson_mx_efuse. + +config NVMEM_MICROCHIP_OTPC + tristate "Microchip OTPC support" + depends on ARCH_AT91 || COMPILE_TEST + help + This driver enable the OTP controller available on Microchip SAMA7G5 + SoCs. It controlls the access to the OTP memory connected to it. =20 config NVMEM_MTK_EFUSE tristate "Mediatek SoCs EFUSE support" @@ -107,12 +169,17 @@ config NVMEM_MTK_EFUSE This driver can also be built as a module. If so, the module will be called efuse-mtk. =20 -config NVMEM_MICROCHIP_OTPC - tristate "Microchip OTPC support" - depends on ARCH_AT91 || COMPILE_TEST +config NVMEM_MXS_OCOTP + tristate "Freescale MXS On-Chip OTP Memory Support" + depends on ARCH_MXS || COMPILE_TEST + depends on HAS_IOMEM help - This driver enable the OTP controller available on Microchip SAMA7G5 - SoCs. It controlls the access to the OTP memory connected to it. + If you say Y here, you will get readonly access to the + One Time Programmable memory pages that are stored + on the Freescale i.MX23/i.MX28 processor. + + This driver can also be built as a module. If so, the module + will be called nvmem-mxs-ocotp. =20 config NVMEM_NINTENDO_OTP tristate "Nintendo Wii and Wii U OTP Support" @@ -137,13 +204,21 @@ config NVMEM_QCOM_QFPROM This driver can also be built as a module. If so, the module will be called nvmem_qfprom. =20 -config NVMEM_SPMI_SDAM - tristate "SPMI SDAM Support" - depends on SPMI +config NVMEM_RAVE_SP_EEPROM + tristate "Rave SP EEPROM Support" + depends on RAVE_SP_CORE help - This driver supports the Shared Direct Access Memory Module on - Qualcomm Technologies, Inc. PMICs. It provides the clients - an interface to read/write to the SDAM module's shared memory. + Say y here to enable Rave SP EEPROM support. + +config NVMEM_RMEM + tristate "Reserved Memory Based Driver Support" + depends on HAS_IOMEM + help + This driver maps reserved memory into an nvmem device. It might be + useful to expose information left by firmware in memory. + + This driver can also be built as a module. If so, the module + will be called nvmem-rmem. =20 config NVMEM_ROCKCHIP_EFUSE tristate "Rockchip eFuse Support" @@ -167,79 +242,16 @@ config NVMEM_ROCKCHIP_OTP This driver can also be built as a module. If so, the module will be called nvmem_rockchip_otp. =20 -config NVMEM_BCM_OCOTP - tristate "Broadcom On-Chip OTP Controller support" - depends on ARCH_BCM_IPROC || COMPILE_TEST - depends on HAS_IOMEM - default ARCH_BCM_IPROC - help - Say y here to enable read/write access to the Broadcom OTP - controller. - - This driver can also be built as a module. If so, the module - will be called nvmem-bcm-ocotp. - -config NVMEM_STM32_ROMEM - tristate "STMicroelectronics STM32 factory-programmed memory support" - depends on ARCH_STM32 || COMPILE_TEST - help - Say y here to enable read-only access for STMicroelectronics STM32 - factory-programmed memory area. - - This driver can also be built as a module. If so, the module - will be called nvmem-stm32-romem. - -config NVMEM_SUNXI_SID - tristate "Allwinner SoCs SID support" - depends on ARCH_SUNXI - help - This is a driver for the 'security ID' available on various Allwinner - devices. - - This driver can also be built as a module. If so, the module - will be called nvmem_sunxi_sid. - -config NVMEM_UNIPHIER_EFUSE - tristate "UniPhier SoCs eFuse support" - depends on ARCH_UNIPHIER || COMPILE_TEST - depends on HAS_IOMEM - help - This is a simple driver to dump specified values of UniPhier SoC - from eFuse. - - This driver can also be built as a module. If so, the module - will be called nvmem-uniphier-efuse. - -config NVMEM_VF610_OCOTP - tristate "VF610 SoC OCOTP support" - depends on SOC_VF610 || COMPILE_TEST +config NVMEM_SC27XX_EFUSE + tristate "Spreadtrum SC27XX eFuse Support" + depends on MFD_SC27XX_PMIC || COMPILE_TEST depends on HAS_IOMEM help - This is a driver for the 'OCOTP' peripheral available on Vybrid - devices like VF5xx and VF6xx. - - This driver can also be build as a module. If so, the module will - be called nvmem-vf610-ocotp. - -config NVMEM_MESON_EFUSE - tristate "Amlogic Meson GX eFuse Support" - depends on (ARCH_MESON || COMPILE_TEST) && MESON_SM - help - This is a driver to retrieve specific values from the eFuse found on - the Amlogic Meson GX SoCs. - - This driver can also be built as a module. If so, the module - will be called nvmem_meson_efuse. - -config NVMEM_MESON_MX_EFUSE - tristate "Amlogic Meson6/Meson8/Meson8b eFuse Support" - depends on ARCH_MESON || COMPILE_TEST - help - This is a driver to retrieve specific values from the eFuse found on - the Amlogic Meson6, Meson8 and Meson8b SoCs. + This is a simple driver to dump specified values of Spreadtrum + SC27XX PMICs from eFuse. =20 This driver can also be built as a module. If so, the module - will be called nvmem_meson_mx_efuse. + will be called nvmem-sc27xx-efuse. =20 config NVMEM_SNVS_LPGPR tristate "Support for Low Power General Purpose Register" @@ -251,32 +263,13 @@ config NVMEM_SNVS_LPGPR This driver can also be built as a module. If so, the module will be called nvmem-snvs-lpgpr. =20 -config NVMEM_RAVE_SP_EEPROM - tristate "Rave SP EEPROM Support" - depends on RAVE_SP_CORE - help - Say y here to enable Rave SP EEPROM support. - -config NVMEM_SC27XX_EFUSE - tristate "Spreadtrum SC27XX eFuse Support" - depends on MFD_SC27XX_PMIC || COMPILE_TEST - depends on HAS_IOMEM - help - This is a simple driver to dump specified values of Spreadtrum - SC27XX PMICs from eFuse. - - This driver can also be built as a module. If so, the module - will be called nvmem-sc27xx-efuse. - -config NVMEM_ZYNQMP - bool "Xilinx ZYNQMP SoC nvmem firmware support" - depends on ARCH_ZYNQMP +config NVMEM_SPMI_SDAM + tristate "SPMI SDAM Support" + depends on SPMI help - This is a driver to access hardware related data like - soc revision, IDCODE... etc by using the firmware - interface. - - If sure, say yes. If unsure, say no. + This driver supports the Shared Direct Access Memory Module on + Qualcomm Technologies, Inc. PMICs. It provides the clients + an interface to read/write to the SDAM module's shared memory. =20 config NVMEM_SPRD_EFUSE tristate "Spreadtrum SoC eFuse Support" @@ -289,36 +282,15 @@ config NVMEM_SPRD_EFUSE This driver can also be built as a module. If so, the module will be called nvmem-sprd-efuse. =20 -config NVMEM_RMEM - tristate "Reserved Memory Based Driver Support" - depends on HAS_IOMEM - help - This driver maps reserved memory into an nvmem device. It might be - useful to expose information left by firmware in memory. - - This driver can also be built as a module. If so, the module - will be called nvmem-rmem. - -config NVMEM_BRCM_NVRAM - tristate "Broadcom's NVRAM support" - depends on ARCH_BCM_5301X || COMPILE_TEST - depends on HAS_IOMEM - help - This driver provides support for Broadcom's NVRAM that can be accessed - using I/O mapping. - -config NVMEM_LAYERSCAPE_SFP - tristate "Layerscape SFP (Security Fuse Processor) support" - depends on ARCH_LAYERSCAPE || COMPILE_TEST - depends on HAS_IOMEM - select REGMAP_MMIO +config NVMEM_STM32_ROMEM + tristate "STMicroelectronics STM32 factory-programmed memory support" + depends on ARCH_STM32 || COMPILE_TEST help - This driver provides support to read the eFuses on Freescale - Layerscape SoC's. For example, the vendor provides a per part - unique ID there. + Say y here to enable read-only access for STMicroelectronics STM32 + factory-programmed memory area. =20 This driver can also be built as a module. If so, the module - will be called layerscape-sfp. + will be called nvmem-stm32-romem. =20 config NVMEM_SUNPLUS_OCOTP tristate "Sunplus SoC OTP support" @@ -332,17 +304,15 @@ config NVMEM_SUNPLUS_OCOTP This driver can also be built as a module. If so, the module will be called nvmem-sunplus-ocotp. =20 -config NVMEM_APPLE_EFUSES - tristate "Apple eFuse support" - depends on ARCH_APPLE || COMPILE_TEST - default ARCH_APPLE +config NVMEM_SUNXI_SID + tristate "Allwinner SoCs SID support" + depends on ARCH_SUNXI help - Say y here to enable support for reading eFuses on Apple SoCs - such as the M1. These are e.g. used to store factory programmed - calibration data required for the PCIe or the USB-C PHY. + This is a driver for the 'security ID' available on various Allwinner + devices. =20 - This driver can also be built as a module. If so, the module will - be called nvmem-apple-efuses. + This driver can also be built as a module. If so, the module + will be called nvmem_sunxi_sid. =20 config NVMEM_U_BOOT_ENV tristate "U-Boot environment variables support" @@ -357,4 +327,36 @@ config NVMEM_U_BOOT_ENV =20 If compiled as module it will be called nvmem_u-boot-env. =20 +config NVMEM_UNIPHIER_EFUSE + tristate "UniPhier SoCs eFuse support" + depends on ARCH_UNIPHIER || COMPILE_TEST + depends on HAS_IOMEM + help + This is a simple driver to dump specified values of UniPhier SoC + from eFuse. + + This driver can also be built as a module. If so, the module + will be called nvmem-uniphier-efuse. + +config NVMEM_VF610_OCOTP + tristate "VF610 SoC OCOTP support" + depends on SOC_VF610 || COMPILE_TEST + depends on HAS_IOMEM + help + This is a driver for the 'OCOTP' peripheral available on Vybrid + devices like VF5xx and VF6xx. + + This driver can also be build as a module. If so, the module will + be called nvmem-vf610-ocotp. + +config NVMEM_ZYNQMP + bool "Xilinx ZYNQMP SoC nvmem firmware support" + depends on ARCH_ZYNQMP + help + This is a driver to access hardware related data like + soc revision, IDCODE... etc by using the firmware + interface. + + If sure, say yes. If unsure, say no. + endif diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 7ac988c6966e..bac799b2fa8d 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -7,67 +7,67 @@ obj-$(CONFIG_NVMEM) +=3D nvmem_core.o nvmem_core-y :=3D core.o =20 # Devices -obj-$(CONFIG_NVMEM_BCM_OCOTP) +=3D nvmem-bcm-ocotp.o -nvmem-bcm-ocotp-y :=3D bcm-ocotp.o -obj-$(CONFIG_NVMEM_IMX_IIM) +=3D nvmem-imx-iim.o -nvmem-imx-iim-y :=3D imx-iim.o -obj-$(CONFIG_NVMEM_IMX_OCOTP) +=3D nvmem-imx-ocotp.o -nvmem-imx-ocotp-y :=3D imx-ocotp.o +obj-$(CONFIG_NVMEM_APPLE_EFUSES) +=3D nvmem-apple-efuses.o +nvmem-apple-efuses-y :=3D apple-efuses.o +obj-$(CONFIG_NVMEM_BCM_OCOTP) +=3D nvmem-bcm-ocotp.o +nvmem-bcm-ocotp-y :=3D bcm-ocotp.o +obj-$(CONFIG_NVMEM_BRCM_NVRAM) +=3D nvmem_brcm_nvram.o +nvmem_brcm_nvram-y :=3D brcm_nvram.o +obj-$(CONFIG_NVMEM_IMX_IIM) +=3D nvmem-imx-iim.o +nvmem-imx-iim-y :=3D imx-iim.o +obj-$(CONFIG_NVMEM_IMX_OCOTP) +=3D nvmem-imx-ocotp.o +nvmem-imx-ocotp-y :=3D imx-ocotp.o obj-$(CONFIG_NVMEM_IMX_OCOTP_SCU) +=3D nvmem-imx-ocotp-scu.o -nvmem-imx-ocotp-scu-y :=3D imx-ocotp-scu.o -obj-$(CONFIG_NVMEM_JZ4780_EFUSE) +=3D nvmem_jz4780_efuse.o -nvmem_jz4780_efuse-y :=3D jz4780-efuse.o +nvmem-imx-ocotp-scu-y :=3D imx-ocotp-scu.o +obj-$(CONFIG_NVMEM_JZ4780_EFUSE) +=3D nvmem_jz4780_efuse.o +nvmem_jz4780_efuse-y :=3D jz4780-efuse.o +obj-$(CONFIG_NVMEM_LAYERSCAPE_SFP) +=3D nvmem-layerscape-sfp.o +nvmem-layerscape-sfp-y :=3D layerscape-sfp.o obj-$(CONFIG_NVMEM_LPC18XX_EEPROM) +=3D nvmem_lpc18xx_eeprom.o -nvmem_lpc18xx_eeprom-y :=3D lpc18xx_eeprom.o -obj-$(CONFIG_NVMEM_LPC18XX_OTP) +=3D nvmem_lpc18xx_otp.o -nvmem_lpc18xx_otp-y :=3D lpc18xx_otp.o -obj-$(CONFIG_NVMEM_MXS_OCOTP) +=3D nvmem-mxs-ocotp.o -nvmem-mxs-ocotp-y :=3D mxs-ocotp.o -obj-$(CONFIG_NVMEM_NINTENDO_OTP) +=3D nvmem-nintendo-otp.o -nvmem-nintendo-otp-y :=3D nintendo-otp.o +nvmem_lpc18xx_eeprom-y :=3D lpc18xx_eeprom.o +obj-$(CONFIG_NVMEM_LPC18XX_OTP) +=3D nvmem_lpc18xx_otp.o +nvmem_lpc18xx_otp-y :=3D lpc18xx_otp.o +obj-$(CONFIG_NVMEM_MESON_EFUSE) +=3D nvmem_meson_efuse.o +nvmem_meson_efuse-y :=3D meson-efuse.o +obj-$(CONFIG_NVMEM_MESON_MX_EFUSE) +=3D nvmem_meson_mx_efuse.o +nvmem_meson_mx_efuse-y :=3D meson-mx-efuse.o +obj-$(CONFIG_NVMEM_MICROCHIP_OTPC) +=3D nvmem-microchip-otpc.o +nvmem-microchip-otpc-y :=3D microchip-otpc.o obj-$(CONFIG_NVMEM_MTK_EFUSE) +=3D nvmem_mtk-efuse.o -nvmem_mtk-efuse-y :=3D mtk-efuse.o -obj-$(CONFIG_NVMEM_QCOM_QFPROM) +=3D nvmem_qfprom.o -nvmem_qfprom-y :=3D qfprom.o -obj-$(CONFIG_NVMEM_SPMI_SDAM) +=3D nvmem_qcom-spmi-sdam.o -nvmem_qcom-spmi-sdam-y +=3D qcom-spmi-sdam.o +nvmem_mtk-efuse-y :=3D mtk-efuse.o +obj-$(CONFIG_NVMEM_MXS_OCOTP) +=3D nvmem-mxs-ocotp.o +nvmem-mxs-ocotp-y :=3D mxs-ocotp.o +obj-$(CONFIG_NVMEM_NINTENDO_OTP) +=3D nvmem-nintendo-otp.o +nvmem-nintendo-otp-y :=3D nintendo-otp.o +obj-$(CONFIG_NVMEM_QCOM_QFPROM) +=3D nvmem_qfprom.o +nvmem_qfprom-y :=3D qfprom.o +obj-$(CONFIG_NVMEM_RAVE_SP_EEPROM) +=3D nvmem-rave-sp-eeprom.o +nvmem-rave-sp-eeprom-y :=3D rave-sp-eeprom.o +obj-$(CONFIG_NVMEM_RMEM) +=3D nvmem-rmem.o +nvmem-rmem-y :=3D rmem.o obj-$(CONFIG_NVMEM_ROCKCHIP_EFUSE) +=3D nvmem_rockchip_efuse.o -nvmem_rockchip_efuse-y :=3D rockchip-efuse.o +nvmem_rockchip_efuse-y :=3D rockchip-efuse.o obj-$(CONFIG_NVMEM_ROCKCHIP_OTP) +=3D nvmem-rockchip-otp.o -nvmem-rockchip-otp-y :=3D rockchip-otp.o -obj-$(CONFIG_NVMEM_SUNXI_SID) +=3D nvmem_sunxi_sid.o -nvmem_stm32_romem-y :=3D stm32-romem.o -obj-$(CONFIG_NVMEM_STM32_ROMEM) +=3D nvmem_stm32_romem.o -nvmem_sunxi_sid-y :=3D sunxi_sid.o -obj-$(CONFIG_NVMEM_UNIPHIER_EFUSE) +=3D nvmem-uniphier-efuse.o -nvmem-uniphier-efuse-y :=3D uniphier-efuse.o -obj-$(CONFIG_NVMEM_VF610_OCOTP) +=3D nvmem-vf610-ocotp.o -nvmem-vf610-ocotp-y :=3D vf610-ocotp.o -obj-$(CONFIG_NVMEM_MESON_EFUSE) +=3D nvmem_meson_efuse.o -nvmem_meson_efuse-y :=3D meson-efuse.o -obj-$(CONFIG_NVMEM_MESON_MX_EFUSE) +=3D nvmem_meson_mx_efuse.o -nvmem_meson_mx_efuse-y :=3D meson-mx-efuse.o -obj-$(CONFIG_NVMEM_SNVS_LPGPR) +=3D nvmem_snvs_lpgpr.o -nvmem_snvs_lpgpr-y :=3D snvs_lpgpr.o -obj-$(CONFIG_NVMEM_RAVE_SP_EEPROM) +=3D nvmem-rave-sp-eeprom.o -nvmem-rave-sp-eeprom-y :=3D rave-sp-eeprom.o +nvmem-rockchip-otp-y :=3D rockchip-otp.o obj-$(CONFIG_NVMEM_SC27XX_EFUSE) +=3D nvmem-sc27xx-efuse.o -nvmem-sc27xx-efuse-y :=3D sc27xx-efuse.o -obj-$(CONFIG_NVMEM_ZYNQMP) +=3D nvmem_zynqmp_nvmem.o -nvmem_zynqmp_nvmem-y :=3D zynqmp_nvmem.o -obj-$(CONFIG_NVMEM_SPRD_EFUSE) +=3D nvmem_sprd_efuse.o -nvmem_sprd_efuse-y :=3D sprd-efuse.o -obj-$(CONFIG_NVMEM_RMEM) +=3D nvmem-rmem.o -nvmem-rmem-y :=3D rmem.o -obj-$(CONFIG_NVMEM_BRCM_NVRAM) +=3D nvmem_brcm_nvram.o -nvmem_brcm_nvram-y :=3D brcm_nvram.o -obj-$(CONFIG_NVMEM_LAYERSCAPE_SFP) +=3D nvmem-layerscape-sfp.o -nvmem-layerscape-sfp-y :=3D layerscape-sfp.o +nvmem-sc27xx-efuse-y :=3D sc27xx-efuse.o +obj-$(CONFIG_NVMEM_SNVS_LPGPR) +=3D nvmem_snvs_lpgpr.o +nvmem_snvs_lpgpr-y :=3D snvs_lpgpr.o +obj-$(CONFIG_NVMEM_SPMI_SDAM) +=3D nvmem_qcom-spmi-sdam.o +nvmem_qcom-spmi-sdam-y +=3D qcom-spmi-sdam.o +obj-$(CONFIG_NVMEM_SPRD_EFUSE) +=3D nvmem_sprd_efuse.o +nvmem_sprd_efuse-y :=3D sprd-efuse.o +obj-$(CONFIG_NVMEM_STM32_ROMEM) +=3D nvmem_stm32_romem.o +nvmem_stm32_romem-y :=3D stm32-romem.o obj-$(CONFIG_NVMEM_SUNPLUS_OCOTP) +=3D nvmem_sunplus_ocotp.o -nvmem_sunplus_ocotp-y :=3D sunplus-ocotp.o -obj-$(CONFIG_NVMEM_APPLE_EFUSES) +=3D nvmem-apple-efuses.o -nvmem-apple-efuses-y :=3D apple-efuses.o -obj-$(CONFIG_NVMEM_MICROCHIP_OTPC) +=3D nvmem-microchip-otpc.o -nvmem-microchip-otpc-y :=3D microchip-otpc.o -obj-$(CONFIG_NVMEM_U_BOOT_ENV) +=3D nvmem_u-boot-env.o -nvmem_u-boot-env-y :=3D u-boot-env.o +nvmem_sunplus_ocotp-y :=3D sunplus-ocotp.o +obj-$(CONFIG_NVMEM_SUNXI_SID) +=3D nvmem_sunxi_sid.o +nvmem_sunxi_sid-y :=3D sunxi_sid.o +obj-$(CONFIG_NVMEM_U_BOOT_ENV) +=3D nvmem_u-boot-env.o +nvmem_u-boot-env-y :=3D u-boot-env.o +obj-$(CONFIG_NVMEM_UNIPHIER_EFUSE) +=3D nvmem-uniphier-efuse.o +nvmem-uniphier-efuse-y :=3D uniphier-efuse.o +obj-$(CONFIG_NVMEM_VF610_OCOTP) +=3D nvmem-vf610-ocotp.o +nvmem-vf610-ocotp-y :=3D vf610-ocotp.o +obj-$(CONFIG_NVMEM_ZYNQMP) +=3D nvmem_zynqmp_nvmem.o +nvmem_zynqmp_nvmem-y :=3D zynqmp_nvmem.o --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E89D3C54EE9 for ; Fri, 16 Sep 2022 12:21:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229893AbiIPMVp (ORCPT ); Fri, 16 Sep 2022 08:21:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231549AbiIPMVX (ORCPT ); Fri, 16 Sep 2022 08:21:23 -0400 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by 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[86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:16 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Iskren Chernev , Krzysztof Kozlowski , Caleb Connolly , Srinivas Kandagatla Subject: [PATCH 09/13] dt-bindings: nvmem: Add SoC compatible for sm6115 Date: Fri, 16 Sep 2022 13:20:56 +0100 Message-Id: <20220916122100.170016-10-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Iskren Chernev Document SoC compatible for sm6115. Signed-off-by: Iskren Chernev Acked-by: Krzysztof Kozlowski Reviewed-by: Caleb Connolly Signed-off-by: Srinivas Kandagatla --- Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Doc= umentation/devicetree/bindings/nvmem/qcom,qfprom.yaml index b4163086a5be..2eab2f46cb65 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml @@ -28,6 +28,7 @@ properties: - qcom,sc7280-qfprom - qcom,sdm630-qfprom - qcom,sdm845-qfprom + - qcom,sm6115-qfprom - const: qcom,qfprom =20 reg: --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CEF6ECAAD8 for ; Fri, 16 Sep 2022 12:21:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229497AbiIPMVu (ORCPT ); Fri, 16 Sep 2022 08:21:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231548AbiIPMVW (ORCPT ); Fri, 16 Sep 2022 08:21:22 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A301BB1B9E for ; Fri, 16 Sep 2022 05:21:20 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id n35-20020a05600c502300b003b4924c6868so813074wmr.1 for ; Fri, 16 Sep 2022 05:21:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=EKLE8G7VsXBfz2sMQKTlT9oA8vhyiMjcMlyDKxWNGcA=; b=G3bghYNZxVOKWOCFldlhbHPkiUjddVLXde8clBPCep+fF3caWeBs0Z2V/p+jfQ+3Ln AG+Zch/FjojUC9f6dy8KHwkEVuYChfzFNgl6TXQTTypk5oEXtEyOztSg/ltMl/q8mL5j dGEIBHxXh15Tw5vkS4Tw9JEiwWPi8PbTiF9Qd/GnZ3iygtKycYHYJYiO8qeEwz9PXSBV iziz25XBXmgiHhqe1vXMA/31gX4GHMeMBxpYQWidC1eJjFX54Hc7krTtDpbCg5AZoqRr xpryOfQBojEextA4bX7il+jUVYiPLCiPQcgWpSAQgJZAclkQ0cZG3jISuCQOYcZ9d8Kn y19Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=EKLE8G7VsXBfz2sMQKTlT9oA8vhyiMjcMlyDKxWNGcA=; b=l1kjkltcGwkLS1lAJ6DTbsSnaNSIy4nYZNBX4SCqAZnxDQtt93SO4GnOTABgZ3sHc9 oCdfTa/xTT6zCl1JnP/PbLYrx1gSFIIKuf2dkGiigjJnGzs3hJB5bxFzRVoCkJO1Lhza A7e9OtM0+yjMETLNP6dKiTmh1l07ZjBosawLOzEkWBwzG2LoNXR9i33uqOWnoQhqaQva M0LiyHhIiSlWtA2vR6Cr9dXJ3biqJ2MpZ4N4d0wFXyNjarueegMxb5tHIc60c9L1aHGU o1mtrTR/wWOE/PqyK2LgPXIpNWmt/iNNwSIfwgvGtABn8TY8LqK0sMZ6BXVo4Kvqs6v2 IIJw== X-Gm-Message-State: ACgBeo1/as94Qp4ypxcNLoDp8ET6w2c/kqFSgOQ7b8MlGCA1MaHvuhT+ lJNO4UEoQsYb2KBXOY7vX0rLyw== X-Google-Smtp-Source: AA6agR4OUU5qldq6AYPd8MeNobZKHt1W4FgEM6kfE4s+0ZzJRxXNvCGw9IUD3/kD1I2oRAyXZEAwug== X-Received: by 2002:a05:600c:3781:b0:3a6:804a:afc with SMTP id o1-20020a05600c378100b003a6804a0afcmr9977979wmr.27.1663330878330; Fri, 16 Sep 2022 05:21:18 -0700 (PDT) Received: from srini-hackbase.lan (cpc90716-aztw32-2-0-cust825.18-1.cable.virginm.net. [86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:17 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Srinivas Kandagatla Subject: [PATCH 10/13] nvmem: u-boot-env: find Device Tree nodes for NVMEM cells Date: Fri, 16 Sep 2022 13:20:57 +0100 Message-Id: <20220916122100.170016-11-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rafa=C5=82 Mi=C5=82ecki DT binding allows specifying NVMEM cells as NVMEM device (provider) subnodes. Looks for such subnodes when building NVMEM cells. This allows NVMEM consumers to use U-Boot environment variables. Signed-off-by: Rafa=C5=82 Mi=C5=82ecki Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/u-boot-env.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/nvmem/u-boot-env.c b/drivers/nvmem/u-boot-env.c index 9b9abfb8f187..d17a164ae705 100644 --- a/drivers/nvmem/u-boot-env.c +++ b/drivers/nvmem/u-boot-env.c @@ -92,6 +92,7 @@ static int u_boot_env_add_cells(struct u_boot_env *priv, = uint8_t *buf, return -ENOMEM; priv->cells[idx].offset =3D data_offset + value - data; priv->cells[idx].bytes =3D strlen(value); + priv->cells[idx].np =3D of_get_child_by_name(dev->of_node, priv->cells[i= dx].name); } =20 if (WARN_ON(idx !=3D priv->ncells)) --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38496C54EE9 for ; Fri, 16 Sep 2022 12:22:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231701AbiIPMWF (ORCPT ); Fri, 16 Sep 2022 08:22:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231567AbiIPMVZ (ORCPT ); Fri, 16 Sep 2022 08:21:25 -0400 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C77AB14DF for ; Fri, 16 Sep 2022 05:21:21 -0700 (PDT) Received: by mail-wr1-x432.google.com with SMTP id d2so201008wrq.2 for ; Fri, 16 Sep 2022 05:21:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=zxb2eOYdbFuIwriIiJENiShYuzhFLs8VI8hEdSxtZI4=; b=dJENqT5SmssLbc9m96wJVytWaLVPEqOYq8HoGtclBFP40G6/qaEymUD4L4ptdBGP3R x5r+jgSQRb+RJY2o1UEDn50v+zZx56VEuBQZQNJgJ0+y9qpzdldYokd3v3Sax2l/ykVD +eK+1vI5ZlrT0w5RLJEGRDRD7pey/Zksj1M+P+a1wZcI3hEtyyQULMNOOnjI2e5bGH8f 0xRAMrw75bbKd6PBzJmX/t++WiIGeLqCPI7wmrOQV+FagUybQwGCEBFHm6IDVX//ZfKs IZbId06UnCwcrOPfHeJM9IqiZwyeBGw8lbnhqa8wjiB6OqSU/vwoj8mG1Po+B93l3yhk 2w9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=zxb2eOYdbFuIwriIiJENiShYuzhFLs8VI8hEdSxtZI4=; b=RxNcrMhRpWlbUcvXvCakHoBlVGhDV7LEf/XIjlTU8QcSrnUC/UrVhO4AroP5g9uher SiWlfUCFWQjx8euRsKrYc9PpQr0qyeqH/uy8jQ3Z23eCcAJWujnD3f8xo2Q1htlp7TYx pZHJOjgZMIG9dMcDDZq7qCNc1ymXv1aWDv1pv3JzI/qL9hbWZsLkDhlL/YkH6sxkOghz DgXNjiyWyFY8nfNwF9UQNRXNv0lTW/wom2AYyUY6QcnD0mj1KPOziBbOyj5sB+3MaIpj 8qWj0SWdVZTdYbxwmHz2bUcKW9/03Mz1x4245V4c/GhaHrthh5eWszw5U3OEDXZxP42W CO+Q== X-Gm-Message-State: ACrzQf3pg/9uHR9O4kI1kod9p+Z/S5b/TrE0WHXA1jlcEbRhWU0XTpzf kCVYlNGgTdfVz6dtSMNT1dg4Kw== X-Google-Smtp-Source: AMsMyM7pYbr/gLRJ/QjEXxATOLucnIKEqgDSegZtMFndzFkBYgYW5+4/Ig+CjDtRITYqrN34XVIH3w== X-Received: by 2002:a5d:5452:0:b0:228:d6f0:dbeb with SMTP id w18-20020a5d5452000000b00228d6f0dbebmr2741501wrv.84.1663330879251; Fri, 16 Sep 2022 05:21:19 -0700 (PDT) Received: from srini-hackbase.lan (cpc90716-aztw32-2-0-cust825.18-1.cable.virginm.net. [86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:18 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Horatiu Vultur , Krzysztof Kozlowski , Srinivas Kandagatla Subject: [PATCH 11/13] dt-bindings: lan9662-otpc: document Lan9662 OTPC Date: Fri, 16 Sep 2022 13:20:58 +0100 Message-Id: <20220916122100.170016-12-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Horatiu Vultur Document Lan9662 OTP controller. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Horatiu Vultur Signed-off-by: Srinivas Kandagatla --- .../nvmem/microchip,lan9662-otpc.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/microchip,lan96= 62-otpc.yaml diff --git a/Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc= .yaml b/Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml new file mode 100644 index 000000000000..f97c6beb4766 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/microchip,lan9662-otpc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip LAN9662 OTP Controller (OTPC) + +maintainers: + - Horatiu Vultur + +description: | + OTP controller drives a NVMEM memory where system specific data + (e.g. hardware configuration settings, chip identifiers) or + user specific data could be stored. + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + oneOf: + - items: + - const: microchip,lan9668-otpc + - const: microchip,lan9662-otpc + - enum: + - microchip,lan9662-otpc + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + otpc: otp@e0021000 { + compatible =3D "microchip,lan9662-otpc"; + reg =3D <0xe0021000 0x300>; + }; + +... --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 854F3C54EE9 for ; Fri, 16 Sep 2022 12:22:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231480AbiIPMWP (ORCPT ); Fri, 16 Sep 2022 08:22:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231586AbiIPMV3 (ORCPT ); Fri, 16 Sep 2022 08:21:29 -0400 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4EAD7B14F4 for ; Fri, 16 Sep 2022 05:21:22 -0700 (PDT) Received: by mail-wr1-x435.google.com with SMTP id d2so201097wrq.2 for ; Fri, 16 Sep 2022 05:21:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=h5pjjtpvuIBmXpwkOM+KyNe1mesHrCkdZB5vEBZPnfc=; b=Qfolmw2zjYhSKK7DBk+XSztHeKQFLTZ4/K7LkB5pJ9Jgtklf7UEBbwJ+xbVt3tvblo +05C5qdIenx66Mfsv4o1WUYEg5yIypu2NReVJmLGHSph4tVJdCPzjTiZnuR6hUlP2XeT e8XXlZOCjF0P+WQkfPnoGOzdcd14WKI9Y7AIaODgibFj/eP0L5Wryx5p6w7UCwpmxOPR g4qf0WT/dGJuXrXVP4EFXHZ+FhSawl/QYoxOnBhociex3yKwcZYti0Wmu//Zf0L0lJil 2yyqv8WGcUtDvg5FQGpc7Gque1ZW8My5zdZzytlcYtXtjlNqlxptCX2VzghkEu3QBG4R kgVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=h5pjjtpvuIBmXpwkOM+KyNe1mesHrCkdZB5vEBZPnfc=; b=nmrgo8IiCUp72rf7rmd2YP20Eg3HCkSuIxE+k/mZ4d+eBY4oMl7/9Q17xfV5b/zeLL 5y7yXJuNywEiiNH7FVxN+2Sr1c/JHdVpjoLIepzWmjsHEs6Osgen7WGHfXg6bqtgdbWX Zd1aI+15k/D+6j71ztTZ8GTHI67O8rR/TQT5XbWgnieJQFy3xJ6AgDGZSR3it+BJbR0o VSYfKmpw/+O41ZBvN0+Z7s2tJVx9Sh4j1EIgFJNdPYJVE8Wr8qaa9JqCgVTxqs67tGCK ZVwy8JbuZ9Z+VvdT1o2zGkfkQ5L6Ft6vQ0Ts/6oMMxqhVVPzHlI2BO5NUgvkTITNPcli UfWg== X-Gm-Message-State: ACrzQf3sgzWWpBahNKovboEOj2xXMmyoStT2vWB3w3wo1eNOdpWM4YVp +j/7ojNJnvDAlEGKK4bRrn/Fww== X-Google-Smtp-Source: AMsMyM4/rSE1ktxoe4RBjklMEhVyFkCvyFkwHpJ+nLxp5wVdQ5dG4DPrCU6zfs5spsVR7goNt+KKhw== X-Received: by 2002:a5d:52d0:0:b0:21e:4923:fa09 with SMTP id r16-20020a5d52d0000000b0021e4923fa09mr2800095wrv.244.1663330880338; Fri, 16 Sep 2022 05:21:20 -0700 (PDT) Received: from srini-hackbase.lan (cpc90716-aztw32-2-0-cust825.18-1.cable.virginm.net. [86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:19 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Horatiu Vultur , Srinivas Kandagatla Subject: [PATCH 12/13] nvmem: lan9662-otp: add support Date: Fri, 16 Sep 2022 13:20:59 +0100 Message-Id: <20220916122100.170016-13-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Horatiu Vultur Add support for OTP controller available on LAN9662. The OTPC controls the access to a non-volatile memory. The size of the memory is 8KB. The OTPC can access the memory based on an offset. Implement both the read and the write functionality. Signed-off-by: Horatiu Vultur Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/Kconfig | 8 ++ drivers/nvmem/Makefile | 2 + drivers/nvmem/lan9662-otpc.c | 222 +++++++++++++++++++++++++++++++++++ 3 files changed, 232 insertions(+) create mode 100644 drivers/nvmem/lan9662-otpc.c diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index 7f2557934834..ec8a49c04003 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -98,6 +98,14 @@ config NVMEM_JZ4780_EFUSE To compile this driver as a module, choose M here: the module will be called nvmem_jz4780_efuse. =20 +config NVMEM_LAN9662_OTPC + tristate "Microchip LAN9662 OTP controller support" + depends on SOC_LAN966 || COMPILE_TEST + depends on HAS_IOMEM + help + This driver enables the OTP controller available on Microchip LAN9662 + SoCs. It controls the access to the OTP memory connected to it. + config NVMEM_LAYERSCAPE_SFP tristate "Layerscape SFP (Security Fuse Processor) support" depends on ARCH_LAYERSCAPE || COMPILE_TEST diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index bac799b2fa8d..fa80fe17e567 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -21,6 +21,8 @@ obj-$(CONFIG_NVMEM_IMX_OCOTP_SCU) +=3D nvmem-imx-ocotp-sc= u.o nvmem-imx-ocotp-scu-y :=3D imx-ocotp-scu.o obj-$(CONFIG_NVMEM_JZ4780_EFUSE) +=3D nvmem_jz4780_efuse.o nvmem_jz4780_efuse-y :=3D jz4780-efuse.o +obj-$(CONFIG_NVMEM_LAN9662_OTPC) +=3D nvmem-lan9662-otpc.o +nvmem-lan9662-otpc-y :=3D lan9662-otpc.o obj-$(CONFIG_NVMEM_LAYERSCAPE_SFP) +=3D nvmem-layerscape-sfp.o nvmem-layerscape-sfp-y :=3D layerscape-sfp.o obj-$(CONFIG_NVMEM_LPC18XX_EEPROM) +=3D nvmem_lpc18xx_eeprom.o diff --git a/drivers/nvmem/lan9662-otpc.c b/drivers/nvmem/lan9662-otpc.c new file mode 100644 index 000000000000..f6732fd216d8 --- /dev/null +++ b/drivers/nvmem/lan9662-otpc.c @@ -0,0 +1,222 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include + +#define OTP_OTP_PWR_DN(t) (t + 0x00) +#define OTP_OTP_PWR_DN_OTP_PWRDN_N BIT(0) +#define OTP_OTP_ADDR_HI(t) (t + 0x04) +#define OTP_OTP_ADDR_LO(t) (t + 0x08) +#define OTP_OTP_PRGM_DATA(t) (t + 0x10) +#define OTP_OTP_PRGM_MODE(t) (t + 0x14) +#define OTP_OTP_PRGM_MODE_OTP_PGM_MODE_BYTE BIT(0) +#define OTP_OTP_RD_DATA(t) (t + 0x18) +#define OTP_OTP_FUNC_CMD(t) (t + 0x20) +#define OTP_OTP_FUNC_CMD_OTP_PROGRAM BIT(1) +#define OTP_OTP_FUNC_CMD_OTP_READ BIT(0) +#define OTP_OTP_CMD_GO(t) (t + 0x28) +#define OTP_OTP_CMD_GO_OTP_GO BIT(0) +#define OTP_OTP_PASS_FAIL(t) (t + 0x2c) +#define OTP_OTP_PASS_FAIL_OTP_READ_PROHIBITED BIT(3) +#define OTP_OTP_PASS_FAIL_OTP_WRITE_PROHIBITED BIT(2) +#define OTP_OTP_PASS_FAIL_OTP_FAIL BIT(0) +#define OTP_OTP_STATUS(t) (t + 0x30) +#define OTP_OTP_STATUS_OTP_CPUMPEN BIT(1) +#define OTP_OTP_STATUS_OTP_BUSY BIT(0) + +#define OTP_MEM_SIZE 8192 +#define OTP_SLEEP_US 10 +#define OTP_TIMEOUT_US 500000 + +struct lan9662_otp { + struct device *dev; + void __iomem *base; +}; + +static bool lan9662_otp_wait_flag_clear(void __iomem *reg, u32 flag) +{ + u32 val; + + return readl_poll_timeout(reg, val, !(val & flag), + OTP_SLEEP_US, OTP_TIMEOUT_US); +} + +static int lan9662_otp_power(struct lan9662_otp *otp, bool up) +{ + void __iomem *pwrdn =3D OTP_OTP_PWR_DN(otp->base); + + if (up) { + writel(readl(pwrdn) & ~OTP_OTP_PWR_DN_OTP_PWRDN_N, pwrdn); + if (lan9662_otp_wait_flag_clear(OTP_OTP_STATUS(otp->base), + OTP_OTP_STATUS_OTP_CPUMPEN)) + return -ETIMEDOUT; + } else { + writel(readl(pwrdn) | OTP_OTP_PWR_DN_OTP_PWRDN_N, pwrdn); + } + + return 0; +} + +static int lan9662_otp_execute(struct lan9662_otp *otp) +{ + if (lan9662_otp_wait_flag_clear(OTP_OTP_CMD_GO(otp->base), + OTP_OTP_CMD_GO_OTP_GO)) + return -ETIMEDOUT; + + if (lan9662_otp_wait_flag_clear(OTP_OTP_STATUS(otp->base), + OTP_OTP_STATUS_OTP_BUSY)) + return -ETIMEDOUT; + + return 0; +} + +static void lan9662_otp_set_address(struct lan9662_otp *otp, u32 offset) +{ + writel(0xff & (offset >> 8), OTP_OTP_ADDR_HI(otp->base)); + writel(0xff & offset, OTP_OTP_ADDR_LO(otp->base)); +} + +static int lan9662_otp_read_byte(struct lan9662_otp *otp, u32 offset, u8 *= dst) +{ + u32 pass; + int rc; + + lan9662_otp_set_address(otp, offset); + writel(OTP_OTP_FUNC_CMD_OTP_READ, OTP_OTP_FUNC_CMD(otp->base)); + writel(OTP_OTP_CMD_GO_OTP_GO, OTP_OTP_CMD_GO(otp->base)); + rc =3D lan9662_otp_execute(otp); + if (!rc) { + pass =3D readl(OTP_OTP_PASS_FAIL(otp->base)); + if (pass & OTP_OTP_PASS_FAIL_OTP_READ_PROHIBITED) + return -EACCES; + *dst =3D (u8) readl(OTP_OTP_RD_DATA(otp->base)); + } + return rc; +} + +static int lan9662_otp_write_byte(struct lan9662_otp *otp, u32 offset, u8 = data) +{ + u32 pass; + int rc; + + lan9662_otp_set_address(otp, offset); + writel(OTP_OTP_PRGM_MODE_OTP_PGM_MODE_BYTE, OTP_OTP_PRGM_MODE(otp->base)); + writel(data, OTP_OTP_PRGM_DATA(otp->base)); + writel(OTP_OTP_FUNC_CMD_OTP_PROGRAM, OTP_OTP_FUNC_CMD(otp->base)); + writel(OTP_OTP_CMD_GO_OTP_GO, OTP_OTP_CMD_GO(otp->base)); + + rc =3D lan9662_otp_execute(otp); + if (!rc) { + pass =3D readl(OTP_OTP_PASS_FAIL(otp->base)); + if (pass & OTP_OTP_PASS_FAIL_OTP_WRITE_PROHIBITED) + return -EACCES; + if (pass & OTP_OTP_PASS_FAIL_OTP_FAIL) + return -EIO; + } + return rc; +} + +static int lan9662_otp_read(void *context, unsigned int offset, + void *_val, size_t bytes) +{ + struct lan9662_otp *otp =3D context; + u8 *val =3D _val; + uint8_t data; + int i, rc =3D 0; + + lan9662_otp_power(otp, true); + for (i =3D 0; i < bytes; i++) { + rc =3D lan9662_otp_read_byte(otp, offset + i, &data); + if (rc < 0) + break; + *val++ =3D data; + } + lan9662_otp_power(otp, false); + + return rc; +} + +static int lan9662_otp_write(void *context, unsigned int offset, + void *_val, size_t bytes) +{ + struct lan9662_otp *otp =3D context; + u8 *val =3D _val; + u8 data, newdata; + int i, rc =3D 0; + + lan9662_otp_power(otp, true); + for (i =3D 0; i < bytes; i++) { + /* Skip zero bytes */ + if (val[i]) { + rc =3D lan9662_otp_read_byte(otp, offset + i, &data); + if (rc < 0) + break; + + newdata =3D data | val[i]; + if (newdata =3D=3D data) + continue; + + rc =3D lan9662_otp_write_byte(otp, offset + i, + newdata); + if (rc < 0) + break; + } + } + lan9662_otp_power(otp, false); + + return rc; +} + +static struct nvmem_config otp_config =3D { + .name =3D "lan9662-otp", + .stride =3D 1, + .word_size =3D 1, + .reg_read =3D lan9662_otp_read, + .reg_write =3D lan9662_otp_write, + .size =3D OTP_MEM_SIZE, +}; + +static int lan9662_otp_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct nvmem_device *nvmem; + struct lan9662_otp *otp; + + otp =3D devm_kzalloc(&pdev->dev, sizeof(*otp), GFP_KERNEL); + if (!otp) + return -ENOMEM; + + otp->dev =3D dev; + otp->base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(otp->base)) + return PTR_ERR(otp->base); + + otp_config.priv =3D otp; + otp_config.dev =3D dev; + + nvmem =3D devm_nvmem_register(dev, &otp_config); + + return PTR_ERR_OR_ZERO(nvmem); +} + +static const struct of_device_id lan9662_otp_match[] =3D { + { .compatible =3D "microchip,lan9662-otp", }, + { }, +}; +MODULE_DEVICE_TABLE(of, lan9662_otp_match); + +static struct platform_driver lan9662_otp_driver =3D { + .probe =3D lan9662_otp_probe, + .driver =3D { + .name =3D "lan9662-otp", + .of_match_table =3D lan9662_otp_match, + }, +}; +module_platform_driver(lan9662_otp_driver); + +MODULE_AUTHOR("Horatiu Vultur "); +MODULE_DESCRIPTION("lan9662 OTP driver"); +MODULE_LICENSE("GPL"); --=20 2.25.1 From nobody Fri Apr 3 05:29:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CC67ECAAD8 for ; Fri, 16 Sep 2022 12:22:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231736AbiIPMWa (ORCPT ); Fri, 16 Sep 2022 08:22:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54058 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231388AbiIPMVs (ORCPT ); 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[86.26.103.58]) by smtp.gmail.com with ESMTPSA id u11-20020adfdb8b000000b0022add371ed2sm1540015wri.55.2022.09.16.05.21.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 05:21:20 -0700 (PDT) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , kernel test robot , Srinivas Kandagatla Subject: [PATCH 13/13] nvmem: u-boot-env: fix crc32 casting type Date: Fri, 16 Sep 2022 13:21:00 +0100 Message-Id: <20220916122100.170016-14-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> References: <20220916122100.170016-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rafa=C5=82 Mi=C5=82ecki This fixes: drivers/nvmem/u-boot-env.c:141:17: sparse: sparse: cast to restricted __le32 Reported-by: kernel test robot Fixes: f955dc1445069 ("nvmem: add driver handling U-Boot environment variab= les") Signed-off-by: Rafa=C5=82 Mi=C5=82ecki Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/u-boot-env.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/nvmem/u-boot-env.c b/drivers/nvmem/u-boot-env.c index d17a164ae705..8e72d1bbd649 100644 --- a/drivers/nvmem/u-boot-env.c +++ b/drivers/nvmem/u-boot-env.c @@ -139,7 +139,7 @@ static int u_boot_env_parse(struct u_boot_env *priv) data_offset =3D offsetof(struct u_boot_env_image_redundant, data); break; } - crc32 =3D le32_to_cpu(*(uint32_t *)(buf + crc32_offset)); + crc32 =3D le32_to_cpu(*(__le32 *)(buf + crc32_offset)); crc32_data_len =3D priv->mtd->size - crc32_data_offset; data_len =3D priv->mtd->size - data_offset; =20 --=20 2.25.1