From nobody Sat Sep 21 17:28:10 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3F06C32771 for ; Fri, 16 Sep 2022 02:51:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229784AbiIPCvO (ORCPT ); Thu, 15 Sep 2022 22:51:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58610 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229479AbiIPCvM (ORCPT ); Thu, 15 Sep 2022 22:51:12 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E5D5A98A6E; Thu, 15 Sep 2022 19:51:07 -0700 (PDT) X-UUID: eca0733e52624733861866cb70429251-20220916 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=A2boyUMI62PGkfAXY8Q9C0h4jRd50SVJCo47zEUPaUc=; b=KzsstLbVABMMqzefmR8KTKWQ2fUSvn4ilDByCwhYfN+XAcsch6NoLFXIPyw8pT2cHDVsx9ci3Xp1jJsH5FPABZyR4ZuxFSRmRqC9jghygVocDghydBnrDeOox7ehnKiY7A4VA4IqBD3VjhbwrDhOLRsmZH9W+0sbG9R0gqpYX94=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:bb51bde2-5cac-4142-9f1b-b03e0da6bf02,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:90 X-CID-INFO: VERSION:1.1.11,REQID:bb51bde2-5cac-4142-9f1b-b03e0da6bf02,IP:0,URL :0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:90 X-CID-META: VersionHash:39a5ff1,CLOUDID:e158d17b-ea28-4199-b57e-003c7d60873a,B ulkID:220916105103EBM83LEM,BulkQuantity:0,Recheck:0,SF:28|17|19|48,TC:nil, Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: eca0733e52624733861866cb70429251-20220916 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1487704316; Fri, 16 Sep 2022 10:51:02 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 16 Sep 2022 10:51:00 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 16 Sep 2022 10:51:00 +0800 From: Bo-Chen Chen To: , , CC: , , , , , , Bo-Chen Chen Subject: [PATCH v3 1/4] arm64: dts: mt8195: Add dp-intf nodes Date: Fri, 16 Sep 2022 10:50:56 +0800 Message-ID: <20220916025059.16673-2-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220916025059.16673-1-rex-bc.chen@mediatek.com> References: <20220916025059.16673-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Dp-intfs provide the pixel data to edptx and dptx. To support edptx and dptx, we need to add dp-intf0 and dp-intf1 nodes. Dp-intf0 is for edptx and dp-intf1 is for dptx. Signed-off-by: Bo-Chen Chen Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 905d1a90b406..82d28e9f60c3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -2067,6 +2067,17 @@ mediatek,gce-client-reg =3D <&gce0 SUBSYS_1c01XXXX 0x4000 0x1000>; }; =20 + dp_intf0: dp-intf@1c015000 { + compatible =3D "mediatek,mt8195-dp-intf"; + reg =3D <0 0x1c015000 0 0x1000>; + interrupts =3D ; + clocks =3D <&vdosys0 CLK_VDO0_DP_INTF0>, + <&vdosys0 CLK_VDO0_DP_INTF0_DP_INTF>, + <&apmixedsys CLK_APMIXED_TVDPLL1>; + clock-names =3D "engine", "pixel", "pll"; + status =3D "disabled"; + }; + mutex: mutex@1c016000 { compatible =3D "mediatek,mt8195-disp-mutex"; reg =3D <0 0x1c016000 0 0x1000>; @@ -2155,5 +2166,17 @@ clock-names =3D "apb", "smi", "gals"; power-domains =3D <&spm MT8195_POWER_DOMAIN_VDOSYS1>; }; + + dp_intf1: dp-intf@1c113000 { + compatible =3D "mediatek,mt8195-dp-intf"; + reg =3D <0 0x1c113000 0 0x1000>; + interrupts =3D ; + power-domains =3D <&spm MT8195_POWER_DOMAIN_VDOSYS1>; + clocks =3D <&vdosys1 CLK_VDO1_DP_INTF0_MM>, + <&vdosys1 CLK_VDO1_DPINTF>, + <&apmixedsys CLK_APMIXED_TVDPLL2>; + clock-names =3D "engine", "pixel", "pll"; + status =3D "disabled"; + }; }; }; --=20 2.18.0