From nobody Fri Apr 3 06:46:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBFA9ECAAD3 for ; Thu, 15 Sep 2022 11:03:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229715AbiIOLDO (ORCPT ); Thu, 15 Sep 2022 07:03:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229562AbiIOLDF (ORCPT ); Thu, 15 Sep 2022 07:03:05 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49A4299268; Thu, 15 Sep 2022 04:03:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1663239783; x=1694775783; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Eijp8jtUVCS5o4wty6d/uAB9Z0N5KQjN40oWUlZWLt8=; b=scaD5y4tabEsi+mzeRf+qYfoZxl1RBEsz5KcY/5qrH6g4K28tMTUEMA0 FXqu5ZofYAdjYoBsGVkhGlbns6F27qUCR0kCdgDS0uFR6kWG6km1ezl37 xlV9/3bXrz33q0XSOq20zzgXbn7YJAqgxXfpdoEgX4qTToH9gg3+ZISdt Vff4r/UkYEiqov0RiEl4yZ7haa0/e0N/aTGMZjtiL4XfVUFsXbx4Nkbsx AmgpGg6jS364yPvItWTk3HKKhq8vKerQg43k2r2popJfF5v1gZILCJC31 9WN/wF94y6qcJL38fSVqAbkpUlfoglxL/P2I+Dc7HsASvgDSNnJ8GCNiu w==; X-IronPort-AV: E=Sophos;i="5.93,317,1654585200"; d="scan'208";a="113813855" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Sep 2022 04:03:02 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 15 Sep 2022 04:03:00 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 15 Sep 2022 04:02:58 -0700 From: Claudiu Beznea To: , , CC: , , , Claudiu Beznea Subject: [PATCH 1/3] dmaengine: at_xdmac: add runtime pm support Date: Thu, 15 Sep 2022 14:05:14 +0300 Message-ID: <20220915110516.4160443-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220915110516.4160443-1-claudiu.beznea@microchip.com> References: <20220915110516.4160443-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add runtime PM support which involves disabling/enabling controller's clocks on runtime PM suspend/resume ops. The runtime suspend/resume is done based on the work submitted to the controller: runtime resume is happening on at_xdmac_start_xfer() and runtime suspend on at_xdmac_tasklet(). Signed-off-by: Claudiu Beznea --- drivers/dma/at_xdmac.c | 217 ++++++++++++++++++++++++++++++++++++++--- 1 file changed, 202 insertions(+), 15 deletions(-) diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c index d6c9781cd46a..090bab2196ab 100644 --- a/drivers/dma/at_xdmac.c +++ b/drivers/dma/at_xdmac.c @@ -21,6 +21,7 @@ #include #include #include +#include =20 #include "dmaengine.h" =20 @@ -240,6 +241,7 @@ struct at_xdmac_chan { struct at_xdmac { struct dma_device dma; void __iomem *regs; + struct device *dev; int irq; struct clk *clk; u32 save_gim; @@ -361,13 +363,65 @@ MODULE_PARM_DESC(init_nr_desc_per_channel, "initial descriptors per channel (default: 64)"); =20 =20 +static void at_xdmac_runtime_suspend_descriptors(struct at_xdmac_chan *atc= han) +{ + struct at_xdmac *atxdmac =3D to_at_xdmac(atchan->chan.device); + struct at_xdmac_desc *desc, *_desc; + + list_for_each_entry_safe(desc, _desc, &atchan->xfers_list, xfer_node) { + if (!desc->active_xfer) + continue; + + pm_runtime_mark_last_busy(atxdmac->dev); + pm_runtime_put_autosuspend(atxdmac->dev); + } +} + +static int at_xdmac_runtime_resume_descriptors(struct at_xdmac_chan *atcha= n) +{ + struct at_xdmac *atxdmac =3D to_at_xdmac(atchan->chan.device); + struct at_xdmac_desc *desc, *_desc; + int ret; + + list_for_each_entry_safe(desc, _desc, &atchan->xfers_list, xfer_node) { + if (!desc->active_xfer) + continue; + + ret =3D pm_runtime_resume_and_get(atxdmac->dev); + if (ret < 0) + return ret; + } + + return 0; +} + static bool at_xdmac_chan_is_enabled(struct at_xdmac_chan *atchan) { - return at_xdmac_chan_read(atchan, AT_XDMAC_GS) & atchan->mask; + struct at_xdmac *atxdmac =3D to_at_xdmac(atchan->chan.device); + int ret; + + ret =3D pm_runtime_resume_and_get(atxdmac->dev); + if (ret < 0) + return false; + + ret =3D !!(at_xdmac_chan_read(atchan, AT_XDMAC_GS) & atchan->mask); + + pm_runtime_mark_last_busy(atxdmac->dev); + pm_runtime_put_autosuspend(atxdmac->dev); + + return ret; } =20 static void at_xdmac_off(struct at_xdmac *atxdmac) { + struct dma_chan *chan, *_chan; + struct at_xdmac_chan *atchan; + int ret; + + ret =3D pm_runtime_resume_and_get(atxdmac->dev); + if (ret < 0) + return; + at_xdmac_write(atxdmac, AT_XDMAC_GD, -1L); =20 /* Wait that all chans are disabled. */ @@ -375,6 +429,18 @@ static void at_xdmac_off(struct at_xdmac *atxdmac) cpu_relax(); =20 at_xdmac_write(atxdmac, AT_XDMAC_GID, -1L); + + /* Decrement runtime PM ref counter for each active descriptor. */ + if (!list_empty(&atxdmac->dma.channels)) { + list_for_each_entry_safe(chan, _chan, &atxdmac->dma.channels, + device_node) { + atchan =3D to_at_xdmac_chan(chan); + at_xdmac_runtime_suspend_descriptors(atchan); + } + } + + pm_runtime_mark_last_busy(atxdmac->dev); + pm_runtime_put_autosuspend(atxdmac->dev); } =20 /* Call with lock hold. */ @@ -383,6 +449,11 @@ static void at_xdmac_start_xfer(struct at_xdmac_chan *= atchan, { struct at_xdmac *atxdmac =3D to_at_xdmac(atchan->chan.device); u32 reg; + int ret; + + ret =3D pm_runtime_resume_and_get(atxdmac->dev); + if (ret < 0) + return; =20 dev_vdbg(chan2dev(&atchan->chan), "%s: desc 0x%p\n", __func__, first); =20 @@ -1463,7 +1534,7 @@ at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_= t cookie, struct at_xdmac_desc *desc, *_desc, *iter; struct list_head *descs_list; enum dma_status ret; - int residue, retry; + int residue, retry, pm_status; u32 cur_nda, check_nda, cur_ubc, mask, value; u8 dwidth =3D 0; unsigned long flags; @@ -1473,6 +1544,10 @@ at_xdmac_tx_status(struct dma_chan *chan, dma_cookie= _t cookie, if (ret =3D=3D DMA_COMPLETE || !txstate) return ret; =20 + pm_status =3D pm_runtime_resume_and_get(atxdmac->dev); + if (pm_status < 0) + return DMA_ERROR; + spin_lock_irqsave(&atchan->lock, flags); =20 desc =3D list_first_entry(&atchan->xfers_list, struct at_xdmac_desc, xfer= _node); @@ -1590,6 +1665,8 @@ at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_= t cookie, =20 spin_unlock: spin_unlock_irqrestore(&atchan->lock, flags); + pm_runtime_mark_last_busy(atxdmac->dev); + pm_runtime_put_autosuspend(atxdmac->dev); return ret; } =20 @@ -1636,6 +1713,11 @@ static void at_xdmac_handle_error(struct at_xdmac_ch= an *atchan) { struct at_xdmac *atxdmac =3D to_at_xdmac(atchan->chan.device); struct at_xdmac_desc *bad_desc; + int ret; + + ret =3D pm_runtime_resume_and_get(atxdmac->dev); + if (ret < 0) + return; =20 /* * The descriptor currently at the head of the active list is @@ -1665,12 +1747,16 @@ static void at_xdmac_handle_error(struct at_xdmac_c= han *atchan) __func__, &bad_desc->lld.mbr_sa, &bad_desc->lld.mbr_da, bad_desc->lld.mbr_ubc); =20 + pm_runtime_mark_last_busy(atxdmac->dev); + pm_runtime_put_autosuspend(atxdmac->dev); + /* Then continue with usual descriptor management */ } =20 static void at_xdmac_tasklet(struct tasklet_struct *t) { struct at_xdmac_chan *atchan =3D from_tasklet(atchan, t, tasklet); + struct at_xdmac *atxdmac =3D to_at_xdmac(atchan->chan.device); struct at_xdmac_desc *desc; struct dma_async_tx_descriptor *txd; u32 error_mask; @@ -1720,6 +1806,13 @@ static void at_xdmac_tasklet(struct tasklet_struct *= t) list_splice_tail_init(&desc->descs_list, &atchan->free_descs_list); at_xdmac_advance_work(atchan); spin_unlock_irq(&atchan->lock); + + /* + * Decrement runtime PM ref counter incremented in + * at_xdmac_start_xfer(). + */ + pm_runtime_mark_last_busy(atxdmac->dev); + pm_runtime_put_autosuspend(atxdmac->dev); } =20 static irqreturn_t at_xdmac_interrupt(int irq, void *dev_id) @@ -1811,19 +1904,31 @@ static int at_xdmac_device_pause(struct dma_chan *c= han) struct at_xdmac_chan *atchan =3D to_at_xdmac_chan(chan); struct at_xdmac *atxdmac =3D to_at_xdmac(atchan->chan.device); unsigned long flags; + int ret; =20 dev_dbg(chan2dev(chan), "%s\n", __func__); =20 if (test_and_set_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status)) return 0; =20 + ret =3D pm_runtime_resume_and_get(atxdmac->dev); + if (ret < 0) + return ret; + spin_lock_irqsave(&atchan->lock, flags); at_xdmac_write(atxdmac, atxdmac->layout->grws, atchan->mask); while (at_xdmac_chan_read(atchan, AT_XDMAC_CC) & (AT_XDMAC_CC_WRIP | AT_XDMAC_CC_RDIP)) cpu_relax(); + + /* Decrement runtime PM ref counter for each active descriptor. */ + at_xdmac_runtime_suspend_descriptors(atchan); + spin_unlock_irqrestore(&atchan->lock, flags); =20 + pm_runtime_mark_last_busy(atxdmac->dev); + pm_runtime_put_autosuspend(atxdmac->dev); + return 0; } =20 @@ -1832,20 +1937,32 @@ static int at_xdmac_device_resume(struct dma_chan *= chan) struct at_xdmac_chan *atchan =3D to_at_xdmac_chan(chan); struct at_xdmac *atxdmac =3D to_at_xdmac(atchan->chan.device); unsigned long flags; + int ret; =20 dev_dbg(chan2dev(chan), "%s\n", __func__); =20 + ret =3D pm_runtime_resume_and_get(atxdmac->dev); + if (ret < 0) + return ret; + spin_lock_irqsave(&atchan->lock, flags); - if (!at_xdmac_chan_is_paused(atchan)) { - spin_unlock_irqrestore(&atchan->lock, flags); - return 0; - } + if (!at_xdmac_chan_is_paused(atchan)) + goto unlock; + + /* Increment runtime PM ref counter for each active descriptor. */ + ret =3D at_xdmac_runtime_resume_descriptors(atchan); + if (ret < 0) + goto unlock; =20 at_xdmac_write(atxdmac, atxdmac->layout->grwr, atchan->mask); clear_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status); + +unlock: spin_unlock_irqrestore(&atchan->lock, flags); + pm_runtime_mark_last_busy(atxdmac->dev); + pm_runtime_put_autosuspend(atxdmac->dev); =20 - return 0; + return ret; } =20 static int at_xdmac_device_terminate_all(struct dma_chan *chan) @@ -1854,9 +1971,14 @@ static int at_xdmac_device_terminate_all(struct dma_= chan *chan) struct at_xdmac_chan *atchan =3D to_at_xdmac_chan(chan); struct at_xdmac *atxdmac =3D to_at_xdmac(atchan->chan.device); unsigned long flags; + int ret; =20 dev_dbg(chan2dev(chan), "%s\n", __func__); =20 + ret =3D pm_runtime_resume_and_get(atxdmac->dev); + if (ret < 0) + return ret; + spin_lock_irqsave(&atchan->lock, flags); at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask); while (at_xdmac_read(atxdmac, AT_XDMAC_GS) & atchan->mask) @@ -1867,12 +1989,24 @@ static int at_xdmac_device_terminate_all(struct dma= _chan *chan) list_del(&desc->xfer_node); list_splice_tail_init(&desc->descs_list, &atchan->free_descs_list); + /* + * We incremented the runtime PM reference count on + * at_xdmac_start_xfer() for this descriptor. Now it's time + * to release it. + */ + if (desc->active_xfer) { + pm_runtime_put_autosuspend(atxdmac->dev); + pm_runtime_mark_last_busy(atxdmac->dev); + } } =20 clear_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status); clear_bit(AT_XDMAC_CHAN_IS_CYCLIC, &atchan->status); spin_unlock_irqrestore(&atchan->lock, flags); =20 + pm_runtime_mark_last_busy(atxdmac->dev); + pm_runtime_put_autosuspend(atxdmac->dev); + return 0; } =20 @@ -1974,6 +2108,11 @@ static int __maybe_unused atmel_xdmac_suspend(struct= device *dev) { struct at_xdmac *atxdmac =3D dev_get_drvdata(dev); struct dma_chan *chan, *_chan; + int ret; + + ret =3D pm_runtime_resume_and_get(atxdmac->dev); + if (ret < 0) + return ret; =20 list_for_each_entry_safe(chan, _chan, &atxdmac->dma.channels, device_node= ) { struct at_xdmac_chan *atchan =3D to_at_xdmac_chan(chan); @@ -1986,12 +2125,13 @@ static int __maybe_unused atmel_xdmac_suspend(struc= t device *dev) atchan->save_cnda =3D at_xdmac_chan_read(atchan, AT_XDMAC_CNDA); atchan->save_cndc =3D at_xdmac_chan_read(atchan, AT_XDMAC_CNDC); } + + at_xdmac_runtime_suspend_descriptors(atchan); } atxdmac->save_gim =3D at_xdmac_read(atxdmac, AT_XDMAC_GIM); =20 at_xdmac_off(atxdmac); - clk_disable_unprepare(atxdmac->clk); - return 0; + return pm_runtime_force_suspend(atxdmac->dev); } =20 static int __maybe_unused atmel_xdmac_resume(struct device *dev) @@ -2003,8 +2143,8 @@ static int __maybe_unused atmel_xdmac_resume(struct d= evice *dev) int i; int ret; =20 - ret =3D clk_prepare_enable(atxdmac->clk); - if (ret) + ret =3D pm_runtime_force_resume(atxdmac->dev); + if (ret < 0) return ret; =20 at_xdmac_axi_config(pdev); @@ -2019,6 +2159,11 @@ static int __maybe_unused atmel_xdmac_resume(struct = device *dev) at_xdmac_write(atxdmac, AT_XDMAC_GIE, atxdmac->save_gim); list_for_each_entry_safe(chan, _chan, &atxdmac->dma.channels, device_node= ) { atchan =3D to_at_xdmac_chan(chan); + + ret =3D at_xdmac_runtime_resume_descriptors(atchan); + if (ret < 0) + return ret; + at_xdmac_chan_write(atchan, AT_XDMAC_CC, atchan->save_cc); if (at_xdmac_chan_is_cyclic(atchan)) { if (at_xdmac_chan_is_paused(atchan)) @@ -2030,9 +2175,29 @@ static int __maybe_unused atmel_xdmac_resume(struct = device *dev) at_xdmac_write(atxdmac, AT_XDMAC_GE, atchan->mask); } } + + pm_runtime_mark_last_busy(atxdmac->dev); + pm_runtime_put_autosuspend(atxdmac->dev); + + return 0; +} + +static int __maybe_unused atmel_xdmac_runtime_suspend(struct device *dev) +{ + struct at_xdmac *atxdmac =3D dev_get_drvdata(dev); + + clk_disable(atxdmac->clk); + return 0; } =20 +static int __maybe_unused atmel_xdmac_runtime_resume(struct device *dev) +{ + struct at_xdmac *atxdmac =3D dev_get_drvdata(dev); + + return clk_enable(atxdmac->clk); +} + static int at_xdmac_probe(struct platform_device *pdev) { struct at_xdmac *atxdmac; @@ -2071,6 +2236,7 @@ static int at_xdmac_probe(struct platform_device *pde= v) =20 atxdmac->regs =3D base; atxdmac->irq =3D irq; + atxdmac->dev =3D &pdev->dev; =20 atxdmac->layout =3D of_device_get_match_data(&pdev->dev); if (!atxdmac->layout) @@ -2135,11 +2301,20 @@ static int at_xdmac_probe(struct platform_device *p= dev) atxdmac->dma.directions =3D BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); atxdmac->dma.residue_granularity =3D DMA_RESIDUE_GRANULARITY_BURST; =20 - /* Disable all chans and interrupts. */ - at_xdmac_off(atxdmac); + platform_set_drvdata(pdev, atxdmac); + + pm_runtime_set_autosuspend_delay(&pdev->dev, 500); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); + pm_runtime_get_noresume(&pdev->dev); =20 /* Init channels. */ INIT_LIST_HEAD(&atxdmac->dma.channels); + + /* Disable all chans and interrupts. */ + at_xdmac_off(atxdmac); + for (i =3D 0; i < nr_channels; i++) { struct at_xdmac_chan *atchan =3D &atxdmac->chan[i]; =20 @@ -2159,12 +2334,11 @@ static int at_xdmac_probe(struct platform_device *p= dev) while (at_xdmac_chan_read(atchan, AT_XDMAC_CIS)) cpu_relax(); } - platform_set_drvdata(pdev, atxdmac); =20 ret =3D dma_async_device_register(&atxdmac->dma); if (ret) { dev_err(&pdev->dev, "fail to register DMA engine device\n"); - goto err_clk_disable; + goto err_pm_disable; } =20 ret =3D of_dma_controller_register(pdev->dev.of_node, @@ -2179,10 +2353,18 @@ static int at_xdmac_probe(struct platform_device *p= dev) =20 at_xdmac_axi_config(pdev); =20 + pm_runtime_mark_last_busy(&pdev->dev); + pm_runtime_put_autosuspend(&pdev->dev); + return 0; =20 err_dma_unregister: dma_async_device_unregister(&atxdmac->dma); +err_pm_disable: + pm_runtime_put_noidle(&pdev->dev); + pm_runtime_disable(&pdev->dev); + pm_runtime_set_suspended(&pdev->dev); + pm_runtime_dont_use_autosuspend(&pdev->dev); err_clk_disable: clk_disable_unprepare(atxdmac->clk); err_free_irq: @@ -2198,6 +2380,9 @@ static int at_xdmac_remove(struct platform_device *pd= ev) at_xdmac_off(atxdmac); of_dma_controller_free(pdev->dev.of_node); dma_async_device_unregister(&atxdmac->dma); + pm_runtime_disable(atxdmac->dev); + pm_runtime_set_suspended(&pdev->dev); + pm_runtime_dont_use_autosuspend(&pdev->dev); clk_disable_unprepare(atxdmac->clk); =20 free_irq(atxdmac->irq, atxdmac); @@ -2215,6 +2400,8 @@ static int at_xdmac_remove(struct platform_device *pd= ev) static const struct dev_pm_ops __maybe_unused atmel_xdmac_dev_pm_ops =3D { .prepare =3D atmel_xdmac_prepare, SET_LATE_SYSTEM_SLEEP_PM_OPS(atmel_xdmac_suspend, atmel_xdmac_resume) + SET_RUNTIME_PM_OPS(atmel_xdmac_runtime_suspend, + atmel_xdmac_runtime_resume, NULL) }; =20 static const struct of_device_id atmel_xdmac_dt_ids[] =3D { --=20 2.34.1 From nobody Fri Apr 3 06:46:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8473FECAAD3 for ; Thu, 15 Sep 2022 11:03:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229738AbiIOLDR (ORCPT ); Thu, 15 Sep 2022 07:03:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229634AbiIOLDF (ORCPT ); Thu, 15 Sep 2022 07:03:05 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB4249926A; Thu, 15 Sep 2022 04:03:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; 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Thu, 15 Sep 2022 04:03:00 -0700 From: Claudiu Beznea To: , , CC: , , , Claudiu Beznea Subject: [PATCH 2/3] dmaengine: at_xdmac: align properly function members Date: Thu, 15 Sep 2022 14:05:15 +0300 Message-ID: <20220915110516.4160443-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220915110516.4160443-1-claudiu.beznea@microchip.com> References: <20220915110516.4160443-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Align properly function members. Signed-off-by: Claudiu Beznea --- drivers/dma/at_xdmac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c index 090bab2196ab..a9278bf4c17b 100644 --- a/drivers/dma/at_xdmac.c +++ b/drivers/dma/at_xdmac.c @@ -1527,7 +1527,7 @@ at_xdmac_prep_dma_memset_sg(struct dma_chan *chan, st= ruct scatterlist *sgl, =20 static enum dma_status at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, - struct dma_tx_state *txstate) + struct dma_tx_state *txstate) { struct at_xdmac_chan *atchan =3D to_at_xdmac_chan(chan); struct at_xdmac *atxdmac =3D to_at_xdmac(atchan->chan.device); --=20 2.34.1 From nobody Fri Apr 3 06:46:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8288ECAAA1 for ; Thu, 15 Sep 2022 11:03:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229809AbiIOLDX (ORCPT ); Thu, 15 Sep 2022 07:03:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229678AbiIOLDH (ORCPT ); Thu, 15 Sep 2022 07:03:07 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E87BF9926A; Thu, 15 Sep 2022 04:03:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1663239786; x=1694775786; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JJnRYj7NPQDMFAirw9QUIbVf7WfT2dsZ/Q12yTqq4GA=; b=W8RO/lQkeR9E0CbmZGKTyUEj0Xd2F6ASI24ceEIHNd64U93ho++LNkWl j/z1FMuJtdZ+VvIShXJ02ty6cDmOkI7J1L6Dw69xBx5/RFfKzCahGlmLj E8gqB/UbQPCepksZ7/0msDXb0WXlIpGSFTTV8bboQdUNXF4mxEGbWN5ND S14IBfVV3ZkPr518R4ok9QEYEV2wScvc63LNSlp/i4mygT8SnzkH2RqCE 1b68ycrx2idE13E/lXWuAyEpu94UY0zsq1vsWMiwiUXs1430v7P69GCeb Jhutkgl1WlPzMxqGhPsCaeS3PHWlUzDBDOzn1edbuj05T5o2JGjYLxqLx Q==; X-IronPort-AV: E=Sophos;i="5.93,317,1654585200"; d="scan'208";a="113813874" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Sep 2022 04:03:06 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 15 Sep 2022 04:03:04 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 15 Sep 2022 04:03:03 -0700 From: Claudiu Beznea To: , , CC: , , , Claudiu Beznea Subject: [PATCH 3/3] dmaengine: at_xdmac: remove empty line Date: Thu, 15 Sep 2022 14:05:16 +0300 Message-ID: <20220915110516.4160443-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220915110516.4160443-1-claudiu.beznea@microchip.com> References: <20220915110516.4160443-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove empty line. Signed-off-by: Claudiu Beznea --- drivers/dma/at_xdmac.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c index a9278bf4c17b..1f0fab180f8f 100644 --- a/drivers/dma/at_xdmac.c +++ b/drivers/dma/at_xdmac.c @@ -533,7 +533,6 @@ static void at_xdmac_start_xfer(struct at_xdmac_chan *a= tchan, at_xdmac_chan_read(atchan, AT_XDMAC_CSA), at_xdmac_chan_read(atchan, AT_XDMAC_CDA), at_xdmac_chan_read(atchan, AT_XDMAC_CUBC)); - } =20 static dma_cookie_t at_xdmac_tx_submit(struct dma_async_tx_descriptor *tx) --=20 2.34.1