From nobody Sun Apr 5 16:31:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E305C6FA86 for ; Thu, 15 Sep 2022 09:46:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230040AbiIOJqZ (ORCPT ); Thu, 15 Sep 2022 05:46:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229942AbiIOJpj (ORCPT ); Thu, 15 Sep 2022 05:45:39 -0400 Received: from hutie.ust.cz (hutie.ust.cz [185.8.165.127]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3000660531; Thu, 15 Sep 2022 02:45:36 -0700 (PDT) From: =?UTF-8?q?Martin=20Povi=C5=A1er?= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cutebit.org; s=mail; t=1663235133; bh=RnoRkuWr8/cOTZp+UVU+8HJliq7IWrJl0jk4wjs4inI=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=rZAk85JGtc7RNq70RU9onoXNJ366+U5FbkK8JLMpr/xsiR1vTr1dgcNidX9cZMkyP GnWoEbFNOvDnCLvf/uYdpfCNCMvEl5r0CLcGxWMpKoqP5FkA9AVPJTIiKRYt/Q8rxN QoJSA1TcyNpBBa0HkSmwbdoINGWZflsnEMjvflIY= To: James Schulman , David Rhodes , Lucas Tanure , Richard Fitzgerald , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , =?UTF-8?q?Martin=20Povi=C5=A1er?= Cc: Charles Keepax , ChiYuan Huang , Matt Flax , Lukas Bulwahn , Pierre-Louis Bossart , - , alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev Subject: [PATCH v2 02/11] ASoC: cs42l42: Add bitclock frequency argument to cs42l42_pll_config() Date: Thu, 15 Sep 2022 11:44:35 +0200 Message-Id: <20220915094444.11434-3-povik+lin@cutebit.org> In-Reply-To: <20220915094444.11434-1-povik+lin@cutebit.org> References: <20220915094444.11434-1-povik+lin@cutebit.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Richard Fitzgerald Clean up the handling of bitclock frequency by keeping all the logic in cs42l42_pcm_hw_params(), which then simply passes the frequency as an argument to cs42l42_pll_config(). The previous code had become clunky as a legacy of earlier versions of the clock handling. The logic was split across cs42l42_pcm_hw_params() and cs42l42_pll_config(), with the params-derived bclk stashed in struct cs42l42_private only to pass it to cs42l42_pll_config(). Signed-off-by: Richard Fitzgerald Signed-off-by: Martin Povi=C5=A1er --- sound/soc/codecs/cs42l42.c | 32 ++++++++++++++++---------------- sound/soc/codecs/cs42l42.h | 1 - 2 files changed, 16 insertions(+), 17 deletions(-) diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c index 162540c153f9..4b92ee0e67c4 100644 --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c @@ -647,18 +647,12 @@ static const struct cs42l42_pll_params pll_ratio_tabl= e[] =3D { { 24576000, 1, 0x03, 0x40, 0x000000, 0x03, 0x10, 12288000, 128, 1} }; =20 -static int cs42l42_pll_config(struct snd_soc_component *component) +static int cs42l42_pll_config(struct snd_soc_component *component, unsigne= d int clk) { struct cs42l42_private *cs42l42 =3D snd_soc_component_get_drvdata(compone= nt); int i; - u32 clk; u32 fsync; =20 - if (!cs42l42->sclk) - clk =3D cs42l42->bclk; - else - clk =3D cs42l42->sclk; - /* Don't reconfigure if there is an audio stream running */ if (cs42l42->stream_use) { if (pll_ratio_table[cs42l42->pll_config].sclk =3D=3D clk) @@ -895,19 +889,25 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_subst= ream *substream, unsigned int width =3D (params_width(params) / 8) - 1; unsigned int slot_width =3D 0; unsigned int val =3D 0; + unsigned int bclk; int ret; =20 cs42l42->srate =3D params_rate(params); =20 - /* - * Assume 24-bit samples are in 32-bit slots, to prevent SCLK being - * more than assumed (which would result in overclocking). - */ - if (params_width(params) =3D=3D 24) - slot_width =3D 32; + if (cs42l42->sclk) { + /* machine driver has set the SCLK */ + bclk =3D cs42l42->sclk; + } else { + /* + * Assume 24-bit samples are in 32-bit slots, to prevent SCLK being + * more than assumed (which would result in overclocking). + */ + if (params_width(params) =3D=3D 24) + slot_width =3D 32; =20 - /* I2S frame always has multiple of 2 channels */ - cs42l42->bclk =3D snd_soc_tdm_params_to_bclk(params, slot_width, 0, 2); + /* I2S frame always has multiple of 2 channels */ + bclk =3D snd_soc_tdm_params_to_bclk(params, slot_width, 0, 2); + } =20 switch (substream->stream) { case SNDRV_PCM_STREAM_CAPTURE: @@ -947,7 +947,7 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substre= am *substream, break; } =20 - ret =3D cs42l42_pll_config(component); + ret =3D cs42l42_pll_config(component, bclk); if (ret) return ret; =20 diff --git a/sound/soc/codecs/cs42l42.h b/sound/soc/codecs/cs42l42.h index 50299c9f283a..b4ba1467c558 100644 --- a/sound/soc/codecs/cs42l42.h +++ b/sound/soc/codecs/cs42l42.h @@ -30,7 +30,6 @@ struct cs42l42_private { struct snd_soc_jack *jack; struct mutex irq_lock; int pll_config; - int bclk; u32 sclk; u32 srate; u8 plug_state; --=20 2.33.0