From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56A09ECAAD3 for ; Wed, 14 Sep 2022 07:54:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230104AbiINHyR (ORCPT ); Wed, 14 Sep 2022 03:54:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230138AbiINHyO (ORCPT ); Wed, 14 Sep 2022 03:54:14 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59EAC72FCF for ; Wed, 14 Sep 2022 00:54:08 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id fs14so13724473pjb.5 for ; Wed, 14 Sep 2022 00:54:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=gbwg87hG3tf6Wqw8hsoPn0QdO74QME7etMAVFms+/pw=; b=ljDxR322JltyV7F/QZun8KlOd5owh+tpFy2pY0cKU+zKsqRc50k4t5cyHvkM6i0xo3 pq6ZR06hgYFaJfAHniPKBC0tFQAX6jWo4BLBjC+8MwffaTfyY5mRtUoc2MLbKB+EemR3 XspmcR19OZ0B02d8lswcBsROs4SX/Yp4UHWhPt1VDV8hJKZO0CJTBVHTL+Y+LZD6F7fi G+Ud256J3h+fp070+YqAApIwLDIWKyUOfr3OdFJWDpx/lA3BhIhRF6vNcokWCN+1LIfE d6UJRpyLQp2d9bP2FgYosUkCk7J9p7BjAKNrKP/gt+SYNUnjtuFO+FJJPbkkzDi2JYx2 kktg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=gbwg87hG3tf6Wqw8hsoPn0QdO74QME7etMAVFms+/pw=; b=a/cZis/AQfIu3bU8EUHjduSwmj3JvL07ds850ufVG36R6U7cU+DWYptkNaqs6D6Vkz YPyyXPWg4Tm1Y7uAWArbBNHqBAvsE8SYZM5lLU3l0HFBMeVuMNel/YLGHofTUZu7l9qx 2ISSMt9vLcfYjWIFtuijBzHHqcBSqD/gYunmXdhwTsWrlDE7HFWcXtAaYqlWtWKHDpaj wZBCbI3fv/V2Ebr8Naa/s/WxFbyJIrYbzLv/LR94YSoqK914Szo2t336OHGeoAEnj6lv 6yGu1ED7dWXhkdf7GLXajwbLbYdvj867t1TPEq3kANnDT+sarAoYmgg40galbOu1kqNb oOTQ== X-Gm-Message-State: ACgBeo0UDdk2htcqsavXyQl6w7lEOiinJ2BrfbON8ChhgOeJNUhrR3XS GXM9i2BKH3RUN1oVZOvcqG7TZkfYegCLSto= X-Google-Smtp-Source: AA6agR687zf0LoatHaeWiGH4w815XItAduyFQasakKnQ/p68K4peAppr3Gu0UF/br24Pcir9Gx0E5A== X-Received: by 2002:a17:902:b217:b0:172:bd6c:814d with SMTP id t23-20020a170902b21700b00172bd6c814dmr35664854plr.55.1663142047255; Wed, 14 Sep 2022 00:54:07 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.54.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:54:06 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH v4 01/12] PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure Date: Wed, 14 Sep 2022 13:23:39 +0530 Message-Id: <20220914075350.7992-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add kernel-doc for qcom_pcie_ep structure. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 9f92d53da81a..27b7c9710b5f 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -140,6 +140,23 @@ static struct clk_bulk_data qcom_pcie_ep_clks[] =3D { { .id =3D "slave_q2a" }, }; =20 +/** + * struct qcom_pcie_ep - Qualcomm PCIe Endpoint Controller + * @pci: Designware PCIe controller struct + * @parf: Qualcomm PCIe specific PARF register base + * @elbi: Designware PCIe specific ELBI register base + * @perst_map: PERST regmap + * @mmio_res: MMIO region resource + * @core_reset: PCIe Endpoint core reset + * @reset: PERST# GPIO + * @wake: WAKE# GPIO + * @phy: PHY controller block + * @perst_en: Flag for PERST enable + * @perst_sep_en: Flag for PERST separation enable + * @link_status: PCIe Link status + * @global_irq: Qualcomm PCIe specific Global IRQ + * @perst_irq: PERST# IRQ + */ struct qcom_pcie_ep { struct dw_pcie pci; =20 --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37E48C6FA89 for ; Wed, 14 Sep 2022 07:54:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230207AbiINHyV (ORCPT ); Wed, 14 Sep 2022 03:54:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229472AbiINHyP (ORCPT ); Wed, 14 Sep 2022 03:54:15 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2EDB72FEA for ; Wed, 14 Sep 2022 00:54:13 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id q62-20020a17090a17c400b00202a3497516so11333114pja.1 for ; Wed, 14 Sep 2022 00:54:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=26/uwpg877kUcP36OEZ2fnl1A+0pDTFxJzbD+WiV7CI=; b=BN4PaskBUK1LAkG0wxpTxXoYt++UqRhab0y4tgn3dXjJHzldWqV8WwKMK982MTSRJL rWSHJJkvTufKdHlyJRXR8o+HhXX60yT5K8sCg7dRaGwbICO7A9To5ShmkRREplABlFnt 6axrQnYA95nTtk+9kpuoqO/l8gV3WxKZZTMG07ilyoqRPJDSGj6Mn4r0nBeEPZfIZ7oK Qdj/se1AipSOG+fGF/rl69e8phdEySpp7VsURfzuBy0nL4M0eSDy1cp+tRnUHxyO5Fwm swyipe9SIudc/HbF1qO0iMqT0TNuD+wNpF389l7THnncbrl7Efwd1CoCDAzgyMfuvMuz LjCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=26/uwpg877kUcP36OEZ2fnl1A+0pDTFxJzbD+WiV7CI=; b=7Fifq0uKM2Le6pZEDlqNlUNsdj8Tu8wCGnTkhewoMI9URv7vJkxNc3aCHXLvJxl5zG aw1KVhKbOrRzeuxYTdsinyGjv5yeLYblObPZBhxjWnLuMlWz8Etajk0hrcLJ2xRwnO85 91iWa+h6S0SGz9b7y+1Pd9zbAD2t9Z1NL3c5RhLGwWQbdt/X1rhOhGlc8pU9ntsMRKKh Hyzme+vw78DXvOUjRdIKtpO/1DUB3wrO3HUJv/Oo+T1a+hKFcbMWr4OPBRtrQIIIBrJG NLAVD44vUfv0Qlq9MIFKzvZbRncPv1pxPlwZHMTvFCXbPMQruDxuiWERMgctH+48gqdD wSzQ== X-Gm-Message-State: ACrzQf0ND/e3yalBptmqldIRpV50RCTtT0Ri1B6dI1/SAZ9W8ysNr9tz P6mKBZU4suDrDm0IAsdV6xMr X-Google-Smtp-Source: AMsMyM5gQvdgJBCMaErQI1GsuC5WTIi7rcyhvK3RfM5sljJvEnzEkshNysDxavhPhzNglmiYNI4oxQ== X-Received: by 2002:a17:90b:3a87:b0:202:d8b7:2c03 with SMTP id om7-20020a17090b3a8700b00202d8b72c03mr3453142pjb.199.1663142053270; Wed, 14 Sep 2022 00:54:13 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.54.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:54:12 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH v4 02/12] PCI: qcom-ep: Rely on the clocks supplied by devicetree Date: Wed, 14 Sep 2022 13:23:40 +0530 Message-Id: <20220914075350.7992-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Generally, device drivers should just rely on the platform data like devicetree to supply the clocks required for the functioning of the peripheral. There is no need to hardcode the clk info in the driver. So get rid of the static clk info and obtain the platform supplied clks. The total number of clocks supplied is obtained using the devm_clk_bulk_get_all() API and used for the rest of the clk_bulk_ APIs. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 33 +++++++++-------------- 1 file changed, 13 insertions(+), 20 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 27b7c9710b5f..34c498d581de 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -130,16 +130,6 @@ enum qcom_pcie_ep_link_status { QCOM_PCIE_EP_LINK_DOWN, }; =20 -static struct clk_bulk_data qcom_pcie_ep_clks[] =3D { - { .id =3D "cfg" }, - { .id =3D "aux" }, - { .id =3D "bus_master" }, - { .id =3D "bus_slave" }, - { .id =3D "ref" }, - { .id =3D "sleep" }, - { .id =3D "slave_q2a" }, -}; - /** * struct qcom_pcie_ep - Qualcomm PCIe Endpoint Controller * @pci: Designware PCIe controller struct @@ -151,6 +141,8 @@ static struct clk_bulk_data qcom_pcie_ep_clks[] =3D { * @reset: PERST# GPIO * @wake: WAKE# GPIO * @phy: PHY controller block + * @clks: PCIe clocks + * @num_clks: PCIe clocks count * @perst_en: Flag for PERST enable * @perst_sep_en: Flag for PERST separation enable * @link_status: PCIe Link status @@ -170,6 +162,9 @@ struct qcom_pcie_ep { struct gpio_desc *wake; struct phy *phy; =20 + struct clk_bulk_data *clks; + int num_clks; + u32 perst_en; u32 perst_sep_en; =20 @@ -244,8 +239,7 @@ static int qcom_pcie_enable_resources(struct qcom_pcie_= ep *pcie_ep) { int ret; =20 - ret =3D clk_bulk_prepare_enable(ARRAY_SIZE(qcom_pcie_ep_clks), - qcom_pcie_ep_clks); + ret =3D clk_bulk_prepare_enable(pcie_ep->num_clks, pcie_ep->clks); if (ret) return ret; =20 @@ -266,8 +260,7 @@ static int qcom_pcie_enable_resources(struct qcom_pcie_= ep *pcie_ep) err_phy_exit: phy_exit(pcie_ep->phy); err_disable_clk: - clk_bulk_disable_unprepare(ARRAY_SIZE(qcom_pcie_ep_clks), - qcom_pcie_ep_clks); + clk_bulk_disable_unprepare(pcie_ep->num_clks, pcie_ep->clks); =20 return ret; } @@ -276,8 +269,7 @@ static void qcom_pcie_disable_resources(struct qcom_pci= e_ep *pcie_ep) { phy_power_off(pcie_ep->phy); phy_exit(pcie_ep->phy); - clk_bulk_disable_unprepare(ARRAY_SIZE(qcom_pcie_ep_clks), - qcom_pcie_ep_clks); + clk_bulk_disable_unprepare(pcie_ep->num_clks, pcie_ep->clks); } =20 static int qcom_pcie_perst_deassert(struct dw_pcie *pci) @@ -495,10 +487,11 @@ static int qcom_pcie_ep_get_resources(struct platform= _device *pdev, return ret; } =20 - ret =3D devm_clk_bulk_get(dev, ARRAY_SIZE(qcom_pcie_ep_clks), - qcom_pcie_ep_clks); - if (ret) - return ret; + pcie_ep->num_clks =3D devm_clk_bulk_get_all(dev, &pcie_ep->clks); + if (pcie_ep->num_clks < 0) { + dev_err(dev, "Failed to get clocks\n"); + return pcie_ep->num_clks; + } =20 pcie_ep->core_reset =3D devm_reset_control_get_exclusive(dev, "core"); if (IS_ERR(pcie_ep->core_reset)) --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA2FFECAAD8 for ; Wed, 14 Sep 2022 07:54:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230238AbiINHyg (ORCPT ); Wed, 14 Sep 2022 03:54:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230204AbiINHyV (ORCPT ); Wed, 14 Sep 2022 03:54:21 -0400 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 19E3D72EFE for ; Wed, 14 Sep 2022 00:54:19 -0700 (PDT) Received: by mail-pl1-x634.google.com with SMTP id c2so14324983plo.3 for ; Wed, 14 Sep 2022 00:54:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=cXVSIoAXy4k6GvjO7JA/nhvOJMAK8QRnMR9+cTCkOGs=; b=qez3AqbemKhd2KHJlD1Y8nPiFRA2B4wpF2ojCVOvYEpgfYVqNisNl6VaQqbg1qFVKv 3qysIrPolQaIUaSd8GhD4gt+oVRuahoSSICPiIAukmbJnsfXdtSaEqpnK1mLBRKyyJWx RGsJT5EebaZI1/7zaA2ZiAtBfe9ZGR8fTfsJbT1R7L/gnPzoQ9eIQCKSwWdmTlRmrZ23 hXVZ7njIpcPNg9Z2InNNa/OzsF/xeDhAio+c5fFTgV0tmqXaJGFjmPGLtmxPmp8G9WEd q66Ki1HYnnx1wW7o9hPrk8Rl4GIcCoekQUk4koJS7wWk1za3rtMFRmfqciCSlkQYDokA K5yA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=cXVSIoAXy4k6GvjO7JA/nhvOJMAK8QRnMR9+cTCkOGs=; b=e1VtXPttZsSHi5iNTpzBQK+kNxbu1dOP0gc6k1VH/5YsH1FBPlmA4KiE81N5zbh5e5 ODmG8EjuZra8wJg5qiMC1Ln0uPjTWZGeswBXB3yQCn37UU/zlfElWw55uY1G9tjWZKen fH3y3WEk36jzQXL9SVweH+ebbEhITVNO+kbY1w9fOyWTKldRglEhQ4ZntWO4FBNgQkWB dH/khsufxEvvWf5pdNYJ1WhHZQCSGNRngEzrGuXO4ByzZdfxQNk0G8NVRTSM6XGKQk+0 2LGZbKvpqsIntVqexC4diKeRhLp8SG1o1bvqeVwCA5294Qh4yzIqHou7gIyHF7Utqg6y WppA== X-Gm-Message-State: ACgBeo3HgrH9qxMd/MVreu4LrG0WQd3qcnuCMQTmHFdviQaydnkpWl/D PlvPPHJvU0dyfsp3KqkYnvbs X-Google-Smtp-Source: AA6agR4d+gm8VSzIVcCgMlF5CW7W94zSpFyFAlU9mNy7XgcL0NZIqXmaGst93x7L6Z/ZqsI3b4OthA== X-Received: by 2002:a17:902:bd05:b0:172:ae77:1eea with SMTP id p5-20020a170902bd0500b00172ae771eeamr35061464pls.158.1663142058990; Wed, 14 Sep 2022 00:54:18 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.54.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:54:18 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH v4 03/12] PCI: qcom-ep: Make use of the cached dev pointer Date: Wed, 14 Sep 2022 13:23:41 +0530 Message-Id: <20220914075350.7992-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In the qcom_pcie_ep_get_resources() function, dev pointer is already cached in a local variable. So let's make use of it instead of getting the dev pointer again from pdev struct. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 34c498d581de..1e09eca5b3b2 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -483,7 +483,7 @@ static int qcom_pcie_ep_get_resources(struct platform_d= evice *pdev, =20 ret =3D qcom_pcie_ep_get_io_resources(pdev, pcie_ep); if (ret) { - dev_err(&pdev->dev, "Failed to get io resources %d\n", ret); + dev_err(dev, "Failed to get io resources %d\n", ret); return ret; } =20 @@ -505,7 +505,7 @@ static int qcom_pcie_ep_get_resources(struct platform_d= evice *pdev, if (IS_ERR(pcie_ep->wake)) return PTR_ERR(pcie_ep->wake); =20 - pcie_ep->phy =3D devm_phy_optional_get(&pdev->dev, "pciephy"); + pcie_ep->phy =3D devm_phy_optional_get(dev, "pciephy"); if (IS_ERR(pcie_ep->phy)) ret =3D PTR_ERR(pcie_ep->phy); =20 --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87981ECAAD8 for ; Wed, 14 Sep 2022 07:55:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230273AbiINHy7 (ORCPT ); Wed, 14 Sep 2022 03:54:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230171AbiINHyf (ORCPT ); Wed, 14 Sep 2022 03:54:35 -0400 Received: from mail-pg1-x532.google.com (mail-pg1-x532.google.com [IPv6:2607:f8b0:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E161A73324 for ; Wed, 14 Sep 2022 00:54:25 -0700 (PDT) Received: by mail-pg1-x532.google.com with SMTP id r23so5012877pgr.6 for ; Wed, 14 Sep 2022 00:54:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=xK6rQZk9RPmXG6rMhe5oBA83BpczBJE39eGNhUm9qAw=; b=eyCp0nexB3UmAfcdR3XWqu7f1E63DpnHWURGP0djm9lVIERmy+zhUEaipxpBzDxi5T TlXOUZuT5FOF3S56Wn8dfKGJzUmUng8wKJfah7s1EGe/CEBOy6T7QLD1unO+9zjL0YRk TdFN2pj6zNeONQPUR9rLI87Yyu4H2ms/528+iixQjZ4u8gTGDxMhsv2CRauCna7PdtoR OIrFI3TphvaRon5hch1jNEsGbzGjsI2Ax9Dhc/ST96qmjkxAIkiyTTkBTfI7vhWTM2Is GbNZcoDijA3FFkHZOaadeV8NplXr9BlV3WecY7FtKk0+NZiKC0ye0mffUyiCD0CL1x8S ZJDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=xK6rQZk9RPmXG6rMhe5oBA83BpczBJE39eGNhUm9qAw=; b=rR5xvx2jXa6O5OdOnenipOTnbzPA2+1JykaeSy8lGcys3t6a9Edgz0vCeQFlQHCVQ1 XFyGHeZIXnUNhMpH9OkjhVePYic6Awrz6QtM2Xm0LRCu7vqL2jvlN/m2enZhMzJGgUj4 sREGsMU2QJQOjPZgd/6wz+4fFZP+nC2MA1ferVDthe29cXBiVKRzhl4fCq/TIANjasAn g6U04RMXahV1BH0895w7toK/RZ2ytmGDaB90Dg6bUHUS72Pph0npDKk7RzP2w65A/OuU VU6FA82IRQpx5epw3GbcAHEvsR43BVng63lw5bgnQzOW0/5WzrdPn5WRCrV18FqTTruO iQtw== X-Gm-Message-State: ACgBeo1lH1qXuqueP5jKax7fhNlWfHQy1Sbi/Yh8XgkykGQ32G8dGhId vDgV+pjkvkHi3KxugMpsbpKg X-Google-Smtp-Source: AA6agR6UN2GaGwQkQaxHTI5RSgoMjt5QB04yrPyARGzGLJF0Fi1c6KMWK6Q792VB0qXpbF13n9OE3A== X-Received: by 2002:a05:6a00:e1b:b0:537:7c74:c405 with SMTP id bq27-20020a056a000e1b00b005377c74c405mr36025101pfb.43.1663142064806; Wed, 14 Sep 2022 00:54:24 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.54.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:54:24 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH v4 04/12] PCI: qcom-ep: Disable IRQs during driver remove Date: Wed, 14 Sep 2022 13:23:42 +0530 Message-Id: <20220914075350.7992-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Disable the Global and PERST IRQs during driver remove to avoid getting spurious IRQs after resource deallocation. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 1e09eca5b3b2..72eb6cacdb3a 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -585,11 +585,11 @@ static int qcom_pcie_ep_enable_irq_resources(struct p= latform_device *pdev, { int irq, ret; =20 - irq =3D platform_get_irq_byname(pdev, "global"); - if (irq < 0) - return irq; + pcie_ep->global_irq =3D platform_get_irq_byname(pdev, "global"); + if (pcie_ep->global_irq < 0) + return pcie_ep->global_irq; =20 - ret =3D devm_request_threaded_irq(&pdev->dev, irq, NULL, + ret =3D devm_request_threaded_irq(&pdev->dev, pcie_ep->global_irq, NULL, qcom_pcie_ep_global_irq_thread, IRQF_ONESHOT, "global_irq", pcie_ep); @@ -698,6 +698,9 @@ static int qcom_pcie_ep_remove(struct platform_device *= pdev) { struct qcom_pcie_ep *pcie_ep =3D platform_get_drvdata(pdev); =20 + disable_irq(pcie_ep->global_irq); + disable_irq(pcie_ep->perst_irq); + if (pcie_ep->link_status =3D=3D QCOM_PCIE_EP_LINK_DISABLED) return 0; =20 --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 787F1ECAAD3 for ; Wed, 14 Sep 2022 07:55:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230240AbiINHzG (ORCPT ); Wed, 14 Sep 2022 03:55:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230214AbiINHyg (ORCPT ); Wed, 14 Sep 2022 03:54:36 -0400 Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D263DFC for ; Wed, 14 Sep 2022 00:54:32 -0700 (PDT) Received: by mail-pf1-x42c.google.com with SMTP id u132so14109377pfc.6 for ; Wed, 14 Sep 2022 00:54:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=BmOWU26gjLBIOonkKcZ0ILBj0OeiqDzaVAugyvdHpNQ=; b=ScM8Pi5xIEHRfZElpQvyLnPbEmuIDVDUfS64bTvorxQf3MQlJGCGSFwwhlTpQqXajY dEOnCFWcI8pMFn7nYJ7QR4JrW6WTQK9v5Nbyc/3pnDtdcmCOsDfe+LC+Ot5Olr/fQ/hW Ra9ZQceClL0Xh2ESP7pjfaGkI/Vo6aJHCOSIUi91jHDf5+7hDCP/CIYSPb7VwnU4j3J8 ALqMGXIk6bz7roWDxnyriH9XiqDPKxVbhoRFESq0VFhSIsInSok8Wepimlx/V7CyHLCK pyMmq+/37lUgTMduEQbKl6lIgwxdrRo6YCIF+qhiN7iwR9xf3IRF+Q8ILzSguc6ET2WB 1yuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=BmOWU26gjLBIOonkKcZ0ILBj0OeiqDzaVAugyvdHpNQ=; b=ij8ba75McZuLkgy45TrYZEors2oxwFdrxjgTi5UciJ2GTmJHzzuA3RHWYu3cwFU4Ho sQQR1iD60Joq0DkduBGjgth/6M5RU0VrItlV+B3kAxeuvtEkR9HFYpFvYe4PUFe0quVr iBjL8qjViPYMEhR5dqRaE33V+g9SFX7b/gJZYjg26+GD8mB1iZyT7y+MKMD7HPBeonlG UY5fjQdpjoN7Q7Tt7Sb1eTa01D9D7MXiorbsBQO0Ps8RtQ6z+1sLhxhWaF05a8EOsFmp WeSaYF2DXQrLRGyJ1lVfLsJY6qDKgbgbAYh51lIekFodCFHUnpjkQ/MWqIT13cXbdRSk d8LQ== X-Gm-Message-State: ACgBeo0h99DSnhjNZZiCxzL0CgbkPivJhRtOYYKYaDOqvRlmA9DOLwKV 2BlLqP6RQFT+lQ18FTasLHeV X-Google-Smtp-Source: AA6agR7J9lOpcH4DAcMCYZmGgbbWz6EuCww8Cg5abiUxwkNkJP96/s3sSYcJ793K0ntpPo/MN8xAmg== X-Received: by 2002:a63:847:0:b0:439:22e4:8e49 with SMTP id 68-20020a630847000000b0043922e48e49mr8965145pgi.165.1663142071017; Wed, 14 Sep 2022 00:54:31 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.54.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:54:30 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH v4 05/12] PCI: qcom-ep: Expose link transition counts via debugfs Date: Wed, 14 Sep 2022 13:23:43 +0530 Message-Id: <20220914075350.7992-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Qualcomm PCIe controllers have debug registers in the MMIO region that count PCIe link transitions. Expose them over debugfs to userspace to help debug the low power issues. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 60 +++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 72eb6cacdb3a..2dc6d4e44aff 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -10,6 +10,7 @@ */ =20 #include +#include #include #include #include @@ -45,6 +46,11 @@ #define PARF_ATU_BASE_ADDR 0x634 #define PARF_ATU_BASE_ADDR_HI 0x638 #define PARF_SRIS_MODE 0x644 +#define PARF_DEBUG_CNT_PM_LINKST_IN_L2 0xc04 +#define PARF_DEBUG_CNT_PM_LINKST_IN_L1 0xc0c +#define PARF_DEBUG_CNT_PM_LINKST_IN_L0S 0xc10 +#define PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L1 0xc84 +#define PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L2 0xc88 #define PARF_DEVICE_TYPE 0x1000 #define PARF_BDF_TO_SID_CFG 0x2c00 =20 @@ -135,12 +141,14 @@ enum qcom_pcie_ep_link_status { * @pci: Designware PCIe controller struct * @parf: Qualcomm PCIe specific PARF register base * @elbi: Designware PCIe specific ELBI register base + * @mmio: MMIO register base * @perst_map: PERST regmap * @mmio_res: MMIO region resource * @core_reset: PCIe Endpoint core reset * @reset: PERST# GPIO * @wake: WAKE# GPIO * @phy: PHY controller block + * @debugfs: PCIe Endpoint Debugfs directory * @clks: PCIe clocks * @num_clks: PCIe clocks count * @perst_en: Flag for PERST enable @@ -154,6 +162,7 @@ struct qcom_pcie_ep { =20 void __iomem *parf; void __iomem *elbi; + void __iomem *mmio; struct regmap *perst_map; struct resource *mmio_res; =20 @@ -161,6 +170,7 @@ struct qcom_pcie_ep { struct gpio_desc *reset; struct gpio_desc *wake; struct phy *phy; + struct dentry *debugfs; =20 struct clk_bulk_data *clks; int num_clks; @@ -446,6 +456,9 @@ static int qcom_pcie_ep_get_io_resources(struct platfor= m_device *pdev, =20 pcie_ep->mmio_res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "mmio"); + pcie_ep->mmio =3D devm_pci_remap_cfg_resource(dev, pcie_ep->mmio_res); + if (IS_ERR(pcie_ep->mmio)) + return PTR_ERR(pcie_ep->mmio); =20 syscon =3D of_parse_phandle(dev->of_node, "qcom,perst-regs", 0); if (!syscon) { @@ -629,6 +642,37 @@ static int qcom_pcie_ep_raise_irq(struct dw_pcie_ep *e= p, u8 func_no, } } =20 +static int qcom_pcie_ep_link_transition_count(struct seq_file *s, void *da= ta) +{ + struct qcom_pcie_ep *pcie_ep =3D (struct qcom_pcie_ep *) + dev_get_drvdata(s->private); + + seq_printf(s, "L0s transition count: %u\n", + readl_relaxed(pcie_ep->mmio + PARF_DEBUG_CNT_PM_LINKST_IN_L0S)); + + seq_printf(s, "L1 transition count: %u\n", + readl_relaxed(pcie_ep->mmio + PARF_DEBUG_CNT_PM_LINKST_IN_L1)); + + seq_printf(s, "L1.1 transition count: %u\n", + readl_relaxed(pcie_ep->mmio + PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L1)); + + seq_printf(s, "L1.2 transition count: %u\n", + readl_relaxed(pcie_ep->mmio + PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L2)); + + seq_printf(s, "L2 transition count: %u\n", + readl_relaxed(pcie_ep->mmio + PARF_DEBUG_CNT_PM_LINKST_IN_L2)); + + return 0; +} + +static void qcom_pcie_ep_init_debugfs(struct qcom_pcie_ep *pcie_ep) +{ + struct dw_pcie *pci =3D &pcie_ep->pci; + + debugfs_create_devm_seqfile(pci->dev, "link_transition_count", pcie_ep->d= ebugfs, + qcom_pcie_ep_link_transition_count); +} + static const struct pci_epc_features qcom_pcie_epc_features =3D { .linkup_notifier =3D true, .core_init_notifier =3D true, @@ -661,6 +705,7 @@ static int qcom_pcie_ep_probe(struct platform_device *p= dev) { struct device *dev =3D &pdev->dev; struct qcom_pcie_ep *pcie_ep; + char *name; int ret; =20 pcie_ep =3D devm_kzalloc(dev, sizeof(*pcie_ep), GFP_KERNEL); @@ -686,8 +731,21 @@ static int qcom_pcie_ep_probe(struct platform_device *= pdev) if (ret) goto err_disable_resources; =20 + name =3D devm_kasprintf(dev, GFP_KERNEL, "%pOFP", dev->of_node); + if (!name) { + ret =3D -ENOMEM; + goto err_disable_irqs; + } + + pcie_ep->debugfs =3D debugfs_create_dir(name, NULL); + qcom_pcie_ep_init_debugfs(pcie_ep); + return 0; =20 +err_disable_irqs: + disable_irq(pcie_ep->global_irq); + disable_irq(pcie_ep->perst_irq); + err_disable_resources: qcom_pcie_disable_resources(pcie_ep); =20 @@ -701,6 +759,8 @@ static int qcom_pcie_ep_remove(struct platform_device *= pdev) disable_irq(pcie_ep->global_irq); disable_irq(pcie_ep->perst_irq); =20 + debugfs_remove_recursive(pcie_ep->debugfs); + if (pcie_ep->link_status =3D=3D QCOM_PCIE_EP_LINK_DISABLED) return 0; =20 --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E15B3ECAAD8 for ; Wed, 14 Sep 2022 07:55:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230072AbiINHzT (ORCPT ); Wed, 14 Sep 2022 03:55:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230185AbiINHyz (ORCPT ); Wed, 14 Sep 2022 03:54:55 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AAB726569 for ; Wed, 14 Sep 2022 00:54:37 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id fs14so13725789pjb.5 for ; Wed, 14 Sep 2022 00:54:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=zNrBu1Ho157JvXJ7EWepzZnt5L0+FsXJv3lwmZhG3S4=; b=DGA3wYlgIMRr/tBoLA04b0bxdGdZp4gQW0fFU/hn3RoVKLKlLEd9Glspjr4sTd9QSj vyI6pEUxb+AZ7Tj7uCBs+deTDY3SB3POaPWeHQKWS6pkewDhPDsTXxj+vlZLCf5YoAlo DdYjecwo6/JXJLBmHPtGXFv6paKve7WoQI7fjWDkyMn2sQSm413GwGH/Sng5IcN6q0RV y+s4hCxO2mkAoGYAnqn6lGuv3xSzBMeF0uCp64uk3EmiTEQEE8dmao/3Q/vOnbW92TAM zPNbtFJyT81KhV3BmK7q+uO3GLA+4qUpkSFb2CT8JrjYaIKfdH3TwM9dsMeafHyc5t6V h96w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=zNrBu1Ho157JvXJ7EWepzZnt5L0+FsXJv3lwmZhG3S4=; b=vgW99mUYD25X66kWgOXHbcSykzsrBz5MB64ycjMYeJ1yTeqqR4jGSgnr8c6MnOOv/P kJ81A/9FUxIiF9ZXhnZGEpNnXPZE+YnC2hs//IEi2OSFpuSLSsg13cGuySlEqPr7Af4m XVJiS0vbK0RlNicLexdxnQzMoUVS3Fm7pabcyT6AKsn3FqiXsJ2xht/40kLCkKEy4dO7 XZ9+HooEv6LdlSaL9mGCLRtJXJCnB6GkUOGvSuWDXnOAXKpMaosoP2f1gLYrtcLZ1+5v +7BzgBCuuu7N/9nSg8sqsz1/ku6hjf2lEFNEF+oBcj8joiCUgSXBv75TO0V7kPgMYQ/4 8W4w== X-Gm-Message-State: ACgBeo3zflbolAaEPMpAwf92kHBYuSM0G6LyzgV7MiGZ/lI1kEWEfOkg OccVKK0vte/hPcrKCs7Dkb+t X-Google-Smtp-Source: AA6agR7h0otvP65TpQvb+ut0k5FYF+wWp4yrnNe48ERprrnT7y18sLkINKI/0EK30RIPJmGVahQrmA== X-Received: by 2002:a17:903:32c1:b0:176:d67b:cf70 with SMTP id i1-20020a17090332c100b00176d67bcf70mr37160710plr.117.1663142077084; Wed, 14 Sep 2022 00:54:37 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.54.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:54:36 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH v4 06/12] PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS Date: Wed, 14 Sep 2022 13:23:44 +0530 Message-Id: <20220914075350.7992-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" During L1SS, gate the Master clock supplied to the MHI bus to save power. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 2dc6d4e44aff..526e98ea23f6 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -27,6 +27,7 @@ #define PARF_SYS_CTRL 0x00 #define PARF_DB_CTRL 0x10 #define PARF_PM_CTRL 0x20 +#define PARF_MHI_CLOCK_RESET_CTRL 0x174 #define PARF_MHI_BASE_ADDR_LOWER 0x178 #define PARF_MHI_BASE_ADDR_UPPER 0x17c #define PARF_DEBUG_INT_EN 0x190 @@ -89,6 +90,9 @@ #define PARF_PM_CTRL_READY_ENTR_L23 BIT(2) #define PARF_PM_CTRL_REQ_NOT_ENTR_L1 BIT(5) =20 +/* PARF_MHI_CLOCK_RESET_CTRL fields */ +#define PARF_MSTR_AXI_CLK_EN BIT(1) + /* PARF_AXI_MSTR_RD_HALT_NO_WRITES register fields */ #define PARF_AXI_MSTR_RD_HALT_NO_WRITE_EN BIT(0) =20 @@ -394,6 +398,11 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pc= i) pcie_ep->parf + PARF_MHI_BASE_ADDR_LOWER); writel_relaxed(0, pcie_ep->parf + PARF_MHI_BASE_ADDR_UPPER); =20 + /* Gate Master AXI clock to MHI bus during L1SS */ + val =3D readl_relaxed(pcie_ep->parf + PARF_MHI_CLOCK_RESET_CTRL); + val &=3D ~PARF_MSTR_AXI_CLK_EN; + val =3D readl_relaxed(pcie_ep->parf + PARF_MHI_CLOCK_RESET_CTRL); + dw_pcie_ep_init_notify(&pcie_ep->pci.ep); =20 /* Enable LTSSM */ --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68B39ECAAD8 for ; Wed, 14 Sep 2022 07:55:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229978AbiINHzg (ORCPT ); Wed, 14 Sep 2022 03:55:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230239AbiINHzF (ORCPT ); Wed, 14 Sep 2022 03:55:05 -0400 Received: from mail-pg1-x530.google.com (mail-pg1-x530.google.com [IPv6:2607:f8b0:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44F0DF58F for ; Wed, 14 Sep 2022 00:54:44 -0700 (PDT) Received: by mail-pg1-x530.google.com with SMTP id t70so13599977pgc.5 for ; Wed, 14 Sep 2022 00:54:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=rmpTVMmLmv6UMsIzgv+O74eFW0TvLRItNBIUwPHHvPM=; b=W80PLz3cj7OTdR2xEOoF7e15KEc68u0lAxgpkr052tLq0DN9vxB+vD6435bBK7Outd PhwZauqjX4/X5LWYKbAlBMzpqSkNf9LEzzqxTXPFjIvU0jFBJkkpsCuqkGNvDIFAQXW+ Zjq0Q40DphcIvkqCkyx+tzNI4w59TGnztg7Y6OiaOGhiVL220eo5AOHg6RPzg5A+MxjU pSpLLDNwRAZPrrNGSQZmRMFpwU4nOsZib2PvmoZqYSjAkMxvS6neX4cOEx9vzICYQuua QYDGJ7Y1H6bCjS8PvR8oGFQN+1IBH8fv6yDPP+BQajL/G28f3gDtKVMeze/3PzIEHj7e +7fQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=rmpTVMmLmv6UMsIzgv+O74eFW0TvLRItNBIUwPHHvPM=; b=aBXgLTdR0rk9lCS2CkqDF84k7hMYJKZwKmY3s3coixyh5JKMiKzDak8+GHoWoHmFaq m2MtcUiapezqu5oH75H/c2PUv4XK3BbifmlK4NzyfOhRiImdpphrhWxD8lmhDekm8OoO 6JkW08+b1PNC+U+l77qKKfsDVXrEQWxBT956V90bdJn/b3zzs2OOjMlaIe/GO2TVTA5X cMg0OXlhhmGM58JjdaBrQgMCw39v9lTVn8lLvgJ3lASqSdiCw3sTEosbFh8TSiMzFEjW Tm43RJH8vYunMRToP4lXbF7d2Us3xUoocXgRPVbvk+oaOKnCVduP5xi/Y7aYtecrhO8N bNWg== X-Gm-Message-State: ACgBeo0Kznpjk9Hd4B6dk+vkyID0d3iy5rseXzhfCvP7uAK/CaApc+dB 9tPU2gstnxnhXpl+w17Qk19h X-Google-Smtp-Source: AA6agR5CxdndaK0G7PKDFZZC4RRnzrbG3c3QW1kLROYUPhM/+vc97wH8N+DYutyDUHSyS3+JkDridA== X-Received: by 2002:a63:2c0b:0:b0:434:ebb6:7594 with SMTP id s11-20020a632c0b000000b00434ebb67594mr29028939pgs.245.1663142082905; Wed, 14 Sep 2022 00:54:42 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.54.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:54:42 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH v4 07/12] PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic Date: Wed, 14 Sep 2022 13:23:45 +0530 Message-Id: <20220914075350.7992-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Master AXI clock can be disabled when it is not used i.e., when there is no traffic on the PCIe bus. This helps to save power during idle state. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 526e98ea23f6..40f75a6c55df 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -105,6 +105,7 @@ /* PARF_SYS_CTRL register fields */ #define PARF_SYS_CTRL_AUX_PWR_DET BIT(4) #define PARF_SYS_CTRL_CORE_CLK_CGC_DIS BIT(6) +#define PARF_SYS_CTRL_MSTR_ACLK_CGC_DIS BIT(10) #define PARF_SYS_CTRL_SLV_DBI_WAKE_DISABLE BIT(11) =20 /* PARF_DB_CTRL register fields */ @@ -341,8 +342,14 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pc= i) val &=3D ~PARF_Q2A_FLUSH_EN; writel_relaxed(val, pcie_ep->parf + PARF_Q2A_FLUSH); =20 - /* Disable DBI Wakeup, core clock CGC and enable AUX power */ + /* + * Disable Master AXI clock during idle + * Do not allow DBI access to take the core out of L1 + * Disable core clock gating that gates PIPE clock from propagating to co= re clock + * Report to the host that Vaux is present + */ val =3D readl_relaxed(pcie_ep->parf + PARF_SYS_CTRL); + val &=3D ~PARF_SYS_CTRL_MSTR_ACLK_CGC_DIS; val |=3D PARF_SYS_CTRL_SLV_DBI_WAKE_DISABLE | PARF_SYS_CTRL_CORE_CLK_CGC_DIS | PARF_SYS_CTRL_AUX_PWR_DET; --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 482D2C6FA89 for ; Wed, 14 Sep 2022 07:55:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229740AbiINHzr (ORCPT ); Wed, 14 Sep 2022 03:55:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230205AbiINHzS (ORCPT ); Wed, 14 Sep 2022 03:55:18 -0400 Received: from mail-pf1-x433.google.com (mail-pf1-x433.google.com [IPv6:2607:f8b0:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C5EF713D3E for ; Wed, 14 Sep 2022 00:54:50 -0700 (PDT) Received: by mail-pf1-x433.google.com with SMTP id a80so5539334pfa.4 for ; Wed, 14 Sep 2022 00:54:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=UaIe6nvb9frcJULOPfASw/VY+z26bpOj35NUY7Eb3q4=; b=CbZeoWcHgdnKn4qTwqT5ZttthixXdYEP2c+/hP1A4NhotUgT6wlYCHbqwuvYprNJa8 JB3/aTnxEc+/d9uggCPEHpdZTpOTY0PZ94m3ftwlvHHUMrs/h83pB1K80CALEKyHt0JY uSbbXr7XeLfRWmT1xCLlSbKCAlaGiAiaVVz/Q07Yy1ygqq2DS/D5PgoP2DuV4wjqglze fMY1foSytf3d+d0M27/nN5Xep5VqKku3aYyaGTIHHheijQ3GFmd5inXrmaC2KDcT3GDu /+YiIVtLq5xSUHoJ8aH49OTyDzP+BNBhkunInul5BR2o59jAnue82XqfKS0pKvPPCeP9 yuxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=UaIe6nvb9frcJULOPfASw/VY+z26bpOj35NUY7Eb3q4=; b=3ViSP+VvFVbMGPwDK6IXJMQZxKjnN9AsBkrbOaa8xAmaIdzPUrRWP+rK7UAv9Rabwc OxkF1WnjBPo8neAKvGQT8kDIwJw+ruTY0/Xv7umLAbFqOLQBGkhKj/jeWhmkIIh4gH21 t3tU90af7h5LT7hFYoOdYgFLl6eXBONbMDc8cFUWrfF438hjSVa8TTIl0pNObV0LzK2r 31wYzFOq62MbdIX72ZAqnrYPmlLVnkxeKZqLPKVu3NBctdcPy850W7M1ugCY16TujXQl flrVnXZ7ZitNzzyq/Jkj89DudTeDft8DL4xVTn3Hqkpq9DZGqqrDPTIjUUtl+upEbn9B UlpA== X-Gm-Message-State: ACgBeo2R2dAxEl8S0Xbrws+4WJaXG78wxbWvKPtRqiaAgwQLcZpbSRbk MZKDjj8KgTORwmlUxGewUysE X-Google-Smtp-Source: AA6agR6sK2IA9cK0gctxDyi8ks8VgnfArTP4xHb+3VNl6dXRvSNetj++Yu3nGTUWsV6im5awJ5fwiw== X-Received: by 2002:a63:4916:0:b0:439:57e4:5700 with SMTP id w22-20020a634916000000b0043957e45700mr3906450pga.369.1663142089588; Wed, 14 Sep 2022 00:54:49 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.54.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:54:48 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 08/12] dt-bindings: PCI: qcom-ep: Make PERST separation optional Date: Wed, 14 Sep 2022 13:23:46 +0530 Message-Id: <20220914075350.7992-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" PERST separation is an optional debug feature used to collect the crash dump from the PCIe endpoint devices by the PCIe host when the endpoint crashes. This feature keeps the PCIe link up by separating the PCIe IP block from the SoC reset logic. So remove the corresponding property "qcom,perst-regs" from the required properties list. Acked-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Docu= mentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 3d23599e5e91..b728ede3f09f 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -105,7 +105,6 @@ required: - reg-names - clocks - clock-names - - qcom,perst-regs - interrupts - interrupt-names - reset-gpios --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49FA7ECAAD3 for ; Wed, 14 Sep 2022 07:56:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230236AbiINH4A (ORCPT ); Wed, 14 Sep 2022 03:56:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230268AbiINHzX (ORCPT ); Wed, 14 Sep 2022 03:55:23 -0400 Received: from mail-pg1-x531.google.com (mail-pg1-x531.google.com [IPv6:2607:f8b0:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CC3F12D34 for ; Wed, 14 Sep 2022 00:54:56 -0700 (PDT) Received: by mail-pg1-x531.google.com with SMTP id bh13so13607903pgb.4 for ; Wed, 14 Sep 2022 00:54:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=qIqmnnPPd/w9PevtCzz3I9Xl0se/j1JE8K0DzKiojlg=; b=xLwR1mJuVy34/JvHtpZKgmKBiqRV+MIFyUCk0n6BmwK5jdgtI2R7dz0OHzvYMo9DGO NW+Wg7NqwoiQmhHpAP/GA5xju3wTlWZDXOC+knC7yN7jw5qfECsSXRLbIjkO4joaoWtb 8sXIM/d7vKUjJfpv3ccDXHO3bUO0z+lEMOYJksUvp0MjW4hC7kw711ynHQf8IqguMPrd vv87xH8Tmxl3zK0w3SVgFZJmxnotad2NDOtnfLIkfZSuAUURbS9hkHyVoqTzfML+Stix T6tO35N2jQlNUUHwi5unIYHzzqhmOWCWb7hmIJHSG+eqL2VPd4U1z2AdC//3CNlSL0/t NgZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=qIqmnnPPd/w9PevtCzz3I9Xl0se/j1JE8K0DzKiojlg=; b=7wH5XtzITejODM9I/K44K6Q306ra1d6D4rh45zfLge//nO/3tat2zWCB9FP9XD6iUj qjwdjwYk3nhHr8cVAoiztGVR4dgHrxHcJBlujzxSCIqMQh5TbRBcMmXmvCrgF8Sg+qho p0Y14Yjf0cTFPruOifxbWyaY3RyA/viYcXZuQwCNDa2K5i+K4UH9Kz2/d2+SrTUISNzA tooVTck8Z+dngGpLj6gbCCEOEBzlYPjvtTf9e1nRslMbYkCP0ql5sId5W50iZtviZe7N ks5ULOHSvdwOcuPA2uC8rGDwgAktgu33DZo9hcxwCPZro/mg3vctY+VdEBVQODDx6oKM /S2g== X-Gm-Message-State: ACgBeo1R44SoyPp6imD5c8ykDJH7LeHSy2JxoR84X11YXuEzt7+qSe93 W3fGgwCfbdcAavU6E8/fnuxV X-Google-Smtp-Source: AA6agR6CniLWKO3rP5PihB6hHOHcm/blzCTKeYPSDusx8T0u0JuJSFk8eJwnOtZcYkLjeMQ18NtkOw== X-Received: by 2002:a05:6a00:174f:b0:53a:a96b:10b0 with SMTP id j15-20020a056a00174f00b0053aa96b10b0mr36456123pfc.68.1663142095704; Wed, 14 Sep 2022 00:54:55 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.54.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:54:55 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH v4 09/12] PCI: qcom-ep: Make PERST separation optional Date: Wed, 14 Sep 2022 13:23:47 +0530 Message-Id: <20220914075350.7992-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" PERST separation is an optional debug feature used to collect the crash dump from the PCIe endpoint devices by the PCIe host when the endpoint crashes. This feature keeps the PCIe link up by separating the PCIe IP block from the SoC reset logic. Hence, make the property optional in the driver. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 40f75a6c55df..92140a09aac5 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -220,8 +220,10 @@ static int qcom_pcie_ep_core_reset(struct qcom_pcie_ep= *pcie_ep) */ static void qcom_pcie_ep_configure_tcsr(struct qcom_pcie_ep *pcie_ep) { - regmap_write(pcie_ep->perst_map, pcie_ep->perst_en, 0); - regmap_write(pcie_ep->perst_map, pcie_ep->perst_sep_en, 0); + if (pcie_ep->perst_map) { + regmap_write(pcie_ep->perst_map, pcie_ep->perst_en, 0); + regmap_write(pcie_ep->perst_map, pcie_ep->perst_sep_en, 0); + } } =20 static int qcom_pcie_dw_link_up(struct dw_pcie *pci) @@ -478,8 +480,8 @@ static int qcom_pcie_ep_get_io_resources(struct platfor= m_device *pdev, =20 syscon =3D of_parse_phandle(dev->of_node, "qcom,perst-regs", 0); if (!syscon) { - dev_err(dev, "Failed to parse qcom,perst-regs\n"); - return -EINVAL; + dev_dbg(dev, "PERST separation not available\n"); + return 0; } =20 pcie_ep->perst_map =3D syscon_node_to_regmap(syscon); --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A325C6FA8A for ; Wed, 14 Sep 2022 07:56:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230054AbiINH4M (ORCPT ); Wed, 14 Sep 2022 03:56:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56490 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230239AbiINHzj (ORCPT ); Wed, 14 Sep 2022 03:55:39 -0400 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 071BD23175 for ; Wed, 14 Sep 2022 00:55:03 -0700 (PDT) Received: by mail-pj1-x1033.google.com with SMTP id q3so13734504pjg.3 for ; Wed, 14 Sep 2022 00:55:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=UjeSr7GmOsJMT+Z5PzuL7iC6REVk9JcijrDBIjQQMQs=; b=EN6Ft8Rz9yghwWkUn60ljbTMJvs7oQkdctRPhspX04PXtDiKzJlZelV6ThXigY9vIy slMpTByqT+wwa0qsNA67qOffrtIkd22b8KzKhha9CkEqh1lGRYDsR3gQrrRRDipaFV4J fZ+XhrDVHScaaiWqzgXw1iGhJLchqgsbWMEK//KmkWpNehAwjlsfXouybNflY09KEds1 ELmpdZyOcvpNCIK5bj/3DGz1xnJThayB2DLoZ9F8XC1y3OPcc8CGgg8dia/1nkwjzWbU ffxH3X93K93wfn6c7ARHhTO2YV9dKE3oX7l07aYsSrAd8g13A9bUgM5ISs0L2XQ1qnZT 2pwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=UjeSr7GmOsJMT+Z5PzuL7iC6REVk9JcijrDBIjQQMQs=; b=YuOqIjexXVinjGx2xf3JXcCBL2gqWmxehycZ2XdLxYr9Li9TlAbwpW2LJvoEaPzgnX OQ8Md/Uf7MtmuQgKE3hlQjGF2EbYCt2ZN2XUi4517YykQHPig45/6ftWXovYWxyVcrqI uxHAmvQ8jRVjgc8b44LCgj6BjLm4WjN/JsA+psB4QYNgseQ9kkJRlKQ1vPY7ucJju8SD /RcsaRsHO/Hmh5p4KmlH6jgeY0ztF4CiHyMQlPzcHHgjPdVO/Pasf6QyrlzC0WUvCOuA j709OCCF3DyPBhAIbselheMzzctCvUSzxw7/K+yUFY6+hveJGzQmjyu2+briL5eYGQUj YLXQ== X-Gm-Message-State: ACgBeo0MfeJ9Z/Sj/XYOe9hfysPNda2TEECT0nN3iSwSljosx2YgoE99 97xZwPsl5w/KCP1Tazsvyug1 X-Google-Smtp-Source: AA6agR5SGWWD95fzg7S819tEkj4IaSeAloUhWHNsvTHW9b3Ay5m7gWQ4qz8AI3tkXdh5Ecf3qipDtg== X-Received: by 2002:a17:902:dad1:b0:178:1d6b:cf91 with SMTP id q17-20020a170902dad100b001781d6bcf91mr19447796plx.70.1663142102287; Wed, 14 Sep 2022 00:55:02 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.54.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:55:01 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 10/12] dt-bindings: PCI: qcom-ep: Define clocks per platform Date: Wed, 14 Sep 2022 13:23:48 +0530 Message-Id: <20220914075350.7992-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In preparation of adding the bindings for future SoCs, let's define the clocks per platform. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 50 ++++++++++++------- 1 file changed, 31 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Docu= mentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index b728ede3f09f..bb8e982e69be 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -9,9 +9,6 @@ title: Qualcomm PCIe Endpoint Controller binding maintainers: - Manivannan Sadhasivam =20 -allOf: - - $ref: "pci-ep.yaml#" - properties: compatible: const: qcom,sdx55-pcie-ep @@ -35,24 +32,10 @@ properties: - const: mmio =20 clocks: - items: - - description: PCIe Auxiliary clock - - description: PCIe CFG AHB clock - - description: PCIe Master AXI clock - - description: PCIe Slave AXI clock - - description: PCIe Slave Q2A AXI clock - - description: PCIe Sleep clock - - description: PCIe Reference clock + maxItems: 7 =20 clock-names: - items: - - const: aux - - const: cfg - - const: bus_master - - const: bus_slave - - const: slave_q2a - - const: sleep - - const: ref + maxItems: 7 =20 qcom,perst-regs: description: Reference to a syscon representing TCSR followed by the t= wo @@ -112,6 +95,35 @@ required: - reset-names - power-domains =20 +allOf: + - $ref: pci-ep.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,sdx55-pcie-ep + then: + properties: + clocks: + items: + - description: PCIe Auxiliary clock + - description: PCIe CFG AHB clock + - description: PCIe Master AXI clock + - description: PCIe Slave AXI clock + - description: PCIe Slave Q2A AXI clock + - description: PCIe Sleep clock + - description: PCIe Reference clock + clock-names: + items: + - const: aux + - const: cfg + - const: bus_master + - const: bus_slave + - const: slave_q2a + - const: sleep + - const: ref + unevaluatedProperties: false =20 examples: --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB0CEECAAD3 for ; Wed, 14 Sep 2022 07:56:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229553AbiINH42 (ORCPT ); Wed, 14 Sep 2022 03:56:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229781AbiINHzs (ORCPT ); Wed, 14 Sep 2022 03:55:48 -0400 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23E8D4454C for ; Wed, 14 Sep 2022 00:55:09 -0700 (PDT) Received: by mail-pj1-x1032.google.com with SMTP id ge9so2220805pjb.1 for ; Wed, 14 Sep 2022 00:55:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=9mP9HJdXVQAxtsXYpKC+mSQmcqbaHq7yO4Fo8xLEceU=; b=wUYIypOhGADGriBI+bgSRel8LMXbpdGqu9/K77qWEwH64/UwapHSINwuixauatFQVk WMK2f7wAtaMNTmJ6LW0Z5QDYcOXpzm6SKnovPAZPUrrc+ylHK66rhmKzWDfaarZJ9rNz CuvtrZiYbgO3iDlkxqXAYuZGZV6d3iFjhOKokE6zrBj6Qx1S4QFOkCuBtLrQnhVjJM0S uU97M8xv7YoznAK8Kl+axyREUlhNamsPYT4vyAVDK1vV2TgimGoGlsXWqRG8tX4G8eYC YXG2hyhuDPRQbsjSG0W9FaHs4f3D07Puk0UgAJ/NEDqdRYMVToYuDCXqSjqQr8pzgwAM RKSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=9mP9HJdXVQAxtsXYpKC+mSQmcqbaHq7yO4Fo8xLEceU=; b=v/mizMcnUzBCN7cBvQ5MNoZA7tppYojfwqBnR4fgE6ioraNVj59QSi7rQQGjQwZgaW a/cG+lBhv1YeY6JNLag1GheFJ8P/nkm7HMJoPEErEmGm7S2nFy3AG1tVxlBPkWkvjRwO iaE08HM9B2zdquXzXuVpcOC4YgCim4gtD8zAkk4L3bjTpXQT6gJjAqVXiZwZI96x5T9O BdFiNSeU+kuG61Vs5RyNiN8AShJIjNBi7T8dvS+LUJPjH7ohUeHOUhnZ7ea/tayV+xe9 6/7Qa5t+BQP0MkAbXDi07kaGwdy32uu5t65YYi+z4xepyvK5IQzBlxIR6+Za3wJpiQmd te7g== X-Gm-Message-State: ACrzQf0yW0R0Gp3sqj7WVKUfg1qNqvNZv0bqj/agWL3lNqqwst1WMalN sbVnzCHWnX3/IO2wFrWnnUbz X-Google-Smtp-Source: AMsMyM40w4UYyHvFh7evE7z1F+eiJYVMfWYqChW7KmQX97jRbMwd47LDyQUEe+xCqqea0RKZyIe2Mw== X-Received: by 2002:a17:90b:306:b0:202:b9a4:b0aa with SMTP id ay6-20020a17090b030600b00202b9a4b0aamr3467801pjb.78.1663142108381; Wed, 14 Sep 2022 00:55:08 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.55.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:55:07 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH v4 11/12] dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC Date: Wed, 14 Sep 2022 13:23:49 +0530 Message-Id: <20220914075350.7992-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add devicetree bindings support for SM8450 SoC. Only the clocks are different on this platform, rest is same as SDX55. Reviewed-by: Rob Herring Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 39 +++++++++++++++++-- 1 file changed, 36 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Docu= mentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index bb8e982e69be..977c976ea799 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -11,7 +11,9 @@ maintainers: =20 properties: compatible: - const: qcom,sdx55-pcie-ep + enum: + - qcom,sdx55-pcie-ep + - qcom,sm8450-pcie-ep =20 reg: items: @@ -32,10 +34,12 @@ properties: - const: mmio =20 clocks: - maxItems: 7 + minItems: 7 + maxItems: 8 =20 clock-names: - maxItems: 7 + minItems: 7 + maxItems: 8 =20 qcom,perst-regs: description: Reference to a syscon representing TCSR followed by the t= wo @@ -124,6 +128,35 @@ allOf: - const: sleep - const: ref =20 + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8450-pcie-ep + then: + properties: + clocks: + items: + - description: PCIe Auxiliary clock + - description: PCIe CFG AHB clock + - description: PCIe Master AXI clock + - description: PCIe Slave AXI clock + - description: PCIe Slave Q2A AXI clock + - description: PCIe Reference clock + - description: PCIe DDRSS SF TBU clock + - description: PCIe AGGRE NOC AXI clock + clock-names: + items: + - const: aux + - const: cfg + - const: bus_master + - const: bus_slave + - const: slave_q2a + - const: ref + - const: ddrss_sf_tbu + - const: aggre_noc_axi + unevaluatedProperties: false =20 examples: --=20 2.25.1 From nobody Fri Apr 3 08:19:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF918ECAAD3 for ; Wed, 14 Sep 2022 07:56:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229604AbiINH4l (ORCPT ); Wed, 14 Sep 2022 03:56:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230310AbiINH4B (ORCPT ); Wed, 14 Sep 2022 03:56:01 -0400 Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3ECD373338 for ; Wed, 14 Sep 2022 00:55:15 -0700 (PDT) Received: by mail-pl1-x62b.google.com with SMTP id d12so14309803plr.6 for ; Wed, 14 Sep 2022 00:55:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=hFaMhiJ2smTY3tKW4XMPUKWJJb1/OofcwoKHsMVmwSo=; b=SI9/Uz3M6YTJuRrSklbDpYpOxcVa9EPeijj7hjfrjhgN7PSc0SyAhg2b2p9nJCKCKZ DYKQTfC+3xzr5UiTb+m0HrZGWNNosaCAXUZflJpipOHhyJbdBP5uI1Y0YAMho4yudN2z okoywYcyQr5939F1C5W8fSNXGDdYGnUjiEa0fk2MTbtseIBDKBWRjWrz6PzcXLtKkgsB AEgrR6y0T/6CM3yapiECs5coK3HQcCxUvwSkXuAqJTKABXm5ZKDFw9gX9ZVg7FVeb0CU 12lioqIJlSzkmWcHFeKOyTTP8u9jrTZXP3BwQVnrYB+uE2ppyUS8t4C9HuROZxNcJobI w26g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=hFaMhiJ2smTY3tKW4XMPUKWJJb1/OofcwoKHsMVmwSo=; b=LjSy+o8gCQI1eLGovFXHXisPrU28HqsGdDMeuYF/L1Gnuf9GB9wCreuwz7wzxgwnO6 O7QAG1ctDcPuFdodo7P/A+uPh0ih5uacOORDhLtjaJ0z5medpslEhvOankxdfZBWLlIv yNcXevw0uvL4/akebZtmcvcw4nQq5zfWt49vHjg8PAPlpQBmYnanH+OOoyorFuGjZFBC gIR9bexy+WFoixRLkeCHAfw4q8pUb+g9iUcq3teqfHExlmuoPAyLt6P1GecjmW/OFr0P 8ir3niff7NTZcQwmcJDxIOZa8ML9Zvs22HYp7m18WVQ7bkGFilQWQJxhitR/kWUD0UzK LENQ== X-Gm-Message-State: ACrzQf25ZgNiDpU2WPFA+cC8GT2icNLtVXefK5/6wt+cSfmf8SZP7+vd CHvsBmXqjzF1oCSvyD0ZjdbJ4pzgokMi25k= X-Google-Smtp-Source: AMsMyM6c2IDayNxwlIUQZQjw88mwOxFAIh5cGe60tsv+xKZ08buMF1QIjqLM4JKeB9FRPixp7FXtmw== X-Received: by 2002:a17:90b:1b50:b0:202:f495:6b43 with SMTP id nv16-20020a17090b1b5000b00202f4956b43mr3447648pjb.85.1663142114331; Wed, 14 Sep 2022 00:55:14 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.122]) by smtp.gmail.com with ESMTPSA id p8-20020a1709027ec800b00174ea015ee2sm10119054plb.38.2022.09.14.00.55.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 00:55:13 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH v4 12/12] PCI: qcom-ep: Add support for SM8450 SoC Date: Wed, 14 Sep 2022 13:23:50 +0530 Message-Id: <20220914075350.7992-13-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> References: <20220914075350.7992-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for SM8450 SoC to the Qualcomm PCIe Endpoint Controller driver. The driver uses the same config as of the existing SDX55 chipset. So additional settings are not required. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 92140a09aac5..16bb8f166c3b 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -789,6 +789,7 @@ static int qcom_pcie_ep_remove(struct platform_device *= pdev) =20 static const struct of_device_id qcom_pcie_ep_match[] =3D { { .compatible =3D "qcom,sdx55-pcie-ep", }, + { .compatible =3D "qcom,sm8450-pcie-ep", }, { } }; =20 --=20 2.25.1