From nobody Mon Apr 6 18:07:36 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 031F1C433FE for ; Tue, 4 Oct 2022 19:12:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229674AbiJDTMw (ORCPT ); Tue, 4 Oct 2022 15:12:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229611AbiJDTMs (ORCPT ); Tue, 4 Oct 2022 15:12:48 -0400 Received: from mail-oi1-f175.google.com (mail-oi1-f175.google.com [209.85.167.175]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 263253FED1; Tue, 4 Oct 2022 12:12:47 -0700 (PDT) Received: by mail-oi1-f175.google.com with SMTP id l5so15368760oif.7; Tue, 04 Oct 2022 12:12:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date; bh=plxfpmdSiYxEjBBgPR80VDYlPmqh5dHuVln8TbghOIQ=; b=V4LD7g1/i6O48LQWJvC0tSbzpN+imOOntbyKlTMGvJjK9WIz6R6oRpkHq/Wim3l71H +sFNWiH7OEHnuCJZsEMRxTgYLedJoyeciLfB+w5b11KL1yaJCSN5vdgVBnKppw2mAEy4 k0bx6taQ5vIQCTLA9RdqnlxO3pZ3ZJy138qAqr4Y4bzzUzGW0+Vv+v7M5V+YcMZ8PhLl 689Ok1JmGi7bG8JvN1FWBeiKlk6sWZbv1GAthPsbfykMLWMkYnDd7wx1oDoh+jA1A5cv 3lzAZDfIiDNtcFzNbbOQGJJmhnQC8lBOxroQRqVh27ERg+SDogOJm1tmUcW6c6qvo81q tliw== X-Gm-Message-State: ACrzQf2s/Nk5LS6x3ycpTXs+ukrTiqXwLpPiK+qVpnY+poBgM3raTl6Y 1YaKPmo9LoXn2NZhyBMue3gICO3+1Q== X-Google-Smtp-Source: AMsMyM5Gm2KDYxEsmkv3cYXbxUUdMnL9o89RElJvpEUiYC7cx3/R+5tG95/a41nSO0M+EA5VzRUuiA== X-Received: by 2002:a05:6808:130d:b0:351:8aa4:fd8 with SMTP id y13-20020a056808130d00b003518aa40fd8mr579597oiv.74.1664910766132; Tue, 04 Oct 2022 12:12:46 -0700 (PDT) Received: from [127.0.1.1] (66-90-144-107.dyn.grandenetworks.net. [66.90.144.107]) by smtp.googlemail.com with ESMTPSA id q206-20020acaf2d7000000b003507c386a4asm3296336oih.40.2022.10.04.12.12.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Oct 2022 12:12:42 -0700 (PDT) From: Rob Herring Date: Tue, 04 Oct 2022 14:12:35 -0500 Subject: [PATCH v4 1/3] perf: Skip and warn on unknown format 'configN' attrs MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20220914-arm-perf-tool-spe1-2-v2-v4-1-83c098e6212e@kernel.org> References: <20220914-arm-perf-tool-spe1-2-v2-v4-0-83c098e6212e@kernel.org> In-Reply-To: <20220914-arm-perf-tool-spe1-2-v2-v4-0-83c098e6212e@kernel.org> To: Peter Zijlstra , Ingo Molnar , Mark Rutland , Namhyung Kim , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Leo Yan , James Clark , Namhyung Kim X-Mailer: b4 0.11.0-dev Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If the kernel exposes a new perf_event_attr field in a format attr, perf will return an error stating the specified PMU can't be found. For example, a format attr with 'config3:0-63' causes an error as config3 is unknown to perf. This causes a compatibility issue between a newer kernel with older perf tool. Before this change with a kernel adding 'config3' I get: $ perf record -e arm_spe// -- true event syntax error: 'arm_spe//' \___ Cannot find PMU `arm_spe'. Missing kernel support? Run 'perf list' for a list of valid events Usage: perf record [] [] or: perf record [] -- [] -e, --event event selector. use 'perf list' to list available events After this change, I get: $ perf record -e arm_spe// -- true WARNING: 'arm_spe_0' format 'inv_event_filter' requires 'perf_event_attr::c= onfig3' which is not supported by this version of perf! [ perf record: Woken up 2 times to write data ] [ perf record: Captured and wrote 0.091 MB perf.data ] To support unknown configN formats, rework the YACC implementation to pass any config[0-9]+ format to perf_pmu__new_format() to handle with a warning. Cc: stable@vger.kernel.org Tested-by: Leo Yan Reviewed-by: Namhyung Kim Signed-off-by: Rob Herring --- v4: - Skip format list check for fake pmu v3: - https://lore.kernel.org/r/20220914-arm-perf-tool-spe1-2-v2-v3-0-8189fc04= dcc6@kernel.org - Move warning from format scanning to when PMU is selected - Add and use PERF_PMU_FORMAT_VALUE_CONFIG_END v2: - https://lore.kernel.org/all/20220909204509.2169512-1-robh@kernel.org/ - Rework YACC code to handle configN formats in C code - Add a warning when an unknown configN attr is found v1: - https://lore.kernel.org/all/20220901184709.2179309-1-robh@kernel.org/ --- tools/perf/util/parse-events.c | 3 +++ tools/perf/util/pmu.c | 17 +++++++++++++++++ tools/perf/util/pmu.h | 2 ++ tools/perf/util/pmu.l | 2 -- tools/perf/util/pmu.y | 15 ++++----------- 5 files changed, 26 insertions(+), 13 deletions(-) diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c index f05e15acd33f..e2305fca0f95 100644 --- a/tools/perf/util/parse-events.c +++ b/tools/perf/util/parse-events.c @@ -215,6 +215,9 @@ __add_event(struct list_head *list, int *idx, struct perf_cpu_map *cpus =3D pmu ? perf_cpu_map__get(pmu->cpus) : cpu_list ? perf_cpu_map__new(cpu_list) : NULL; =20 + if (pmu) + perf_pmu__warn_invalid_formats(pmu); + if (pmu && attr->type =3D=3D PERF_TYPE_RAW) perf_pmu__warn_invalid_config(pmu, attr->config, name); =20 diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 89655d53117a..82455b073c2f 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -1005,6 +1005,23 @@ static struct perf_pmu *pmu_lookup(const char *looku= p_name) return NULL; } =20 +void perf_pmu__warn_invalid_formats(struct perf_pmu *pmu) +{ + struct perf_pmu_format *format; + + /* fake pmu doesn't have format list */ + if (pmu =3D=3D &perf_pmu__fake) + return; + + list_for_each_entry(format, &pmu->format, list) + if (format->value >=3D PERF_PMU_FORMAT_VALUE_CONFIG_END) { + pr_warning("WARNING: '%s' format '%s' requires 'perf_event_attr::config= %d'" + "which is not supported by this version of perf!\n", + pmu->name, format->name, format->value); + return; + } +} + static struct perf_pmu *pmu_find(const char *name) { struct perf_pmu *pmu; diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h index a7b0f9507510..68e15c38ae71 100644 --- a/tools/perf/util/pmu.h +++ b/tools/perf/util/pmu.h @@ -17,6 +17,7 @@ enum { PERF_PMU_FORMAT_VALUE_CONFIG, PERF_PMU_FORMAT_VALUE_CONFIG1, PERF_PMU_FORMAT_VALUE_CONFIG2, + PERF_PMU_FORMAT_VALUE_CONFIG_END, }; =20 #define PERF_PMU_FORMAT_BITS 64 @@ -139,6 +140,7 @@ int perf_pmu__caps_parse(struct perf_pmu *pmu); =20 void perf_pmu__warn_invalid_config(struct perf_pmu *pmu, __u64 config, const char *name); +void perf_pmu__warn_invalid_formats(struct perf_pmu *pmu); =20 bool perf_pmu__has_hybrid(void); int perf_pmu__match(char *pattern, char *name, char *tok); diff --git a/tools/perf/util/pmu.l b/tools/perf/util/pmu.l index a15d9fbd7c0e..58b4926cfaca 100644 --- a/tools/perf/util/pmu.l +++ b/tools/perf/util/pmu.l @@ -27,8 +27,6 @@ num_dec [0-9]+ =20 {num_dec} { return value(10); } config { return PP_CONFIG; } -config1 { return PP_CONFIG1; } -config2 { return PP_CONFIG2; } - { return '-'; } : { return ':'; } , { return ','; } diff --git a/tools/perf/util/pmu.y b/tools/perf/util/pmu.y index bfd7e8509869..283efe059819 100644 --- a/tools/perf/util/pmu.y +++ b/tools/perf/util/pmu.y @@ -20,7 +20,7 @@ do { \ =20 %} =20 -%token PP_CONFIG PP_CONFIG1 PP_CONFIG2 +%token PP_CONFIG %token PP_VALUE PP_ERROR %type PP_VALUE %type bit_term @@ -47,18 +47,11 @@ PP_CONFIG ':' bits $3)); } | -PP_CONFIG1 ':' bits +PP_CONFIG PP_VALUE ':' bits { ABORT_ON(perf_pmu__new_format(format, name, - PERF_PMU_FORMAT_VALUE_CONFIG1, - $3)); -} -| -PP_CONFIG2 ':' bits -{ - ABORT_ON(perf_pmu__new_format(format, name, - PERF_PMU_FORMAT_VALUE_CONFIG2, - $3)); + $2, + $4)); } =20 bits: --=20 b4 0.11.0-dev From nobody Mon Apr 6 18:07:36 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C342C433FE for ; Tue, 4 Oct 2022 19:13:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229634AbiJDTM7 (ORCPT ); Tue, 4 Oct 2022 15:12:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229668AbiJDTMv (ORCPT ); Tue, 4 Oct 2022 15:12:51 -0400 Received: from mail-oi1-f175.google.com (mail-oi1-f175.google.com [209.85.167.175]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0BE1B422C2; Tue, 4 Oct 2022 12:12:49 -0700 (PDT) Received: by mail-oi1-f175.google.com with SMTP id l5so15368931oif.7; Tue, 04 Oct 2022 12:12:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date; bh=x+TTQCiThW+1E+H+GkWYh6ipAJfPaAuRkbI13+Mwec8=; b=sL5cHlwYZvyHX6ti34hT/wdey14+emon0VKhpAb23K+keZxDs9GBiGTshzktcA82Wq zrUrukgveTYg6dT++5gDDQnqkaj7N9Hwsetz65U/kU9I0tEKYV7VtTeVV5XPx3FmBN5z OE8tnnwKi5i7hdEsSQYP7UU1U1dCFmpuW335H70ctLDqmwmG73be8xGPS8rDRX5vkQbc r9XfTgqdaBaUsRgQrpzy4fQBwQiKsO3LC5eZfVgb7L+rHv37aFBHOrvMq76j2U/75mJx vsVm4w5FZqrC/+UAcoAF8MyFIXx54elbPNkDpfWLRdAQP6wFMVR5THNH2zHydhwm+tQR q+eQ== X-Gm-Message-State: ACrzQf2ijuRzjI8VgN5O/sQlFBkgEWoCCL7S/n/5EH1S/OLMnkHs6hzf nY1afi3/jT8HSSN1anJnCFyFV+vOPw== X-Google-Smtp-Source: AMsMyM68jZWWdGp4e8zQud7mrQeshhU/Ubr1tRoCvep/UZmxFLyFgAniMBlpwP4yK1b63wgNRd0pyA== X-Received: by 2002:a05:6808:1892:b0:350:7c49:649f with SMTP id bi18-20020a056808189200b003507c49649fmr567352oib.219.1664910769342; Tue, 04 Oct 2022 12:12:49 -0700 (PDT) Received: from [127.0.1.1] (66-90-144-107.dyn.grandenetworks.net. [66.90.144.107]) by smtp.googlemail.com with ESMTPSA id q206-20020acaf2d7000000b003507c386a4asm3296336oih.40.2022.10.04.12.12.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Oct 2022 12:12:46 -0700 (PDT) From: Rob Herring Date: Tue, 04 Oct 2022 14:12:36 -0500 Subject: [PATCH v4 2/3] perf tools: Sync perf_event_attr::config3 addition MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20220914-arm-perf-tool-spe1-2-v2-v4-2-83c098e6212e@kernel.org> References: <20220914-arm-perf-tool-spe1-2-v2-v4-0-83c098e6212e@kernel.org> In-Reply-To: <20220914-arm-perf-tool-spe1-2-v2-v4-0-83c098e6212e@kernel.org> To: Peter Zijlstra , Ingo Molnar , Mark Rutland , Namhyung Kim , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Leo Yan , James Clark , Namhyung Kim X-Mailer: b4 0.11.0-dev Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Arm SPEv1.2 adds another 64-bits of event filtering control. As the existing perf_event_attr::configN fields are all used up for SPE PMU, an additional field is needed. Add a new 'config3' field. Signed-off-by: Rob Herring --- This patch is dependent on the kernel side landing first. --- include/uapi/linux/perf_event.h | 3 +++ tools/include/uapi/linux/perf_event.h | 3 +++ 2 files changed, 6 insertions(+) diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_even= t.h index 03b370062741..b53f9b958235 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -333,6 +333,7 @@ enum perf_event_read_format { #define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */ #define PERF_ATTR_SIZE_VER6 120 /* add: aux_sample_size */ #define PERF_ATTR_SIZE_VER7 128 /* add: sig_data */ +#define PERF_ATTR_SIZE_VER8 136 /* add: config3 */ =20 /* * Hardware event_id to monitor via a performance monitoring event: @@ -474,6 +475,8 @@ struct perf_event_attr { * truncated accordingly on 32 bit architectures. */ __u64 sig_data; + + __u64 config3; /* extension of config2 */ }; =20 /* diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/lin= ux/perf_event.h index 581ed4bdc062..7fad17853310 100644 --- a/tools/include/uapi/linux/perf_event.h +++ b/tools/include/uapi/linux/perf_event.h @@ -333,6 +333,7 @@ enum perf_event_read_format { #define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */ #define PERF_ATTR_SIZE_VER6 120 /* add: aux_sample_size */ #define PERF_ATTR_SIZE_VER7 128 /* add: sig_data */ +#define PERF_ATTR_SIZE_VER8 136 /* add: config3 */ =20 /* * Hardware event_id to monitor via a performance monitoring event: @@ -474,6 +475,8 @@ struct perf_event_attr { * truncated accordingly on 32 bit architectures. */ __u64 sig_data; + + __u64 config3; /* extension of config2 */ }; =20 /* --=20 b4 0.11.0-dev From nobody Mon Apr 6 18:07:36 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B390C433FE for ; Tue, 4 Oct 2022 19:13:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229676AbiJDTND (ORCPT ); Tue, 4 Oct 2022 15:13:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229680AbiJDTMz (ORCPT ); Tue, 4 Oct 2022 15:12:55 -0400 Received: from mail-oi1-f182.google.com (mail-oi1-f182.google.com [209.85.167.182]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 285DA58080; Tue, 4 Oct 2022 12:12:53 -0700 (PDT) Received: by mail-oi1-f182.google.com with SMTP id d64so15382719oia.9; Tue, 04 Oct 2022 12:12:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date; bh=Npf77P9lkPbujhnSXyowlipi0F47IbjBYbqXJzE7RUQ=; b=6xCHpEJ4z+soHR+dGdw3BdCwel5hDHqymC7GXN/FgAV3NFW4XoOa6CtuaizS9xrLWV 0cL3NQGPos+x5S3QU1gtGK7AJLKfNkd1+b2TBTT3kj+Mjra5e7ubhgzgmnG/sOl/MIoB 0DsLAGV/OJCtk0aHHtGJDrWIYsj1r28m4fzWT0D9QywQ9ci2z0NH+zVhXELDevjjYrZq kPQ3w/4wY/Ki4ITUAdhBWvv3vPzfBxZoiQznX134Ow1U+zg31v20mAM5d01momzMnZCO M/X/fxh+LmlWku25JlpU87sq3b4gUzH/T/8uqlU9KEM2Un1twE4fjuLKiQh2wBVxbgow TwYg== X-Gm-Message-State: ACrzQf0aBDyBsgfQxhRxLYHDGBiv4WwxARz7OKT0ClExnqI0slzyGP6g lYLekRoT4GidySYALM5396alql+EGg== X-Google-Smtp-Source: AMsMyM7rN0SoiUtw1ElL6i7bUkA6SdJHtezc7Ayg6eZjpEZobCoiR0qlZtdCN+nz2HfcK9e5ceqN0g== X-Received: by 2002:a05:6808:1588:b0:34f:ba9c:7931 with SMTP id t8-20020a056808158800b0034fba9c7931mr562381oiw.137.1664910772406; Tue, 04 Oct 2022 12:12:52 -0700 (PDT) Received: from [127.0.1.1] (66-90-144-107.dyn.grandenetworks.net. [66.90.144.107]) by smtp.googlemail.com with ESMTPSA id q206-20020acaf2d7000000b003507c386a4asm3296336oih.40.2022.10.04.12.12.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Oct 2022 12:12:50 -0700 (PDT) From: Rob Herring Date: Tue, 04 Oct 2022 14:12:37 -0500 Subject: [PATCH v4 3/3] perf: Add support for perf_event_attr::config3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20220914-arm-perf-tool-spe1-2-v2-v4-3-83c098e6212e@kernel.org> References: <20220914-arm-perf-tool-spe1-2-v2-v4-0-83c098e6212e@kernel.org> In-Reply-To: <20220914-arm-perf-tool-spe1-2-v2-v4-0-83c098e6212e@kernel.org> To: Peter Zijlstra , Ingo Molnar , Mark Rutland , Namhyung Kim , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Leo Yan , James Clark , Namhyung Kim X-Mailer: b4 0.11.0-dev Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org perf_event_attr has gained a new field, config3, so add support for it extending the existing configN support. Signed-off-by: Rob Herring --- This patch is dependent on the kernel side landing first. v4: - Add config3 to event parsing tests --- tools/perf/tests/parse-events.c | 13 ++++++++++++- tools/perf/util/parse-events.c | 6 ++++++ tools/perf/util/parse-events.h | 1 + tools/perf/util/parse-events.l | 1 + tools/perf/util/pmu.c | 3 +++ tools/perf/util/pmu.h | 1 + 6 files changed, 24 insertions(+), 1 deletion(-) diff --git a/tools/perf/tests/parse-events.c b/tools/perf/tests/parse-event= s.c index 459afdb256a1..ddd5bdfe5723 100644 --- a/tools/perf/tests/parse-events.c +++ b/tools/perf/tests/parse-events.c @@ -444,6 +444,7 @@ static int test__checkevent_pmu(struct evlist *evlist) TEST_ASSERT_VAL("wrong config", 10 =3D=3D evsel->core.attr.config); TEST_ASSERT_VAL("wrong config1", 1 =3D=3D evsel->core.attr.config1); TEST_ASSERT_VAL("wrong config2", 3 =3D=3D evsel->core.attr.config2); + TEST_ASSERT_VAL("wrong config3", 0 =3D=3D evsel->core.attr.config3); /* * The period value gets configured within evlist__config, * while this test executes only parse events method. @@ -464,6 +465,7 @@ static int test__checkevent_list(struct evlist *evlist) TEST_ASSERT_VAL("wrong config", 1 =3D=3D evsel->core.attr.config); TEST_ASSERT_VAL("wrong config1", 0 =3D=3D evsel->core.attr.config1); TEST_ASSERT_VAL("wrong config2", 0 =3D=3D evsel->core.attr.config2); + TEST_ASSERT_VAL("wrong config3", 0 =3D=3D evsel->core.attr.config3); TEST_ASSERT_VAL("wrong exclude_user", !evsel->core.attr.exclude_user); TEST_ASSERT_VAL("wrong exclude_kernel", !evsel->core.attr.exclude_kernel); TEST_ASSERT_VAL("wrong exclude_hv", !evsel->core.attr.exclude_hv); @@ -625,6 +627,15 @@ static int test__checkterms_simple(struct list_head *t= erms) TEST_ASSERT_VAL("wrong val", term->val.num =3D=3D 3); TEST_ASSERT_VAL("wrong config", !strcmp(term->config, "config2")); =20 + /* config3=3D4 */ + term =3D list_entry(term->list.next, struct parse_events_term, list); + TEST_ASSERT_VAL("wrong type term", + term->type_term =3D=3D PARSE_EVENTS__TERM_TYPE_CONFIG3); + TEST_ASSERT_VAL("wrong type val", + term->type_val =3D=3D PARSE_EVENTS__TERM_TYPE_NUM); + TEST_ASSERT_VAL("wrong val", term->val.num =3D=3D 4); + TEST_ASSERT_VAL("wrong config", !strcmp(term->config, "config3")); + /* umask=3D1*/ term =3D list_entry(term->list.next, struct parse_events_term, list); TEST_ASSERT_VAL("wrong type term", @@ -1983,7 +1994,7 @@ struct terms_test { =20 static const struct terms_test test__terms[] =3D { [0] =3D { - .str =3D "config=3D10,config1,config2=3D3,umask=3D1,read,r0xead", + .str =3D "config=3D10,config1,config2=3D3,config3=3D4,umask=3D1,read,r= 0xead", .check =3D test__checkterms_simple, }, }; diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c index e2305fca0f95..c843434981d0 100644 --- a/tools/perf/util/parse-events.c +++ b/tools/perf/util/parse-events.c @@ -913,6 +913,7 @@ static const char *config_term_names[__PARSE_EVENTS__TE= RM_TYPE_NR] =3D { [PARSE_EVENTS__TERM_TYPE_CONFIG] =3D "config", [PARSE_EVENTS__TERM_TYPE_CONFIG1] =3D "config1", [PARSE_EVENTS__TERM_TYPE_CONFIG2] =3D "config2", + [PARSE_EVENTS__TERM_TYPE_CONFIG3] =3D "config3", [PARSE_EVENTS__TERM_TYPE_NAME] =3D "name", [PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD] =3D "period", [PARSE_EVENTS__TERM_TYPE_SAMPLE_FREQ] =3D "freq", @@ -952,6 +953,7 @@ config_term_avail(int term_type, struct parse_events_er= ror *err) case PARSE_EVENTS__TERM_TYPE_CONFIG: case PARSE_EVENTS__TERM_TYPE_CONFIG1: case PARSE_EVENTS__TERM_TYPE_CONFIG2: + case PARSE_EVENTS__TERM_TYPE_CONFIG3: case PARSE_EVENTS__TERM_TYPE_NAME: case PARSE_EVENTS__TERM_TYPE_METRIC_ID: case PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD: @@ -997,6 +999,10 @@ do { \ CHECK_TYPE_VAL(NUM); attr->config2 =3D term->val.num; break; + case PARSE_EVENTS__TERM_TYPE_CONFIG3: + CHECK_TYPE_VAL(NUM); + attr->config3 =3D term->val.num; + break; case PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD: CHECK_TYPE_VAL(NUM); break; diff --git a/tools/perf/util/parse-events.h b/tools/perf/util/parse-events.h index 7e6a601d9cd0..fa9460900abf 100644 --- a/tools/perf/util/parse-events.h +++ b/tools/perf/util/parse-events.h @@ -59,6 +59,7 @@ enum { PARSE_EVENTS__TERM_TYPE_CONFIG, PARSE_EVENTS__TERM_TYPE_CONFIG1, PARSE_EVENTS__TERM_TYPE_CONFIG2, + PARSE_EVENTS__TERM_TYPE_CONFIG3, PARSE_EVENTS__TERM_TYPE_NAME, PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD, PARSE_EVENTS__TERM_TYPE_SAMPLE_FREQ, diff --git a/tools/perf/util/parse-events.l b/tools/perf/util/parse-events.l index 3a9ce96c8bce..51fe0a9fb3de 100644 --- a/tools/perf/util/parse-events.l +++ b/tools/perf/util/parse-events.l @@ -285,6 +285,7 @@ modifier_bp [rwx]{1,3} config { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG); } config1 { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG1); } config2 { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG2); } +config3 { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG3); } name { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_NAME); } period { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD); } freq { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_SAMPLE_FREQ); } diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 82455b073c2f..9c0a4b9973a4 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -1278,6 +1278,9 @@ static int pmu_config_term(const char *pmu_name, case PERF_PMU_FORMAT_VALUE_CONFIG2: vp =3D &attr->config2; break; + case PERF_PMU_FORMAT_VALUE_CONFIG3: + vp =3D &attr->config3; + break; default: return -EINVAL; } diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h index 68e15c38ae71..2e6bd1bf304a 100644 --- a/tools/perf/util/pmu.h +++ b/tools/perf/util/pmu.h @@ -17,6 +17,7 @@ enum { PERF_PMU_FORMAT_VALUE_CONFIG, PERF_PMU_FORMAT_VALUE_CONFIG1, PERF_PMU_FORMAT_VALUE_CONFIG2, + PERF_PMU_FORMAT_VALUE_CONFIG3, PERF_PMU_FORMAT_VALUE_CONFIG_END, }; =20 --=20 b4 0.11.0-dev