From nobody Fri Dec 19 07:47:20 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7350BC54EE9 for ; Tue, 13 Sep 2022 14:30:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233861AbiIMOaC (ORCPT ); Tue, 13 Sep 2022 10:30:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233833AbiIMO2K (ORCPT ); Tue, 13 Sep 2022 10:28:10 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DAC563F2B; Tue, 13 Sep 2022 07:17:34 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 22833614B4; Tue, 13 Sep 2022 14:15:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3D553C433D6; Tue, 13 Sep 2022 14:15:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1663078554; bh=hKMAjFK4zx/IAfSMZtkx0sMQMfAwB+Yxy4VS+qaJ3uI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Is0X7tN4qqa32ashmQRHOfd6QcgyxG1gfyQ+cVXbJ7NKLpB9RXVlXnPJ1aOvHL4+s yPaPkbRFxxwOhuDhAGpjtoP01unOoUxyciO5CITfKGqShl9Bb9Epuve/OzHMjYkO7N 7mn2F8yPm5TNdMGbXDYhVSX1NBb6YQZCyPqLC4jM= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Urs Schroffenegger , Eugene Shalygin , Guenter Roeck , Sasha Levin Subject: [PATCH 5.19 185/192] hwmon: (asus-ec-sensors) add definitions for ROG ZENITH II EXTREME Date: Tue, 13 Sep 2022 16:04:51 +0200 Message-Id: <20220913140419.276069175@linuxfoundation.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220913140410.043243217@linuxfoundation.org> References: <20220913140410.043243217@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Urs Schroffenegger [ Upstream commit 9992b19d756ab8f0889fcaf3e71ff93852e74694 ] Add definitions for ROG ZENITH II EXTREME and some unknown yet temperature sensors in the second EC bank. Details are available at [1, 2]. [1] https://github.com/zeule/asus-ec-sensors/pull/26 [2] https://github.com/zeule/asus-ec-sensors/issues/16 Signed-off-by: Urs Schroffenegger Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20220710202639.1812058-2-eugene.shalygin@gm= ail.com Signed-off-by: Guenter Roeck Stable-dep-of: 88700d1396ba ("hwmon: (asus-ec-sensors) autoload module via = DMI data") Signed-off-by: Sasha Levin --- Documentation/hwmon/asus_ec_sensors.rst | 1 + drivers/hwmon/asus-ec-sensors.c | 47 +++++++++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/= asus_ec_sensors.rst index 1e40c123db777..02f4ad314a1eb 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -22,6 +22,7 @@ Supported boards: * ROG STRIX X570-F GAMING * ROG STRIX X570-I GAMING * ROG STRIX Z690-A GAMING WIFI D4 + * ROG ZENITH II EXTREME =20 Authors: - Eugene Shalygin diff --git a/drivers/hwmon/asus-ec-sensors.c b/drivers/hwmon/asus-ec-sensor= s.c index 0749cd023a323..61a4684fc020e 100644 --- a/drivers/hwmon/asus-ec-sensors.c +++ b/drivers/hwmon/asus-ec-sensors.c @@ -56,6 +56,8 @@ static char *mutex_path_override; =20 #define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX "\\RMTW.ASMX" =20 +#define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1= .MUT0" + #define MAX_IDENTICAL_BOARD_VARIATIONS 3 =20 /* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers= ) */ @@ -121,6 +123,18 @@ enum ec_sensors { ec_sensor_temp_water_in, /* "Water_Out" temperature sensor reading [=E2=84=83] */ ec_sensor_temp_water_out, + /* "Water_Block_In" temperature sensor reading [=E2=84=83] */ + ec_sensor_temp_water_block_in, + /* "Water_Block_Out" temperature sensor reading [=E2=84=83] */ + ec_sensor_temp_water_block_out, + /* "T_sensor_2" temperature sensor reading [=E2=84=83] */ + ec_sensor_temp_t_sensor_2, + /* "Extra_1" temperature sensor reading [=E2=84=83] */ + ec_sensor_temp_sensor_extra_1, + /* "Extra_2" temperature sensor reading [=E2=84=83] */ + ec_sensor_temp_sensor_extra_2, + /* "Extra_3" temperature sensor reading [=E2=84=83] */ + ec_sensor_temp_sensor_extra_3, }; =20 #define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset) @@ -136,6 +150,12 @@ enum ec_sensors { #define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu) #define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in) #define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out) +#define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in) +#define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out) +#define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2) +#define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1) +#define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2) +#define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3) =20 enum board_family { family_unknown, @@ -199,6 +219,18 @@ static const struct ec_sensor_info sensors_family_amd_= 500[] =3D { EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), [ec_sensor_temp_water_out] =3D EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), + [ec_sensor_temp_water_block_in] =3D + EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02), + [ec_sensor_temp_water_block_out] =3D + EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03), + [ec_sensor_temp_sensor_extra_1] =3D + EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09), + [ec_sensor_temp_t_sensor_2] =3D + EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a), + [ec_sensor_temp_sensor_extra_2] =3D + EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b), + [ec_sensor_temp_sensor_extra_3] =3D + EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c), }; =20 static const struct ec_sensor_info sensors_family_intel_300[] =3D { @@ -231,6 +263,9 @@ static const struct ec_sensor_info sensors_family_intel= _600[] =3D { #define SENSOR_SET_TEMP_CHIPSET_CPU_MB = \ (SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB) #define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OU= T) +#define SENSOR_SET_WATER_BLOCK = \ + (SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT) + =20 struct ec_board_info { const char *board_names[MAX_IDENTICAL_BOARD_VARIATIONS]; @@ -379,6 +414,18 @@ static const struct ec_board_info board_info[] =3D { .mutex_path =3D ASUS_HW_ACCESS_MUTEX_RMTW_ASMX, .family =3D family_intel_600_series, }, + { + .board_names =3D {"ROG ZENITH II EXTREME"}, + .sensors =3D SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR | + SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | + SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS | + SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE | + SENSOR_SET_WATER_BLOCK | + SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 | + SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3, + .mutex_path =3D ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0, + .family =3D family_amd_500_series, + }, {} }; =20 --=20 2.35.1