From nobody Mon Apr 6 00:32:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6098C6FA86 for ; Tue, 13 Sep 2022 04:26:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230377AbiIME0J (ORCPT ); Tue, 13 Sep 2022 00:26:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230251AbiIMEZi (ORCPT ); Tue, 13 Sep 2022 00:25:38 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3C1715808A; Mon, 12 Sep 2022 21:22:53 -0700 (PDT) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 13 Sep 2022 13:22:52 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id E20A720584CE; Tue, 13 Sep 2022 13:22:52 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 13 Sep 2022 13:22:52 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 41BA0B62AE; Tue, 13 Sep 2022 13:22:52 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v3 1/9] ARM: dts: uniphier: Rename pvtctl node to thermal-sensor Date: Tue, 13 Sep 2022 13:22:41 +0900 Message-Id: <20220913042249.4708-2-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> References: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The pvtctl node belongs to thermal-sensor, so the node name should be renamed to thermal-sensor. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniph= ier-pxs2.dtsi index 03301ddb3403..c6288c772a7d 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -564,7 +564,7 @@ sys_rst: reset { #reset-cells =3D <1>; }; =20 - pvtctl: pvtctl { + pvtctl: thermal-sensor { compatible =3D "socionext,uniphier-pxs2-thermal"; interrupts =3D <0 3 4>; #thermal-sensor-cells =3D <0>; --=20 2.25.1 From nobody Mon Apr 6 00:32:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C9B6C54EE9 for ; Tue, 13 Sep 2022 04:26:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230262AbiIME0V (ORCPT ); Tue, 13 Sep 2022 00:26:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51658 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229852AbiIMEZi (ORCPT ); Tue, 13 Sep 2022 00:25:38 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id AEB0058090; Mon, 12 Sep 2022 21:22:53 -0700 (PDT) Received: from unknown (HELO kinkan2-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 13 Sep 2022 13:22:53 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan2-ex.css.socionext.com (Postfix) with ESMTP id E223E2059027; Tue, 13 Sep 2022 13:22:52 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 13 Sep 2022 13:22:52 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 780C3B62A4; Tue, 13 Sep 2022 13:22:52 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v3 2/9] ARM: dts: uniphier: Rename usb-phy node for USB2 to usb-controller Date: Tue, 13 Sep 2022 13:22:42 +0900 Message-Id: <20220913042249.4708-3-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> References: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Actual phy nodes are each child node. The parent node should be usb-controller node as a representation of the phy integration. This applies to the devicetree for Pro4 SoC. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-pro4.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniph= ier-pro4.dtsi index a53b73ee93e9..6140eb42c42a 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -376,7 +376,7 @@ pinctrl: pinctrl { compatible =3D "socionext,uniphier-pro4-pinctrl"; }; =20 - usb-phy { + usb-controller { compatible =3D "socionext,uniphier-pro4-usb2-phy"; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.25.1 From nobody Mon Apr 6 00:32:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8163C6FA82 for ; Tue, 13 Sep 2022 04:26:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230411AbiIME0c (ORCPT ); Tue, 13 Sep 2022 00:26:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230280AbiIMEZl (ORCPT ); Tue, 13 Sep 2022 00:25:41 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1AA8158082; Mon, 12 Sep 2022 21:22:57 -0700 (PDT) Received: from unknown (HELO kinkan2-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 13 Sep 2022 13:22:53 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan2-ex.css.socionext.com (Postfix) with ESMTP id 1DE6D2059027; Tue, 13 Sep 2022 13:22:53 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 13 Sep 2022 13:22:53 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id AEF60B62AE; Tue, 13 Sep 2022 13:22:52 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v3 3/9] ARM: dts: uniphier: Rename usb-glue node for USB3 to usb-controller Date: Tue, 13 Sep 2022 13:22:43 +0900 Message-Id: <20220913042249.4708-4-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> References: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This "usb-glue" stands for an external controller associated with USB core, however, this is not common. So rename to "usb-controller". Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-pro4.dtsi | 4 ++-- arch/arm/boot/dts/uniphier-pro5.dtsi | 4 ++-- arch/arm/boot/dts/uniphier-pxs2.dtsi | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniph= ier-pro4.dtsi index 6140eb42c42a..2232c67134a0 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -518,7 +518,7 @@ usb0: usb@65a00000 { dr_mode =3D "host"; }; =20 - usb-glue@65b00000 { + usb-controller@65b00000 { compatible =3D "socionext,uniphier-pro4-dwc3-glue", "simple-mfd"; #address-cells =3D <1>; @@ -571,7 +571,7 @@ usb1: usb@65c00000 { dr_mode =3D "host"; }; =20 - usb-glue@65d00000 { + usb-controller@65d00000 { compatible =3D "socionext,uniphier-pro4-dwc3-glue", "simple-mfd"; #address-cells =3D <1>; diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniph= ier-pro5.dtsi index 3525125832dd..afc225f3b4b8 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -480,7 +480,7 @@ usb0: usb@65a00000 { dr_mode =3D "host"; }; =20 - usb-glue@65b00000 { + usb-controller@65b00000 { compatible =3D "socionext,uniphier-pro5-dwc3-glue", "simple-mfd"; #address-cells =3D <1>; @@ -544,7 +544,7 @@ usb1: usb@65c00000 { dr_mode =3D "host"; }; =20 - usb-glue@65d00000 { + usb-controller@65d00000 { compatible =3D "socionext,uniphier-pro5-dwc3-glue", "simple-mfd"; #address-cells =3D <1>; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniph= ier-pxs2.dtsi index c6288c772a7d..2602503e2275 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -609,7 +609,7 @@ usb0: usb@65a00000 { dr_mode =3D "host"; }; =20 - usb-glue@65b00000 { + usb-controller@65b00000 { compatible =3D "socionext,uniphier-pxs2-dwc3-glue", "simple-mfd"; #address-cells =3D <1>; @@ -704,7 +704,7 @@ usb1: usb@65c00000 { dr_mode =3D "host"; }; =20 - usb-glue@65d00000 { + usb-controller@65d00000 { compatible =3D "socionext,uniphier-pxs2-dwc3-glue", "simple-mfd"; #address-cells =3D <1>; --=20 2.25.1 From nobody Mon Apr 6 00:32:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E41EAC6FA82 for ; Tue, 13 Sep 2022 04:26:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230369AbiIME0Z (ORCPT ); Tue, 13 Sep 2022 00:26:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230257AbiIMEZj (ORCPT ); Tue, 13 Sep 2022 00:25:39 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id AF23958095; Mon, 12 Sep 2022 21:22:54 -0700 (PDT) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 13 Sep 2022 13:22:53 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id 1F49720584CE; Tue, 13 Sep 2022 13:22:53 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 13 Sep 2022 13:22:53 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id DD041B62A4; Tue, 13 Sep 2022 13:22:52 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v3 4/9] ARM: dts: uniphier: Rename gpio-hog node Date: Tue, 13 Sep 2022 13:22:44 +0900 Message-Id: <20220913042249.4708-5-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> References: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" According to gpio-hog schema, should add the suffix "-hog" to the node names including gpio-hog to fix the following warning. uniphier-pro4-ref.dtb: gpio@55000000: 'xirq2' does not match any of the r= egexes: '^.+-hog(-[0-9+)?$', 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/gpio/socionext,uniphie= r-gpio.yaml This applies to the devicetree for LD4, LD6b, Pro4 and sLD8 SoCs. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-ld4-ref.dts | 2 +- arch/arm/boot/dts/uniphier-ld6b-ref.dts | 2 +- arch/arm/boot/dts/uniphier-pro4-ref.dts | 2 +- arch/arm/boot/dts/uniphier-sld8-ref.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/uniphier-ld4-ref.dts b/arch/arm/boot/dts/uni= phier-ld4-ref.dts index c46c2e8a10a7..e2d25c9160bd 100644 --- a/arch/arm/boot/dts/uniphier-ld4-ref.dts +++ b/arch/arm/boot/dts/uniphier-ld4-ref.dts @@ -56,7 +56,7 @@ &serial3 { }; =20 &gpio { - xirq1 { + xirq1-hog { gpio-hog; gpios =3D ; input; diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/un= iphier-ld6b-ref.dts index 5bc7fe11b517..4f5e8848cecf 100644 --- a/arch/arm/boot/dts/uniphier-ld6b-ref.dts +++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts @@ -60,7 +60,7 @@ &serial2 { }; =20 &gpio { - xirq4 { + xirq4-hog { gpio-hog; gpios =3D ; input; diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/un= iphier-pro4-ref.dts index 3b9b61314d01..cc2cae935b5d 100644 --- a/arch/arm/boot/dts/uniphier-pro4-ref.dts +++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts @@ -59,7 +59,7 @@ &serial2 { }; =20 &gpio { - xirq2 { + xirq2-hog { gpio-hog; gpios =3D ; input; diff --git a/arch/arm/boot/dts/uniphier-sld8-ref.dts b/arch/arm/boot/dts/un= iphier-sld8-ref.dts index 6db949ec7411..b73647bafc63 100644 --- a/arch/arm/boot/dts/uniphier-sld8-ref.dts +++ b/arch/arm/boot/dts/uniphier-sld8-ref.dts @@ -56,7 +56,7 @@ &serial3 { }; =20 &gpio { - xirq0 { + xirq0-hog { gpio-hog; gpios =3D ; input; --=20 2.25.1 From nobody Mon Apr 6 00:32:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7DC8C6FA82 for ; Tue, 13 Sep 2022 04:26:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230424AbiIME0n (ORCPT ); Tue, 13 Sep 2022 00:26:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230050AbiIMEZn (ORCPT ); Tue, 13 Sep 2022 00:25:43 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1ABAA58098; Mon, 12 Sep 2022 21:22:57 -0700 (PDT) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 13 Sep 2022 13:22:53 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id 6BCB720584CE; Tue, 13 Sep 2022 13:22:53 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 13 Sep 2022 13:22:53 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 17345B62AE; Tue, 13 Sep 2022 13:22:53 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v3 5/9] ARM: dts: uniphier: Use GIC interrupt definitions Date: Tue, 13 Sep 2022 13:22:45 +0900 Message-Id: <20220913042249.4708-6-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> References: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Use human-readable definitions for GIC interrupt type and flag, instead of hard-coding the numbers. No functional change. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-ld4-ref.dts | 4 +- arch/arm/boot/dts/uniphier-ld4.dtsi | 49 +++++++++++-------- arch/arm/boot/dts/uniphier-ld6b-ref.dts | 4 +- arch/arm/boot/dts/uniphier-pro4-ref.dts | 4 +- arch/arm/boot/dts/uniphier-pro4.dtsi | 64 +++++++++++++++---------- arch/arm/boot/dts/uniphier-pro5.dtsi | 50 ++++++++++--------- arch/arm/boot/dts/uniphier-pxs2.dtsi | 56 ++++++++++++---------- arch/arm/boot/dts/uniphier-sld8-ref.dts | 4 +- arch/arm/boot/dts/uniphier-sld8.dtsi | 49 +++++++++++-------- 9 files changed, 163 insertions(+), 121 deletions(-) diff --git a/arch/arm/boot/dts/uniphier-ld4-ref.dts b/arch/arm/boot/dts/uni= phier-ld4-ref.dts index e2d25c9160bd..e007db084787 100644 --- a/arch/arm/boot/dts/uniphier-ld4-ref.dts +++ b/arch/arm/boot/dts/uniphier-ld4-ref.dts @@ -36,11 +36,11 @@ memory@80000000 { }; =20 ðsc { - interrupts =3D <1 8>; + interrupts =3D <1 IRQ_TYPE_LEVEL_LOW>; }; =20 &serialsc { - interrupts =3D <1 8>; + interrupts =3D <1 IRQ_TYPE_LEVEL_LOW>; }; =20 &serial0 { diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphi= er-ld4.dtsi index b52957ccda0d..9dceff12a633 100644 --- a/arch/arm/boot/dts/uniphier-ld4.dtsi +++ b/arch/arm/boot/dts/uniphier-ld4.dtsi @@ -6,6 +6,7 @@ // Author: Masahiro Yamada =20 #include +#include =20 / { compatible =3D "socionext,uniphier-ld4"; @@ -55,7 +56,8 @@ l2: cache-controller@500c0000 { compatible =3D "socionext,uniphier-system-cache"; reg =3D <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; - interrupts =3D <0 174 4>, <0 175 4>; + interrupts =3D , + ; cache-unified; cache-size =3D <(512 * 1024)>; cache-sets =3D <256>; @@ -69,7 +71,7 @@ spi: spi@54006000 { reg =3D <0x54006000 0x100>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 39 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_spi0>; clocks =3D <&peri_clk 11>; @@ -80,7 +82,7 @@ serial0: serial@54006800 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006800 0x40>; - interrupts =3D <0 33 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart0>; clocks =3D <&peri_clk 0>; @@ -91,7 +93,7 @@ serial1: serial@54006900 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006900 0x40>; - interrupts =3D <0 35 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart1>; clocks =3D <&peri_clk 1>; @@ -102,7 +104,7 @@ serial2: serial@54006a00 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006a00 0x40>; - interrupts =3D <0 37 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart2>; clocks =3D <&peri_clk 2>; @@ -113,7 +115,7 @@ serial3: serial@54006b00 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006b00 0x40>; - interrupts =3D <0 29 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart3>; clocks =3D <&peri_clk 3>; @@ -140,7 +142,7 @@ i2c0: i2c@58400000 { reg =3D <0x58400000 0x40>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 41 1>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c0>; clocks =3D <&peri_clk 4>; @@ -154,7 +156,7 @@ i2c1: i2c@58480000 { reg =3D <0x58480000 0x40>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 42 1>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c1>; clocks =3D <&peri_clk 5>; @@ -168,7 +170,7 @@ i2c2: i2c@58500000 { reg =3D <0x58500000 0x40>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 43 1>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c2>; clocks =3D <&peri_clk 6>; @@ -182,7 +184,7 @@ i2c3: i2c@58580000 { reg =3D <0x58580000 0x40>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 44 1>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c3>; clocks =3D <&peri_clk 7>; @@ -240,8 +242,13 @@ peri_rst: reset { dmac: dma-controller@5a000000 { compatible =3D "socionext,uniphier-mio-dmac"; reg =3D <0x5a000000 0x1000>; - interrupts =3D <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, - <0 71 4>, <0 72 4>, <0 73 4>; + interrupts =3D , + , + , + , + , + , + ; clocks =3D <&mio_clk 7>; resets =3D <&mio_rst 7>; #dma-cells =3D <1>; @@ -251,7 +258,7 @@ sd: mmc@5a400000 { compatible =3D "socionext,uniphier-sd-v2.91"; status =3D "disabled"; reg =3D <0x5a400000 0x200>; - interrupts =3D <0 76 4>; + interrupts =3D ; pinctrl-names =3D "default", "uhs"; pinctrl-0 =3D <&pinctrl_sd>; pinctrl-1 =3D <&pinctrl_sd_uhs>; @@ -271,7 +278,7 @@ emmc: mmc@5a500000 { compatible =3D "socionext,uniphier-sd-v2.91"; status =3D "disabled"; reg =3D <0x5a500000 0x200>; - interrupts =3D <0 78 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_emmc>; clocks =3D <&mio_clk 1>; @@ -289,7 +296,7 @@ usb0: usb@5a800100 { compatible =3D "socionext,uniphier-ehci", "generic-ehci"; status =3D "disabled"; reg =3D <0x5a800100 0x100>; - interrupts =3D <0 80 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb0>; clocks =3D <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, @@ -303,7 +310,7 @@ usb1: usb@5a810100 { compatible =3D "socionext,uniphier-ehci", "generic-ehci"; status =3D "disabled"; reg =3D <0x5a810100 0x100>; - interrupts =3D <0 81 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb1>; clocks =3D <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, @@ -317,7 +324,7 @@ usb2: usb@5a820100 { compatible =3D "socionext,uniphier-ehci", "generic-ehci"; status =3D "disabled"; reg =3D <0x5a820100 0x100>; - interrupts =3D <0 82 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb2>; clocks =3D <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, @@ -358,14 +365,16 @@ efuse@130 { timer@60000200 { compatible =3D "arm,cortex-a9-global-timer"; reg =3D <0x60000200 0x20>; - interrupts =3D <1 11 0x104>; + interrupts =3D ; clocks =3D <&arm_timer_clk>; }; =20 timer@60000600 { compatible =3D "arm,cortex-a9-twd-timer"; reg =3D <0x60000600 0x20>; - interrupts =3D <1 13 0x104>; + interrupts =3D ; clocks =3D <&arm_timer_clk>; }; =20 @@ -407,7 +416,7 @@ nand: nand-controller@68000000 { reg =3D <0x68000000 0x20>, <0x68100000 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 65 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_nand>; clock-names =3D "nand", "nand_x", "ecc"; diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/un= iphier-ld6b-ref.dts index 4f5e8848cecf..223a78b4a761 100644 --- a/arch/arm/boot/dts/uniphier-ld6b-ref.dts +++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts @@ -40,11 +40,11 @@ memory@80000000 { }; =20 ðsc { - interrupts =3D <4 8>; + interrupts =3D <4 IRQ_TYPE_LEVEL_LOW>; }; =20 &serialsc { - interrupts =3D <4 8>; + interrupts =3D <4 IRQ_TYPE_LEVEL_LOW>; }; =20 &serial0 { diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/un= iphier-pro4-ref.dts index cc2cae935b5d..48f7f23bab91 100644 --- a/arch/arm/boot/dts/uniphier-pro4-ref.dts +++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts @@ -39,11 +39,11 @@ memory@80000000 { }; =20 ðsc { - interrupts =3D <2 8>; + interrupts =3D <2 IRQ_TYPE_LEVEL_LOW>; }; =20 &serialsc { - interrupts =3D <2 8>; + interrupts =3D <2 IRQ_TYPE_LEVEL_LOW>; }; =20 &serial0 { diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniph= ier-pro4.dtsi index 2232c67134a0..8cb4e7043e60 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -6,6 +6,7 @@ // Author: Masahiro Yamada =20 #include +#include =20 / { compatible =3D "socionext,uniphier-pro4"; @@ -63,7 +64,8 @@ l2: cache-controller@500c0000 { compatible =3D "socionext,uniphier-system-cache"; reg =3D <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; - interrupts =3D <0 174 4>, <0 175 4>; + interrupts =3D , + ; cache-unified; cache-size =3D <(768 * 1024)>; cache-sets =3D <256>; @@ -77,7 +79,7 @@ spi0: spi@54006000 { reg =3D <0x54006000 0x100>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 39 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_spi0>; clocks =3D <&peri_clk 11>; @@ -88,7 +90,7 @@ serial0: serial@54006800 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006800 0x40>; - interrupts =3D <0 33 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart0>; clocks =3D <&peri_clk 0>; @@ -99,7 +101,7 @@ serial1: serial@54006900 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006900 0x40>; - interrupts =3D <0 35 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart1>; clocks =3D <&peri_clk 1>; @@ -110,7 +112,7 @@ serial2: serial@54006a00 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006a00 0x40>; - interrupts =3D <0 37 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart2>; clocks =3D <&peri_clk 2>; @@ -121,7 +123,7 @@ serial3: serial@54006b00 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006b00 0x40>; - interrupts =3D <0 177 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart3>; clocks =3D <&peri_clk 3>; @@ -148,7 +150,7 @@ i2c0: i2c@58780000 { reg =3D <0x58780000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 41 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c0>; clocks =3D <&peri_clk 4>; @@ -162,7 +164,7 @@ i2c1: i2c@58781000 { reg =3D <0x58781000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 42 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c1>; clocks =3D <&peri_clk 5>; @@ -176,7 +178,7 @@ i2c2: i2c@58782000 { reg =3D <0x58782000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 43 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c2>; clocks =3D <&peri_clk 6>; @@ -190,7 +192,7 @@ i2c3: i2c@58783000 { reg =3D <0x58783000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 44 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c3>; clocks =3D <&peri_clk 7>; @@ -206,7 +208,7 @@ i2c5: i2c@58785000 { reg =3D <0x58785000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 25 4>; + interrupts =3D ; clocks =3D <&peri_clk 9>; resets =3D <&peri_rst 9>; clock-frequency =3D <400000>; @@ -218,7 +220,7 @@ i2c6: i2c@58786000 { reg =3D <0x58786000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 26 4>; + interrupts =3D ; clocks =3D <&peri_clk 10>; resets =3D <&peri_rst 10>; clock-frequency =3D <400000>; @@ -274,8 +276,14 @@ peri_rst: reset { dmac: dma-controller@5a000000 { compatible =3D "socionext,uniphier-mio-dmac"; reg =3D <0x5a000000 0x1000>; - interrupts =3D <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, - <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; + interrupts =3D , + , + , + , + , + , + , + ; clocks =3D <&mio_clk 7>; resets =3D <&mio_rst 7>; #dma-cells =3D <1>; @@ -285,7 +293,7 @@ sd: mmc@5a400000 { compatible =3D "socionext,uniphier-sd-v2.91"; status =3D "disabled"; reg =3D <0x5a400000 0x200>; - interrupts =3D <0 76 4>; + interrupts =3D ; pinctrl-names =3D "default", "uhs"; pinctrl-0 =3D <&pinctrl_sd>; pinctrl-1 =3D <&pinctrl_sd_uhs>; @@ -305,7 +313,7 @@ emmc: mmc@5a500000 { compatible =3D "socionext,uniphier-sd-v2.91"; status =3D "disabled"; reg =3D <0x5a500000 0x200>; - interrupts =3D <0 78 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_emmc>; clocks =3D <&mio_clk 1>; @@ -323,7 +331,7 @@ sd1: mmc@5a600000 { compatible =3D "socionext,uniphier-sd-v2.91"; status =3D "disabled"; reg =3D <0x5a600000 0x200>; - interrupts =3D <0 85 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sd1>; clocks =3D <&mio_clk 2>; @@ -339,7 +347,7 @@ usb2: usb@5a800100 { compatible =3D "socionext,uniphier-ehci", "generic-ehci"; status =3D "disabled"; reg =3D <0x5a800100 0x100>; - interrupts =3D <0 80 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb2>; clocks =3D <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, @@ -355,7 +363,7 @@ usb3: usb@5a810100 { compatible =3D "socionext,uniphier-ehci", "generic-ehci"; status =3D "disabled"; reg =3D <0x5a810100 0x100>; - interrupts =3D <0 81 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb3>; clocks =3D <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, @@ -431,7 +439,7 @@ efuse@200 { xdmac: dma-controller@5fc10000 { compatible =3D "socionext,uniphier-xdmac"; reg =3D <0x5fc10000 0x5300>; - interrupts =3D <0 188 4>; + interrupts =3D ; dma-channels =3D <16>; #dma-cells =3D <2>; }; @@ -446,14 +454,16 @@ aidet: interrupt-controller@5fc20000 { timer@60000200 { compatible =3D "arm,cortex-a9-global-timer"; reg =3D <0x60000200 0x20>; - interrupts =3D <1 11 0x304>; + interrupts =3D ; clocks =3D <&arm_timer_clk>; }; =20 timer@60000600 { compatible =3D "arm,cortex-a9-twd-timer"; reg =3D <0x60000600 0x20>; - interrupts =3D <1 13 0x304>; + interrupts =3D ; clocks =3D <&arm_timer_clk>; }; =20 @@ -485,7 +495,7 @@ eth: ethernet@65000000 { compatible =3D "socionext,uniphier-pro4-ave4"; status =3D "disabled"; reg =3D <0x65000000 0x8500>; - interrupts =3D <0 66 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_ether_rgmii>; clock-names =3D "gio", "ether", "ether-gb", "ether-phy"; @@ -508,7 +518,8 @@ usb0: usb@65a00000 { status =3D "disabled"; reg =3D <0x65a00000 0xcd00>; interrupt-names =3D "host", "peripheral"; - interrupts =3D <0 134 4>, <0 135 4>; + interrupts =3D , + ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb0>; clock-names =3D "ref", "bus_early", "suspend"; @@ -561,7 +572,8 @@ usb1: usb@65c00000 { status =3D "disabled"; reg =3D <0x65c00000 0xcd00>; interrupt-names =3D "host", "peripheral"; - interrupts =3D <0 137 4>, <0 138 4>; + interrupts =3D , + ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb1>; clock-names =3D "ref", "bus_early", "suspend"; @@ -605,7 +617,7 @@ nand: nand-controller@68000000 { reg =3D <0x68000000 0x20>, <0x68100000 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 65 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_nand>; clock-names =3D "nand", "nand_x", "ecc"; diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniph= ier-pro5.dtsi index afc225f3b4b8..33221d7130f1 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -5,6 +5,8 @@ // Copyright (C) 2015-2016 Socionext Inc. // Author: Masahiro Yamada =20 +#include + / { compatible =3D "socionext,uniphier-pro5"; #address-cells =3D <1>; @@ -135,7 +137,8 @@ l2: cache-controller@500c0000 { compatible =3D "socionext,uniphier-system-cache"; reg =3D <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>; - interrupts =3D <0 190 4>, <0 191 4>; + interrupts =3D , + ; cache-unified; cache-size =3D <(2 * 1024 * 1024)>; cache-sets =3D <512>; @@ -148,7 +151,8 @@ l3: cache-controller@500c8000 { compatible =3D "socionext,uniphier-system-cache"; reg =3D <0x500c8000 0x2000>, <0x503c8100 0x8>, <0x506c8000 0x400>; - interrupts =3D <0 174 4>, <0 175 4>; + interrupts =3D , + ; cache-unified; cache-size =3D <(2 * 1024 * 1024)>; cache-sets =3D <512>; @@ -162,7 +166,7 @@ spi0: spi@54006000 { reg =3D <0x54006000 0x100>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 39 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_spi0>; clocks =3D <&peri_clk 11>; @@ -175,7 +179,7 @@ spi1: spi@54006100 { reg =3D <0x54006100 0x100>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 216 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_spi1>; clocks =3D <&peri_clk 11>; /* common with spi0 */ @@ -186,7 +190,7 @@ serial0: serial@54006800 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006800 0x40>; - interrupts =3D <0 33 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart0>; clocks =3D <&peri_clk 0>; @@ -197,7 +201,7 @@ serial1: serial@54006900 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006900 0x40>; - interrupts =3D <0 35 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart1>; clocks =3D <&peri_clk 1>; @@ -208,7 +212,7 @@ serial2: serial@54006a00 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006a00 0x40>; - interrupts =3D <0 37 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart2>; clocks =3D <&peri_clk 2>; @@ -219,7 +223,7 @@ serial3: serial@54006b00 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006b00 0x40>; - interrupts =3D <0 177 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart3>; clocks =3D <&peri_clk 3>; @@ -246,7 +250,7 @@ i2c0: i2c@58780000 { reg =3D <0x58780000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 41 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c0>; clocks =3D <&peri_clk 4>; @@ -260,7 +264,7 @@ i2c1: i2c@58781000 { reg =3D <0x58781000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 42 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c1>; clocks =3D <&peri_clk 5>; @@ -274,7 +278,7 @@ i2c2: i2c@58782000 { reg =3D <0x58782000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 43 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c2>; clocks =3D <&peri_clk 6>; @@ -288,7 +292,7 @@ i2c3: i2c@58783000 { reg =3D <0x58783000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 44 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c3>; clocks =3D <&peri_clk 7>; @@ -304,7 +308,7 @@ i2c5: i2c@58785000 { reg =3D <0x58785000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 25 4>; + interrupts =3D ; clocks =3D <&peri_clk 9>; resets =3D <&peri_rst 9>; clock-frequency =3D <400000>; @@ -316,7 +320,7 @@ i2c6: i2c@58786000 { reg =3D <0x58786000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 26 4>; + interrupts =3D ; clocks =3D <&peri_clk 10>; resets =3D <&peri_rst 10>; clock-frequency =3D <400000>; @@ -415,7 +419,7 @@ efuse@400 { xdmac: dma-controller@5fc10000 { compatible =3D "socionext,uniphier-xdmac"; reg =3D <0x5fc10000 0x5300>; - interrupts =3D <0 188 4>; + interrupts =3D ; dma-channels =3D <16>; #dma-cells =3D <2>; }; @@ -430,14 +434,16 @@ aidet: interrupt-controller@5fc20000 { timer@60000200 { compatible =3D "arm,cortex-a9-global-timer"; reg =3D <0x60000200 0x20>; - interrupts =3D <1 11 0x304>; + interrupts =3D ; clocks =3D <&arm_timer_clk>; }; =20 timer@60000600 { compatible =3D "arm,cortex-a9-twd-timer"; reg =3D <0x60000600 0x20>; - interrupts =3D <1 13 0x304>; + interrupts =3D ; clocks =3D <&arm_timer_clk>; }; =20 @@ -470,7 +476,7 @@ usb0: usb@65a00000 { status =3D "disabled"; reg =3D <0x65a00000 0xcd00>; interrupt-names =3D "host"; - interrupts =3D <0 134 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb0>; clock-names =3D "ref", "bus_early", "suspend"; @@ -534,7 +540,7 @@ usb1: usb@65c00000 { status =3D "disabled"; reg =3D <0x65c00000 0xcd00>; interrupt-names =3D "host"; - interrupts =3D <0 137 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb1>, <&pinctrl_usb2>; clock-names =3D "ref", "bus_early", "suspend"; @@ -650,7 +656,7 @@ nand: nand-controller@68000000 { reg =3D <0x68000000 0x20>, <0x68100000 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 65 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_nand>; clock-names =3D "nand", "nand_x", "ecc"; @@ -663,7 +669,7 @@ emmc: mmc@68400000 { compatible =3D "socionext,uniphier-sd-v3.1"; status =3D "disabled"; reg =3D <0x68400000 0x800>; - interrupts =3D <0 78 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_emmc>; clocks =3D <&sd_clk 1>; @@ -679,7 +685,7 @@ sd: mmc@68800000 { compatible =3D "socionext,uniphier-sd-v3.1"; status =3D "disabled"; reg =3D <0x68800000 0x800>; - interrupts =3D <0 76 4>; + interrupts =3D ; pinctrl-names =3D "default", "uhs"; pinctrl-0 =3D <&pinctrl_sd>; pinctrl-1 =3D <&pinctrl_sd_uhs>; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniph= ier-pxs2.dtsi index 2602503e2275..d2a2468d4ea0 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -6,6 +6,7 @@ // Author: Masahiro Yamada =20 #include +#include #include =20 / { @@ -161,7 +162,10 @@ l2: cache-controller@500c0000 { compatible =3D "socionext,uniphier-system-cache"; reg =3D <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>; - interrupts =3D <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>; + interrupts =3D , + , + , + ; cache-unified; cache-size =3D <(1280 * 1024)>; cache-sets =3D <512>; @@ -175,7 +179,7 @@ spi0: spi@54006000 { reg =3D <0x54006000 0x100>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 39 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_spi0>; clocks =3D <&peri_clk 11>; @@ -188,7 +192,7 @@ spi1: spi@54006100 { reg =3D <0x54006100 0x100>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 216 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_spi1>; clocks =3D <&peri_clk 12>; @@ -199,7 +203,7 @@ serial0: serial@54006800 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006800 0x40>; - interrupts =3D <0 33 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart0>; clocks =3D <&peri_clk 0>; @@ -210,7 +214,7 @@ serial1: serial@54006900 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006900 0x40>; - interrupts =3D <0 35 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart1>; clocks =3D <&peri_clk 1>; @@ -221,7 +225,7 @@ serial2: serial@54006a00 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006a00 0x40>; - interrupts =3D <0 37 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart2>; clocks =3D <&peri_clk 2>; @@ -232,7 +236,7 @@ serial3: serial@54006b00 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006b00 0x40>; - interrupts =3D <0 177 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart3>; clocks =3D <&peri_clk 3>; @@ -259,7 +263,7 @@ gpio: gpio@55000000 { audio@56000000 { compatible =3D "socionext,uniphier-pxs2-aio"; reg =3D <0x56000000 0x80000>; - interrupts =3D <0 144 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_ain1>, <&pinctrl_ain2>, @@ -317,7 +321,7 @@ i2c0: i2c@58780000 { reg =3D <0x58780000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 41 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c0>; clocks =3D <&peri_clk 4>; @@ -331,7 +335,7 @@ i2c1: i2c@58781000 { reg =3D <0x58781000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 42 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c1>; clocks =3D <&peri_clk 5>; @@ -345,7 +349,7 @@ i2c2: i2c@58782000 { reg =3D <0x58782000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 43 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c2>; clocks =3D <&peri_clk 6>; @@ -359,7 +363,7 @@ i2c3: i2c@58783000 { reg =3D <0x58783000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 44 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c3>; clocks =3D <&peri_clk 7>; @@ -373,7 +377,7 @@ i2c4: i2c@58784000 { reg =3D <0x58784000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 45 4>; + interrupts =3D ; clocks =3D <&peri_clk 8>; resets =3D <&peri_rst 8>; clock-frequency =3D <400000>; @@ -385,7 +389,7 @@ i2c5: i2c@58785000 { reg =3D <0x58785000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 25 4>; + interrupts =3D ; clocks =3D <&peri_clk 9>; resets =3D <&peri_rst 9>; clock-frequency =3D <400000>; @@ -397,7 +401,7 @@ i2c6: i2c@58786000 { reg =3D <0x58786000 0x80>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 26 4>; + interrupts =3D ; clocks =3D <&peri_clk 10>; resets =3D <&peri_rst 10>; clock-frequency =3D <400000>; @@ -454,7 +458,7 @@ emmc: mmc@5a000000 { compatible =3D "socionext,uniphier-sd-v3.1.1"; status =3D "disabled"; reg =3D <0x5a000000 0x800>; - interrupts =3D <0 78 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_emmc>; clocks =3D <&sd_clk 1>; @@ -470,7 +474,7 @@ sd: mmc@5a400000 { compatible =3D "socionext,uniphier-sd-v3.1.1"; status =3D "disabled"; reg =3D <0x5a400000 0x800>; - interrupts =3D <0 76 4>; + interrupts =3D ; pinctrl-names =3D "default", "uhs"; pinctrl-0 =3D <&pinctrl_sd>; pinctrl-1 =3D <&pinctrl_sd_uhs>; @@ -515,7 +519,7 @@ efuse@200 { xdmac: dma-controller@5fc10000 { compatible =3D "socionext,uniphier-xdmac"; reg =3D <0x5fc10000 0x5300>; - interrupts =3D <0 188 4>; + interrupts =3D ; dma-channels =3D <16>; #dma-cells =3D <2>; }; @@ -530,14 +534,16 @@ aidet: interrupt-controller@5fc20000 { timer@60000200 { compatible =3D "arm,cortex-a9-global-timer"; reg =3D <0x60000200 0x20>; - interrupts =3D <1 11 0xf04>; + interrupts =3D ; clocks =3D <&arm_timer_clk>; }; =20 timer@60000600 { compatible =3D "arm,cortex-a9-twd-timer"; reg =3D <0x60000600 0x20>; - interrupts =3D <1 13 0xf04>; + interrupts =3D ; clocks =3D <&arm_timer_clk>; }; =20 @@ -566,7 +572,7 @@ sys_rst: reset { =20 pvtctl: thermal-sensor { compatible =3D "socionext,uniphier-pxs2-thermal"; - interrupts =3D <0 3 4>; + interrupts =3D ; #thermal-sensor-cells =3D <0>; socionext,tmod-calibration =3D <0x0f86 0x6844>; }; @@ -576,7 +582,7 @@ eth: ethernet@65000000 { compatible =3D "socionext,uniphier-pxs2-ave4"; status =3D "disabled"; reg =3D <0x65000000 0x8500>; - interrupts =3D <0 66 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_ether_rgmii>; clock-names =3D "ether"; @@ -598,7 +604,7 @@ usb0: usb@65a00000 { status =3D "disabled"; reg =3D <0x65a00000 0xcd00>; interrupt-names =3D "dwc_usb3"; - interrupts =3D <0 134 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb0>, <&pinctrl_usb2>; clock-names =3D "ref", "bus_early", "suspend"; @@ -694,7 +700,7 @@ usb1: usb@65c00000 { status =3D "disabled"; reg =3D <0x65c00000 0xcd00>; interrupt-names =3D "dwc_usb3"; - interrupts =3D <0 137 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb1>, <&pinctrl_usb3>; clock-names =3D "ref", "bus_early", "suspend"; @@ -780,7 +786,7 @@ nand: nand-controller@68000000 { reg =3D <0x68000000 0x20>, <0x68100000 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 65 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_nand>; clock-names =3D "nand", "nand_x", "ecc"; diff --git a/arch/arm/boot/dts/uniphier-sld8-ref.dts b/arch/arm/boot/dts/un= iphier-sld8-ref.dts index b73647bafc63..2446f9e15360 100644 --- a/arch/arm/boot/dts/uniphier-sld8-ref.dts +++ b/arch/arm/boot/dts/uniphier-sld8-ref.dts @@ -36,11 +36,11 @@ memory@80000000 { }; =20 ðsc { - interrupts =3D <0 8>; + interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; }; =20 &serialsc { - interrupts =3D <0 8>; + interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; }; =20 &serial0 { diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniph= ier-sld8.dtsi index 96a766deb8d1..67b12dfe513b 100644 --- a/arch/arm/boot/dts/uniphier-sld8.dtsi +++ b/arch/arm/boot/dts/uniphier-sld8.dtsi @@ -6,6 +6,7 @@ // Author: Masahiro Yamada =20 #include +#include =20 / { compatible =3D "socionext,uniphier-sld8"; @@ -55,7 +56,8 @@ l2: cache-controller@500c0000 { compatible =3D "socionext,uniphier-system-cache"; reg =3D <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; - interrupts =3D <0 174 4>, <0 175 4>; + interrupts =3D , + ; cache-unified; cache-size =3D <(256 * 1024)>; cache-sets =3D <256>; @@ -69,7 +71,7 @@ spi: spi@54006000 { reg =3D <0x54006000 0x100>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 39 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_spi0>; clocks =3D <&peri_clk 11>; @@ -80,7 +82,7 @@ serial0: serial@54006800 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006800 0x40>; - interrupts =3D <0 33 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart0>; clocks =3D <&peri_clk 0>; @@ -91,7 +93,7 @@ serial1: serial@54006900 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006900 0x40>; - interrupts =3D <0 35 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart1>; clocks =3D <&peri_clk 1>; @@ -102,7 +104,7 @@ serial2: serial@54006a00 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006a00 0x40>; - interrupts =3D <0 37 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart2>; clocks =3D <&peri_clk 2>; @@ -113,7 +115,7 @@ serial3: serial@54006b00 { compatible =3D "socionext,uniphier-uart"; status =3D "disabled"; reg =3D <0x54006b00 0x40>; - interrupts =3D <0 29 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart3>; clocks =3D <&peri_clk 3>; @@ -144,7 +146,7 @@ i2c0: i2c@58400000 { reg =3D <0x58400000 0x40>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 41 1>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c0>; clocks =3D <&peri_clk 4>; @@ -158,7 +160,7 @@ i2c1: i2c@58480000 { reg =3D <0x58480000 0x40>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 42 1>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c1>; clocks =3D <&peri_clk 5>; @@ -172,7 +174,7 @@ i2c2: i2c@58500000 { reg =3D <0x58500000 0x40>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 43 1>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c2>; clocks =3D <&peri_clk 6>; @@ -186,7 +188,7 @@ i2c3: i2c@58580000 { reg =3D <0x58580000 0x40>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 44 1>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c3>; clocks =3D <&peri_clk 7>; @@ -244,8 +246,13 @@ peri_rst: reset { dmac: dma-controller@5a000000 { compatible =3D "socionext,uniphier-mio-dmac"; reg =3D <0x5a000000 0x1000>; - interrupts =3D <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, - <0 71 4>, <0 72 4>, <0 73 4>; + interrupts =3D , + , + , + , + , + , + ; clocks =3D <&mio_clk 7>; resets =3D <&mio_rst 7>; #dma-cells =3D <1>; @@ -255,7 +262,7 @@ sd: mmc@5a400000 { compatible =3D "socionext,uniphier-sd-v2.91"; status =3D "disabled"; reg =3D <0x5a400000 0x200>; - interrupts =3D <0 76 4>; + interrupts =3D ; pinctrl-names =3D "default", "uhs"; pinctrl-0 =3D <&pinctrl_sd>; pinctrl-1 =3D <&pinctrl_sd_uhs>; @@ -275,7 +282,7 @@ emmc: mmc@5a500000 { compatible =3D "socionext,uniphier-sd-v2.91"; status =3D "disabled"; reg =3D <0x5a500000 0x200>; - interrupts =3D <0 78 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_emmc>; clocks =3D <&mio_clk 1>; @@ -293,7 +300,7 @@ usb0: usb@5a800100 { compatible =3D "socionext,uniphier-ehci", "generic-ehci"; status =3D "disabled"; reg =3D <0x5a800100 0x100>; - interrupts =3D <0 80 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb0>; clocks =3D <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, @@ -307,7 +314,7 @@ usb1: usb@5a810100 { compatible =3D "socionext,uniphier-ehci", "generic-ehci"; status =3D "disabled"; reg =3D <0x5a810100 0x100>; - interrupts =3D <0 81 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb1>; clocks =3D <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, @@ -321,7 +328,7 @@ usb2: usb@5a820100 { compatible =3D "socionext,uniphier-ehci", "generic-ehci"; status =3D "disabled"; reg =3D <0x5a820100 0x100>; - interrupts =3D <0 82 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usb2>; clocks =3D <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, @@ -362,14 +369,16 @@ efuse@200 { timer@60000200 { compatible =3D "arm,cortex-a9-global-timer"; reg =3D <0x60000200 0x20>; - interrupts =3D <1 11 0x104>; + interrupts =3D ; clocks =3D <&arm_timer_clk>; }; =20 timer@60000600 { compatible =3D "arm,cortex-a9-twd-timer"; reg =3D <0x60000600 0x20>; - interrupts =3D <1 13 0x104>; + interrupts =3D ; clocks =3D <&arm_timer_clk>; }; =20 @@ -411,7 +420,7 @@ nand: nand-controller@68000000 { reg =3D <0x68000000 0x20>, <0x68100000 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; - interrupts =3D <0 65 4>; + interrupts =3D ; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_nand>; clock-names =3D "nand", "nand_x", "ecc"; --=20 2.25.1 From nobody Mon Apr 6 00:32:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E13D8C6FA86 for ; Tue, 13 Sep 2022 04:26:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230048AbiIME03 (ORCPT ); Tue, 13 Sep 2022 00:26:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230268AbiIMEZl (ORCPT ); Tue, 13 Sep 2022 00:25:41 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1AC5458099; Mon, 12 Sep 2022 21:22:57 -0700 (PDT) Received: from unknown (HELO kinkan2-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 13 Sep 2022 13:22:53 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan2-ex.css.socionext.com (Postfix) with ESMTP id E9A142059027; Tue, 13 Sep 2022 13:22:53 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 13 Sep 2022 13:22:53 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 4CF59B62A4; Tue, 13 Sep 2022 13:22:53 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v3 6/9] ARM: dts: uniphier: Add ahci controller nodes for Pro4 Date: Tue, 13 Sep 2022 13:22:46 +0900 Message-Id: <20220913042249.4708-7-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> References: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add ahci controller, glue layer, and clock nodes for Pro4 SoC. The glue layer includes reset and phy, and the clock node is used for handling ahci clocks on SoC-glue. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-pro4-ace.dts | 8 ++ arch/arm/boot/dts/uniphier-pro4-ref.dts | 8 ++ arch/arm/boot/dts/uniphier-pro4.dtsi | 97 +++++++++++++++++++++++++ 3 files changed, 113 insertions(+) diff --git a/arch/arm/boot/dts/uniphier-pro4-ace.dts b/arch/arm/boot/dts/un= iphier-pro4-ace.dts index 27ff2b7b9d0e..6baee4410d9c 100644 --- a/arch/arm/boot/dts/uniphier-pro4-ace.dts +++ b/arch/arm/boot/dts/uniphier-pro4-ace.dts @@ -99,3 +99,11 @@ &usb0 { &usb1 { status =3D "okay"; }; + +&ahci0 { + status =3D "okay"; +}; + +&ahci1 { + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/un= iphier-pro4-ref.dts index 48f7f23bab91..d2ce5c039865 100644 --- a/arch/arm/boot/dts/uniphier-pro4-ref.dts +++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts @@ -108,3 +108,11 @@ nand@0 { reg =3D <0>; }; }; + +&ahci0 { + status =3D "okay"; +}; + +&ahci1 { + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniph= ier-pro4.dtsi index 8cb4e7043e60..a309e64c57c8 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -411,6 +411,11 @@ usb_phy3: phy@3 { vbus-supply =3D <&usb1_vbus>; }; }; + + sg_clk: clock { + compatible =3D "socionext,uniphier-pro4-sg-clock"; + #clock-cells =3D <1>; + }; }; =20 soc-glue@5f900000 { @@ -513,6 +518,98 @@ mdio: mdio { }; }; =20 + ahci0: sata@65600000 { + compatible =3D "socionext,uniphier-pro4-ahci", + "generic-ahci"; + status =3D "disabled"; + reg =3D <0x65600000 0x10000>; + interrupts =3D ; + clocks =3D <&sys_clk 12>, <&sys_clk 28>; + resets =3D <&sys_rst 12>, <&sys_rst 28>, <&ahci0_rst 3>; + ports-implemented =3D <1>; + phys =3D <&ahci0_phy>; + assigned-clocks =3D <&sg_clk 0>; + assigned-clock-rates =3D <25000000>; + }; + + sata-controller@65700000 { + compatible =3D "socionext,uniphier-pxs2-ahci-glue", + "simple-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0 0x65700000 0x100>; + + ahci0_rst: reset-controller@0 { + compatible =3D "socionext,uniphier-pro4-ahci-reset"; + reg =3D <0x0 0x4>; + clock-names =3D "gio", "link"; + clocks =3D <&sys_clk 12>, <&sys_clk 28>; + reset-names =3D "gio", "link"; + resets =3D <&sys_rst 12>, <&sys_rst 28>; + #reset-cells =3D <1>; + }; + + ahci0_phy: sata-phy@10 { + compatible =3D "socionext,uniphier-pro4-ahci-phy"; + reg =3D <0x10 0x40>; + clock-names =3D "link", "gio"; + clocks =3D <&sys_clk 28>, <&sys_clk 12>; + reset-names =3D "link", "gio", "phy", + "pm", "tx", "rx"; + resets =3D <&sys_rst 28>, <&sys_rst 12>, + <&sys_rst 30>, + <&ahci0_rst 0>, <&ahci0_rst 1>, + <&ahci0_rst 2>; + #phy-cells =3D <0>; + }; + }; + + ahci1: sata@65800000 { + compatible =3D "socionext,uniphier-pro4-ahci", + "generic-ahci"; + status =3D "disabled"; + reg =3D <0x65800000 0x10000>; + interrupts =3D ; + clocks =3D <&sys_clk 12>, <&sys_clk 29>; + resets =3D <&sys_rst 12>, <&sys_rst 29>, <&ahci1_rst 3>; + ports-implemented =3D <1>; + phys =3D <&ahci1_phy>; + assigned-clocks =3D <&sg_clk 0>; + assigned-clock-rates =3D <25000000>; + }; + + sata-controller@65900000 { + compatible =3D "socionext,uniphier-pro4-ahci-glue", + "simple-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0 0x65900000 0x100>; + + ahci1_rst: reset-controller@0 { + compatible =3D "socionext,uniphier-pro4-ahci-reset"; + reg =3D <0x0 0x4>; + clock-names =3D "gio", "link"; + clocks =3D <&sys_clk 12>, <&sys_clk 29>; + reset-names =3D "gio", "link"; + resets =3D <&sys_rst 12>, <&sys_rst 29>; + #reset-cells =3D <1>; + }; + + ahci1_phy: sata-phy@10 { + compatible =3D "socionext,uniphier-pro4-ahci-phy"; + reg =3D <0x10 0x40>; + clock-names =3D "link", "gio"; + clocks =3D <&sys_clk 29>, <&sys_clk 12>; + reset-names =3D "link", "gio", "phy", + "pm", "tx", "rx"; + resets =3D <&sys_rst 29>, <&sys_rst 12>, + <&sys_rst 30>, + <&ahci1_rst 0>, <&ahci1_rst 1>, + <&ahci1_rst 2>; + #phy-cells =3D <0>; + }; + }; + usb0: usb@65a00000 { compatible =3D "socionext,uniphier-dwc3", "snps,dwc3"; status =3D "disabled"; --=20 2.25.1 From nobody Mon Apr 6 00:32:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD9FEC54EE9 for ; Tue, 13 Sep 2022 04:26:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230415AbiIME0h (ORCPT ); Tue, 13 Sep 2022 00:26:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230285AbiIMEZl (ORCPT ); Tue, 13 Sep 2022 00:25:41 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 44188564FD; Mon, 12 Sep 2022 21:22:58 -0700 (PDT) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 13 Sep 2022 13:22:54 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id E9B0C20584CE; Tue, 13 Sep 2022 13:22:53 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 13 Sep 2022 13:22:53 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 7AFF2B62AE; Tue, 13 Sep 2022 13:22:53 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v3 7/9] ARM: dts: uniphier: Add ahci controller nodes for PXs2 Date: Tue, 13 Sep 2022 13:22:47 +0900 Message-Id: <20220913042249.4708-8-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> References: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add ahci core controller and glue layer nodes including reset-controller and sata-phy. This supports for PXs2 and the boards without PXs2 vodka board that doesn't implement any SATA connectors. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-pxs2-gentil.dts | 4 +++ arch/arm/boot/dts/uniphier-pxs2.dtsi | 40 ++++++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts b/arch/arm/boot/dts= /uniphier-pxs2-gentil.dts index 759384b60663..5f18b926c50a 100644 --- a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts +++ b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts @@ -99,3 +99,7 @@ &usb0 { &usb1 { status =3D "okay"; }; + +&ahci { + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniph= ier-pxs2.dtsi index d2a2468d4ea0..ca4dccf56a67 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -599,6 +599,46 @@ mdio: mdio { }; }; =20 + ahci: sata@65600000 { + compatible =3D "socionext,uniphier-pxs2-ahci", + "generic-ahci"; + status =3D "disabled"; + reg =3D <0x65600000 0x10000>; + interrupts =3D ; + clocks =3D <&sys_clk 28>; + resets =3D <&sys_rst 28>, <&ahci_rst 0>; + ports-implemented =3D <1>; + phys =3D <&ahci_phy>; + }; + + sata-controller@65700000 { + compatible =3D "socionext,uniphier-pxs2-ahci-glue", + "simple-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0 0x65700000 0x100>; + + ahci_rst: reset-controller@0 { + compatible =3D "socionext,uniphier-pxs2-ahci-reset"; + reg =3D <0x0 0x4>; + clock-names =3D "link"; + clocks =3D <&sys_clk 28>; + reset-names =3D "link"; + resets =3D <&sys_rst 28>; + #reset-cells =3D <1>; + }; + + ahci_phy: sata-phy@10 { + compatible =3D "socionext,uniphier-pxs2-ahci-phy"; + reg =3D <0x10 0x10>; + clock-names =3D "link"; + clocks =3D <&sys_clk 28>; + reset-names =3D "link", "phy"; + resets =3D <&sys_rst 28>, <&sys_rst 30>; + #phy-cells =3D <0>; + }; + }; + usb0: usb@65a00000 { compatible =3D "socionext,uniphier-dwc3", "snps,dwc3"; status =3D "disabled"; --=20 2.25.1 From nobody Mon Apr 6 00:32:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 707D0C6FA86 for ; Tue, 13 Sep 2022 04:26:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230187AbiIME0v (ORCPT ); Tue, 13 Sep 2022 00:26:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53288 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230099AbiIMEZs (ORCPT ); Tue, 13 Sep 2022 00:25:48 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id EC05957E17; Mon, 12 Sep 2022 21:23:00 -0700 (PDT) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 13 Sep 2022 13:22:54 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id 2670E20584CE; Tue, 13 Sep 2022 13:22:54 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 13 Sep 2022 13:22:54 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id A8DF0B62A4; Tue, 13 Sep 2022 13:22:53 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v3 8/9] ARM: dts: uniphier: Move interrupt-parent property to each child node in uniphier-support-card Date: Tue, 13 Sep 2022 13:22:48 +0900 Message-Id: <20220913042249.4708-9-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> References: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The dtschema warning: uniphier-ld11-ref.dt.yaml: system-bus@58c00000: 'interrupt-parent' does n= ot match any of the regexes: '^.*@[1-5],[1-9a-f][0-9a-f]+$', 'pinctrl-[0-9]+' Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-support-card.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/uniphier-support-card.dtsi b/arch/arm/boot/d= ts/uniphier-support-card.dtsi index 444802fee9fb..97e7d5db8eb8 100644 --- a/arch/arm/boot/dts/uniphier-support-card.dtsi +++ b/arch/arm/boot/dts/uniphier-support-card.dtsi @@ -8,13 +8,13 @@ &system_bus { status =3D "okay"; ranges =3D <1 0x00000000 0x42000000 0x02000000>; - interrupt-parent =3D <&gpio>; =20 ethsc: ethernet@1,1f00000 { compatible =3D "smsc,lan9118", "smsc,lan9115"; reg =3D <1 0x01f00000 0x1000>; phy-mode =3D "mii"; reg-io-width =3D <4>; + interrupt-parent =3D <&gpio>; }; =20 serialsc: serial@1,1fb0000 { @@ -22,5 +22,6 @@ serialsc: serial@1,1fb0000 { reg =3D <1 0x01fb0000 0x20>; clock-frequency =3D <12288000>; reg-shift =3D <1>; + interrupt-parent =3D <&gpio>; }; }; --=20 2.25.1 From nobody Mon Apr 6 00:32:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8162C54EE9 for ; Tue, 13 Sep 2022 04:26:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229961AbiIME0s (ORCPT ); Tue, 13 Sep 2022 00:26:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230322AbiIMEZm (ORCPT ); Tue, 13 Sep 2022 00:25:42 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BE73357E21; Mon, 12 Sep 2022 21:22:58 -0700 (PDT) Received: from unknown (HELO kinkan2-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 13 Sep 2022 13:22:54 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan2-ex.css.socionext.com (Postfix) with ESMTP id 700982059027; Tue, 13 Sep 2022 13:22:54 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 13 Sep 2022 13:22:54 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id DF23AB62AE; Tue, 13 Sep 2022 13:22:53 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v3 9/9] ARM: dts: uniphier: Remove compatible "snps,dw-pcie-ep" from pcie-ep node Date: Tue, 13 Sep 2022 13:22:49 +0900 Message-Id: <20220913042249.4708-10-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> References: <20220913042249.4708-1-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The generic platform driver pcie-designware-plat.c doesn't work for UniPhier PCIe endpoint controller, because the controller has some necessary initialization sequence for the controller-specific logic. Currently the controller doesn't use "snps,dw-pcie-ep" compatible, so this is no longer needed. Remove the compatible string from the pcie-ep node. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-pro5.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniph= ier-pro5.dtsi index 33221d7130f1..100edd7438d8 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -620,8 +620,7 @@ usb1_ssphy0: ss-phy@380 { }; =20 pcie_ep: pcie-ep@66000000 { - compatible =3D "socionext,uniphier-pro5-pcie-ep", - "snps,dw-pcie-ep"; + compatible =3D "socionext,uniphier-pro5-pcie-ep"; status =3D "disabled"; reg-names =3D "dbi", "dbi2", "link", "addr_space"; reg =3D <0x66000000 0x1000>, <0x66001000 0x1000>, --=20 2.25.1