From nobody Mon Apr 6 03:12:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5868AECAAA1 for ; Mon, 12 Sep 2022 07:16:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229905AbiILHQB (ORCPT ); Mon, 12 Sep 2022 03:16:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230035AbiILHPX (ORCPT ); Mon, 12 Sep 2022 03:15:23 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D08AA167FD; Mon, 12 Sep 2022 00:15:18 -0700 (PDT) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 12 Sep 2022 16:15:15 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id 5711220584CE; Mon, 12 Sep 2022 16:15:15 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Mon, 12 Sep 2022 16:15:15 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id A0FDCB62AE; Mon, 12 Sep 2022 16:15:14 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v2 5/8] ARM: dts: uniphier: Add ahci controller and glue layer nodes for Pro4 Date: Mon, 12 Sep 2022 16:15:08 +0900 Message-Id: <20220912071511.1385-6-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220912071511.1385-1-hayashi.kunihiko@socionext.com> References: <20220912071511.1385-1-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add ahci controller, glue layer, and clock nodes for Pro4 SoC. The glue layer includes reset and phy, and the clock node is used for handling ahci clocks on SoC-glue. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-pro4-ace.dts | 8 ++ arch/arm/boot/dts/uniphier-pro4-ref.dts | 8 ++ arch/arm/boot/dts/uniphier-pro4.dtsi | 97 +++++++++++++++++++++++++ 3 files changed, 113 insertions(+) diff --git a/arch/arm/boot/dts/uniphier-pro4-ace.dts b/arch/arm/boot/dts/un= iphier-pro4-ace.dts index 27ff2b7b9d0e..6baee4410d9c 100644 --- a/arch/arm/boot/dts/uniphier-pro4-ace.dts +++ b/arch/arm/boot/dts/uniphier-pro4-ace.dts @@ -99,3 +99,11 @@ &usb0 { &usb1 { status =3D "okay"; }; + +&ahci0 { + status =3D "okay"; +}; + +&ahci1 { + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/un= iphier-pro4-ref.dts index 48f7f23bab91..d2ce5c039865 100644 --- a/arch/arm/boot/dts/uniphier-pro4-ref.dts +++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts @@ -108,3 +108,11 @@ nand@0 { reg =3D <0>; }; }; + +&ahci0 { + status =3D "okay"; +}; + +&ahci1 { + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniph= ier-pro4.dtsi index 7102c3de8db2..0991c9d9b4cf 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -411,6 +411,11 @@ usb_phy3: phy@3 { vbus-supply =3D <&usb1_vbus>; }; }; + + sg_clk: clock { + compatible =3D "socionext,uniphier-pro4-sg-clock"; + #clock-cells =3D <1>; + }; }; =20 soc-glue@5f900000 { @@ -513,6 +518,98 @@ mdio: mdio { }; }; =20 + ahci0: ahci@65600000 { + compatible =3D "socionext,uniphier-pro4-ahci", + "generic-ahci"; + status =3D "disabled"; + reg =3D <0x65600000 0x10000>; + interrupts =3D ; + clocks =3D <&sys_clk 12>, <&sys_clk 28>; + resets =3D <&sys_rst 12>, <&sys_rst 28>, <&ahci0_rst 3>; + ports-implemented =3D <1>; + phys =3D <&ahci0_phy>; + assigned-clocks =3D <&sg_clk 0>; + assigned-clock-rates =3D <25000000>; + }; + + ahci-glue@65700000 { + compatible =3D "socionext,uniphier-pxs2-ahci-glue", + "simple-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0 0x65700000 0x100>; + + ahci0_rst: reset@0 { + compatible =3D "socionext,uniphier-pro4-ahci-reset"; + reg =3D <0x0 0x4>; + clock-names =3D "gio", "link"; + clocks =3D <&sys_clk 12>, <&sys_clk 28>; + reset-names =3D "gio", "link"; + resets =3D <&sys_rst 12>, <&sys_rst 28>; + #reset-cells =3D <1>; + }; + + ahci0_phy: ahci-phy@10 { + compatible =3D "socionext,uniphier-pro4-ahci-phy"; + reg =3D <0x10 0x40>; + clock-names =3D "link", "gio"; + clocks =3D <&sys_clk 28>, <&sys_clk 12>; + reset-names =3D "link", "gio", "phy", + "pm", "tx", "rx"; + resets =3D <&sys_rst 28>, <&sys_rst 12>, + <&sys_rst 30>, + <&ahci0_rst 0>, <&ahci0_rst 1>, + <&ahci0_rst 2>; + #phy-cells =3D <0>; + }; + }; + + ahci1: ahci@65800000 { + compatible =3D "socionext,uniphier-pro4-ahci", + "generic-ahci"; + status =3D "disabled"; + reg =3D <0x65800000 0x10000>; + interrupts =3D ; + clocks =3D <&sys_clk 12>, <&sys_clk 29>; + resets =3D <&sys_rst 12>, <&sys_rst 29>, <&ahci1_rst 3>; + ports-implemented =3D <1>; + phys =3D <&ahci1_phy>; + assigned-clocks =3D <&sg_clk 0>; + assigned-clock-rates =3D <25000000>; + }; + + ahci-glue@65900000 { + compatible =3D "socionext,uniphier-pro4-ahci-glue", + "simple-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0 0x65900000 0x100>; + + ahci1_rst: reset@0 { + compatible =3D "socionext,uniphier-pro4-ahci-reset"; + reg =3D <0x0 0x4>; + clock-names =3D "gio", "link"; + clocks =3D <&sys_clk 12>, <&sys_clk 29>; + reset-names =3D "gio", "link"; + resets =3D <&sys_rst 12>, <&sys_rst 29>; + #reset-cells =3D <1>; + }; + + ahci1_phy: ahci-phy@10 { + compatible =3D "socionext,uniphier-pro4-ahci-phy"; + reg =3D <0x10 0x40>; + clock-names =3D "link", "gio"; + clocks =3D <&sys_clk 29>, <&sys_clk 12>; + reset-names =3D "link", "gio", "phy", + "pm", "tx", "rx"; + resets =3D <&sys_rst 29>, <&sys_rst 12>, + <&sys_rst 30>, + <&ahci1_rst 0>, <&ahci1_rst 1>, + <&ahci1_rst 2>; + #phy-cells =3D <0>; + }; + }; + usb0: usb@65a00000 { compatible =3D "socionext,uniphier-dwc3", "snps,dwc3"; status =3D "disabled"; --=20 2.25.1