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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id t19-20020ac24c13000000b004996fbfd75esm876805lfq.71.2022.09.11.23.18.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Sep 2022 23:18:36 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Iskren Chernev , Martin Botka , Vinod Koul , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v2 30/40] dt-bindings: pinctrl: qcom,sc8180x-pinctrl: fix indentation in example Date: Mon, 12 Sep 2022 08:17:36 +0200 Message-Id: <20220912061746.6311-31-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220912061746.6311-1-krzysztof.kozlowski@linaro.org> References: <20220912061746.6311-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Bindings example should be indented with 4-spaces. Signed-off-by: Krzysztof Kozlowski --- .../pinctrl/qcom,sc8180x-pinctrl.yaml | 64 +++++++++---------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl= .yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml index 4afe20bac87c..b98eeba2c530 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml @@ -126,37 +126,37 @@ patternProperties: =20 examples: - | - #include - pinctrl@3100000 { - compatible =3D "qcom,sc8180x-tlmm"; - reg =3D <0x03100000 0x300000>, - <0x03500000 0x700000>, - <0x03d00000 0x300000>; - reg-names =3D "west", "east", "south"; - interrupts =3D ; - gpio-controller; - #gpio-cells =3D <2>; - interrupt-controller; - #interrupt-cells =3D <2>; - gpio-ranges =3D <&tlmm 0 0 190>; - - gpio-wo-subnode-state { - pins =3D "gpio1"; - function =3D "gpio"; - }; - - uart-w-subnodes-state { - rx-pins { - pins =3D "gpio4"; - function =3D "qup6"; - bias-pull-up; - }; - - tx-pins { - pins =3D "gpio5"; - function =3D "qup6"; - bias-disable; - }; - }; + #include + pinctrl@3100000 { + compatible =3D "qcom,sc8180x-tlmm"; + reg =3D <0x03100000 0x300000>, + <0x03500000 0x700000>, + <0x03d00000 0x300000>; + reg-names =3D "west", "east", "south"; + interrupts =3D ; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + gpio-ranges =3D <&tlmm 0 0 190>; + + gpio-wo-subnode-state { + pins =3D "gpio1"; + function =3D "gpio"; }; + + uart-w-subnodes-state { + rx-pins { + pins =3D "gpio4"; + function =3D "qup6"; + bias-pull-up; + }; + + tx-pins { + pins =3D "gpio5"; + function =3D "qup6"; + bias-disable; + }; + }; + }; ... --=20 2.34.1