From nobody Wed Apr 8 12:59:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E031ECAAA1 for ; Fri, 9 Sep 2022 13:52:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229810AbiIINwH (ORCPT ); Fri, 9 Sep 2022 09:52:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231871AbiIINva (ORCPT ); Fri, 9 Sep 2022 09:51:30 -0400 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79F3B4AD52; Fri, 9 Sep 2022 06:51:05 -0700 (PDT) Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id 0DDC426EFEA; Fri, 9 Sep 2022 15:51:04 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Alyssa Rosenzweig , Hector Martin , Krzysztof Kozlowski , Marc Zyngier , Rob Herring , Sven Peter , Thomas Gleixner , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 01/10] dt-bindings: apple,aic: Fix required item "apple,fiq-index" in affinity description Date: Fri, 9 Sep 2022 15:50:54 +0200 Message-Id: <20220909135103.98179-2-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fixes: dba07ad11384 ("dt-bindings: apple,aic: Add affinity description for = per-cpu pseudo-interrupts") Signed-off-by: Janne Grunau Acked-by: Marc Zyngier --- .../devicetree/bindings/interrupt-controller/apple,aic.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.= yaml index 85c85b694217..e18107eafe7c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml @@ -96,7 +96,7 @@ properties: Documentation/devicetree/bindings/arm/cpus.yaml). =20 required: - - fiq-index + - apple,fiq-index - cpus =20 required: --=20 2.35.1 From nobody Wed Apr 8 12:59:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 367ACECAAD3 for ; Fri, 9 Sep 2022 13:59:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231423AbiIIN7C (ORCPT ); Fri, 9 Sep 2022 09:59:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232111AbiIIN6u (ORCPT ); Fri, 9 Sep 2022 09:58:50 -0400 X-Greylist: delayed 444 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Fri, 09 Sep 2022 06:58:38 PDT Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F2491580C; Fri, 9 Sep 2022 06:58:38 -0700 (PDT) Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id 7EA8226EFEB; Fri, 9 Sep 2022 15:51:04 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Alyssa Rosenzweig , Hector Martin , Krzysztof Kozlowski , Rob Herring , Sven Peter , Vinod Koul , devicetree@vger.kernel.org, dmaengine@vger.kernel.org, er , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 02/10] dt-bindings: dma: apple,admac: Add iommus and power-domains properties Date: Fri, 9 Sep 2022 15:50:55 +0200 Message-Id: <20220909135103.98179-3-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Apple's ADMAC is on all supported Apple silicon SoCs behind an IOMMU and has its own power-domain. Signed-off-by: Janne Grunau Acked-by: Krzysztof Kozlowski Acked-by: Martin Povi=C5=A1er --- Documentation/devicetree/bindings/dma/apple,admac.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/apple,admac.yaml b/Docum= entation/devicetree/bindings/dma/apple,admac.yaml index bdc8c129c4f5..3b1e667f7ea0 100644 --- a/Documentation/devicetree/bindings/dma/apple,admac.yaml +++ b/Documentation/devicetree/bindings/dma/apple,admac.yaml @@ -49,6 +49,13 @@ properties: in an interrupts-extended list the disconnected positions will conta= in an empty phandle reference <0>. =20 + iommus: + minItems: 1 + maxItems: 2 + + power-domains: + maxItems: 1 + required: - compatible - reg --=20 2.35.1 From nobody Wed Apr 8 12:59:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F8F9C6FA86 for ; Fri, 9 Sep 2022 13:51:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229679AbiIINvz (ORCPT ); Fri, 9 Sep 2022 09:51:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231841AbiIINva (ORCPT ); Fri, 9 Sep 2022 09:51:30 -0400 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0364B82D05; Fri, 9 Sep 2022 06:51:06 -0700 (PDT) Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id ED01926EFEC; Fri, 9 Sep 2022 15:51:04 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Alyssa Rosenzweig , Hector Martin , Krzysztof Kozlowski , Marc Zyngier , Rob Herring , Sven Peter , Thomas Gleixner , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 03/10] dt-bindings: apple,aic2: Add CPU PMU per-cpu pseudo-interrupts Date: Fri, 9 Sep 2022 15:50:56 +0200 Message-Id: <20220909135103.98179-4-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Advertise the two pseudo-interrupts that tied to the two PMU flavours present in the Apple M1 Pro/Max/Ultra SoC. We choose the expose two different pseudo-interrupts to the OS as the e-core PMU is obviously different from the p-core one, effectively presenting two different devices. Imported from "apple,aic". Signed-off-by: Janne Grunau Acked-by: Krzysztof Kozlowski Acked-by: Marc Zyngier --- .../interrupt-controller/apple,aic2.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic= 2.yaml index 47a78a167aba..06948c0e36a5 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -69,6 +69,35 @@ properties: power-domains: maxItems: 1 =20 + affinities: + type: object + additionalProperties: false + description: + FIQ affinity can be expressed as a single "affinities" node, + containing a set of sub-nodes, one per FIQ with a non-default + affinity. + patternProperties: + "^.+-affinity$": + type: object + additionalProperties: false + properties: + apple,fiq-index: + description: + The interrupt number specified as a FIQ, and for which + the affinity is not the default. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 5 + + cpus: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should be a list of phandles to CPU nodes (as described in + Documentation/devicetree/bindings/arm/cpus.yaml). + + required: + - apple,fiq-index + - cpus + required: - compatible - '#interrupt-cells' --=20 2.35.1 From nobody Wed Apr 8 12:59:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF327C6FA82 for ; Fri, 9 Sep 2022 13:52:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231168AbiIINv7 (ORCPT ); Fri, 9 Sep 2022 09:51:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231867AbiIINva (ORCPT ); Fri, 9 Sep 2022 09:51:30 -0400 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B39D9E8A2; Fri, 9 Sep 2022 06:51:06 -0700 (PDT) Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id 68AFA26EFED; Fri, 9 Sep 2022 15:51:05 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Alyssa Rosenzweig , Hector Martin , Krzysztof Kozlowski , Rob Herring , Sven Peter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 04/10] dt-bindings: arm: apple: Add t6001/t6002 Mac Studio compatibles Date: Fri, 9 Sep 2022 15:50:57 +0200 Message-Id: <20220909135103.98179-5-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This adds the following apple,t6001 platform: - apple,j375c - Mac Studio (M1 Max, 2022) And the initial apple,t6002 platform: - apple,j375d - Mac Studio (M1 Ultra, 2022) Signed-off-by: Janne Grunau Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/apple.yaml | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index 8d93e8a6cc18..b34e56b9dc59 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -19,12 +19,14 @@ description: | - MacBook Air (M1, 2020) - iMac (24-inch, M1, 2021) =20 - And devices based on the "M1 Pro" and "M1 Max" SoCs: + And devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs: =20 - MacBook Pro (14-inch, M1 Pro, 2021) - MacBook Pro (14-inch, M1 Max, 2021) - MacBook Pro (16-inch, M1 Pro, 2021) - MacBook Pro (16-inch, M1 Max, 2021) + - Mac Studio (M1 Max, 2022) + - Mac Studio (M1 Ultra, 2022) =20 The compatible property should follow this format: =20 @@ -79,8 +81,15 @@ properties: - enum: - apple,j314c # MacBook Pro (14-inch, M1 Max, 2021) - apple,j316c # MacBook Pro (16-inch, M1 Max, 2021) + - apple,j375c # Mac Studio (M1 Max, 2022) - const: apple,t6001 - const: apple,arm-platform + - description: Apple M1 Ultra SoC based platforms + items: + - enum: + - apple,j375d # Mac Studio (M1 Ultra, 2022) + - const: apple,t6002 + - const: apple,arm-platform =20 additionalProperties: true =20 --=20 2.35.1 From nobody Wed Apr 8 12:59:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 233BEC6FA82 for ; Fri, 9 Sep 2022 13:52:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229821AbiIINwM (ORCPT ); Fri, 9 Sep 2022 09:52:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231824AbiIINvc (ORCPT ); Fri, 9 Sep 2022 09:51:32 -0400 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71D3714052F; Fri, 9 Sep 2022 06:51:23 -0700 (PDT) Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id E145826EFEE; Fri, 9 Sep 2022 15:51:05 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Hector Martin , Alyssa Rosenzweig , Krzysztof Kozlowski , Rob Herring , Sven Peter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 05/10] arm64: dts: apple: Fix j45x model years Date: Fri, 9 Sep 2022 15:50:58 +0200 Message-Id: <20220909135103.98179-6-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Hector Martin Signed-off-by: Hector Martin Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/t8103-j456.dts | 2 +- arch/arm64/boot/dts/apple/t8103-j457.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/apple/t8103-j456.dts b/arch/arm64/boot/dts= /apple/t8103-j456.dts index 884fddf7d363..c49c048ac2a1 100644 --- a/arch/arm64/boot/dts/apple/t8103-j456.dts +++ b/arch/arm64/boot/dts/apple/t8103-j456.dts @@ -14,7 +14,7 @@ =20 / { compatible =3D "apple,j456", "apple,t8103", "apple,arm-platform"; - model =3D "Apple iMac (24-inch, 4x USB-C, M1, 2020)"; + model =3D "Apple iMac (24-inch, 4x USB-C, M1, 2021)"; =20 aliases { ethernet0 =3D ðernet0; diff --git a/arch/arm64/boot/dts/apple/t8103-j457.dts b/arch/arm64/boot/dts= /apple/t8103-j457.dts index d7c622931627..f7c7c850ad81 100644 --- a/arch/arm64/boot/dts/apple/t8103-j457.dts +++ b/arch/arm64/boot/dts/apple/t8103-j457.dts @@ -14,7 +14,7 @@ =20 / { compatible =3D "apple,j457", "apple,t8103", "apple,arm-platform"; - model =3D "Apple iMac (24-inch, 2x USB-C, M1, 2020)"; + model =3D "Apple iMac (24-inch, 2x USB-C, M1, 2021)"; =20 aliases { ethernet0 =3D ðernet0; --=20 2.35.1 From nobody Wed Apr 8 12:59:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58D49ECAAA1 for ; Fri, 9 Sep 2022 13:52:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231447AbiIINw1 (ORCPT ); Fri, 9 Sep 2022 09:52:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231379AbiIINvl (ORCPT ); Fri, 9 Sep 2022 09:51:41 -0400 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3EA9142D85; Fri, 9 Sep 2022 06:51:24 -0700 (PDT) Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id 6445C26EFEF; Fri, 9 Sep 2022 15:51:06 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Hector Martin , Alyssa Rosenzweig , Krzysztof Kozlowski , Rob Herring , Sven Peter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 06/10] arm64: dts: apple: Add initial t6000/t6001/t6002 DTs Date: Fri, 9 Sep 2022 15:50:59 +0200 Message-Id: <20220909135103.98179-7-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Hector Martin These SoCs are found in Apple devices with M1 Pro (t6000), M1 Max (t6001) and M1 Ultra (t6002). t6000 is a cut-down version of t6001, so the former just includes the latter and disables the missing bits (This is currently just one PMGR node and all of its domains. t6002 is two connected t6001 dies. The implementation seems to use t6001 with blocks disabled (mostly on the second die). MMIO addresses on the second die have a constant offset. The interrupt controller is multi-die aware. This setup can be represented in the device tree with two top level "soc" nodes. The MMIO offset is applied via "ranges" and devices are included with preproceesor macros to make the node labels unique and to specify the die number for the interrupt definition. Device nodes are distributed over dtsi files based on whether they are present on both dies or just on the first die. The only execption is the NVMe controller which resides on the second die. Its nodes are in a separate file. Signed-off-by: Hector Martin Co-developed-by: Janne Grunau Signed-off-by: Janne Grunau --- --- arch/arm64/boot/dts/apple/multi-die-cpp.h | 23 + arch/arm64/boot/dts/apple/t6000.dtsi | 18 + arch/arm64/boot/dts/apple/t6001.dtsi | 63 + arch/arm64/boot/dts/apple/t6002.dtsi | 173 ++ arch/arm64/boot/dts/apple/t600x-common.dtsi | 128 ++ arch/arm64/boot/dts/apple/t600x-die0.dtsi | 298 +++ arch/arm64/boot/dts/apple/t600x-dieX.dtsi | 103 + .../arm64/boot/dts/apple/t600x-gpio-pins.dtsi | 45 + arch/arm64/boot/dts/apple/t600x-nvme.dtsi | 42 + arch/arm64/boot/dts/apple/t600x-pmgr.dtsi | 2012 +++++++++++++++++ 10 files changed, 2905 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/multi-die-cpp.h create mode 100644 arch/arm64/boot/dts/apple/t6000.dtsi create mode 100644 arch/arm64/boot/dts/apple/t6001.dtsi create mode 100644 arch/arm64/boot/dts/apple/t6002.dtsi create mode 100644 arch/arm64/boot/dts/apple/t600x-common.dtsi create mode 100644 arch/arm64/boot/dts/apple/t600x-die0.dtsi create mode 100644 arch/arm64/boot/dts/apple/t600x-dieX.dtsi create mode 100644 arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi create mode 100644 arch/arm64/boot/dts/apple/t600x-nvme.dtsi create mode 100644 arch/arm64/boot/dts/apple/t600x-pmgr.dtsi diff --git a/arch/arm64/boot/dts/apple/multi-die-cpp.h b/arch/arm64/boot/dt= s/apple/multi-die-cpp.h new file mode 100644 index 000000000000..153d89dd0ae1 --- /dev/null +++ b/arch/arm64/boot/dts/apple/multi-die-cpp.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0+ OR MIT + * + * C preprocessor macros for t600x multi die support. + */ + +#ifndef __DTS_APPLE_MULTI_DIE_CPP_H +#define __DTS_APPLE_MULTI_DIE_CPP_H + +#ifndef __stringify +/* copied from include/linux/stringify.h */ +#define __stringify_1(x...) #x +#define __stringify(x...) __stringify_1(x) +#endif + +#ifndef __concat +#define __concat_1(x, y...) x ## y +#define __concat(x, y...) __concat_1(x, y) +#endif + +#define DIE_NODE(a) __concat(a, DIE) +#define DIE_LABEL(a) __stringify(__concat(a, DIE)) + +#endif /* !__LINUX_STRINGIFY_H */ diff --git a/arch/arm64/boot/dts/apple/t6000.dtsi b/arch/arm64/boot/dts/app= le/t6000.dtsi new file mode 100644 index 000000000000..89c3b211b116 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6000.dtsi @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T6000 "M1 Pro" SoC + * + * Other names: H13J, "Jade Chop" + * + * Copyright The Asahi Linux Contributors + */ + +/* This chip is just a cut down version of t6001, so include it and disabl= e the missing parts */ + +#include "t6001.dtsi" + +/ { + compatible =3D "apple,t6000", "apple,arm-platform"; +}; + +/delete-node/ &pmgr_south; diff --git a/arch/arm64/boot/dts/apple/t6001.dtsi b/arch/arm64/boot/dts/app= le/t6001.dtsi new file mode 100644 index 000000000000..620b17e4031f --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6001.dtsi @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T6001 "M1 Max" SoC + * + * Other names: H13J, "Jade" + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include + +#include "multi-die-cpp.h" + +#include "t600x-common.dtsi" + +/ { + compatible =3D "apple,t6001", "apple,arm-platform"; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + ranges; + nonposted-mmio; + + // filled via templated includes at the end of the file + }; +}; + +#define DIE +#define DIE_NO 0 + +&{/soc} { + #include "t600x-die0.dtsi" + #include "t600x-dieX.dtsi" + #include "t600x-nvme.dtsi" +}; + +#include "t600x-gpio-pins.dtsi" +#include "t600x-pmgr.dtsi" + +#undef DIE +#undef DIE_NO + + +&aic { + affinities { + e-core-pmu-affinity { + apple,fiq-index =3D ; + cpus =3D <&cpu_e00 &cpu_e01>; + }; + + p-core-pmu-affinity { + apple,fiq-index =3D ; + cpus =3D <&cpu_p00 &cpu_p01 &cpu_p02 &cpu_p03 + &cpu_p10 &cpu_p11 &cpu_p12 &cpu_p13>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6002.dtsi b/arch/arm64/boot/dts/app= le/t6002.dtsi new file mode 100644 index 000000000000..32c971c0e191 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6002.dtsi @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T6002 "M1 Ultra" SoC + * + * Other names: H13J, "Jade 2C" + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include + +#include "multi-die-cpp.h" + +#include "t600x-common.dtsi" + +/ { + compatible =3D "apple,t6002", "apple,arm-platform"; + + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + cpu_e10: cpu@800 { + compatible =3D "apple,icestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x800>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_e11: cpu@801 { + compatible =3D "apple,icestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x801>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p20: cpu@10900 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10900>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p21: cpu@10901 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10901>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p22: cpu@10902 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10902>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p23: cpu@10903 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10903>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p30: cpu@10a00 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10a00>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p31: cpu@10a01 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10a01>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p32: cpu@10a02 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10a02>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p33: cpu@10a03 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10a03>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + }; + + die0: soc@0 { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + nonposted-mmio; + + // filled via templated includes at the end of the file + }; + + die1: soc@1 { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x2 0x0 0x22 0x0 0x4 0x0>, + <0x7 0x0 0x27 0x0 0xf 0x80000000>; + nonposted-mmio; + + // filled via templated includes at the end of the file + }; +}; + +#define DIE +#define DIE_NO 0 + +&die0 { + #include "t600x-die0.dtsi" + #include "t600x-dieX.dtsi" +}; + +#include "t600x-pmgr.dtsi" +#include "t600x-gpio-pins.dtsi" + +#undef DIE +#undef DIE_NO + +#define DIE _die1 +#define DIE_NO 1 + +&die1 { + #include "t600x-dieX.dtsi" + #include "t600x-nvme.dtsi" +}; + +#include "t600x-pmgr.dtsi" + +#undef DIE +#undef DIE_NO + + +&aic { + affinities { + e-core-pmu-affinity { + apple,fiq-index =3D ; + cpus =3D <&cpu_e00 &cpu_e01 + &cpu_e10 &cpu_e11>; + }; + + p-core-pmu-affinity { + apple,fiq-index =3D ; + cpus =3D <&cpu_p00 &cpu_p01 &cpu_p02 &cpu_p03 + &cpu_p10 &cpu_p11 &cpu_p12 &cpu_p13 + &cpu_p20 &cpu_p21 &cpu_p22 &cpu_p23 + &cpu_p30 &cpu_p31 &cpu_p32 &cpu_p33>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t600x-common.dtsi b/arch/arm64/boot/= dts/apple/t600x-common.dtsi new file mode 100644 index 000000000000..e29b88e2c853 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t600x-common.dtsi @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Common Apple T6000 / T6001 / T6002 "M1 Pro/Max/Ultra" SoC + * + * Other names: H13J, "Jade Chop", "Jade", "Jade 2C" + * + * Copyright The Asahi Linux Contributors + */ + +/ { + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu_e00: cpu@0 { + compatible =3D "apple,icestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x0>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_e01: cpu@1 { + compatible =3D "apple,icestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x1>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p00: cpu@10100 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10100>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p01: cpu@10101 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10101>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p02: cpu@10102 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10102>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p03: cpu@10103 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10103>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p10: cpu@10200 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10200>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p11: cpu@10201 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10201>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p12: cpu@10202 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10202>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + + cpu_p13: cpu@10203 { + compatible =3D "apple,firestorm"; + device_type =3D "cpu"; + reg =3D <0x0 0x10203>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + }; + }; + + pmu-e { + compatible =3D "apple,icestorm-pmu"; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + pmu-p { + compatible =3D "apple,firestorm-pmu"; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt", "hyp-phys", "hyp-virt"; + interrupts =3D , + , + , + ; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + +}; diff --git a/arch/arm64/boot/dts/apple/t600x-die0.dtsi b/arch/arm64/boot/dt= s/apple/t600x-die0.dtsi new file mode 100644 index 000000000000..2d66eead8aee --- /dev/null +++ b/arch/arm64/boot/dts/apple/t600x-die0.dtsi @@ -0,0 +1,298 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on + * Apple T6000 / T6001 "M1 Pro" / "M1 Max". + * + * Copyright The Asahi Linux Contributors + */ + + + aic: interrupt-controller@28e100000 { + compatible =3D "apple,t6000-aic", "apple,aic2"; + #interrupt-cells =3D <4>; + interrupt-controller; + reg =3D <0x2 0x8e100000 0x0 0xc000>, + <0x2 0x8e10c000 0x0 0x4>; + reg-names =3D "core", "event"; + power-domains =3D <&ps_aic>; + }; + + pinctrl_smc: pinctrl@290820000 { + compatible =3D "apple,t6000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x90820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_smc 0 0 30>; + apple,npins =3D <30>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + wdt: watchdog@2922b0000 { + compatible =3D "apple,t6000-wdt", "apple,wdt"; + reg =3D <0x2 0x922b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + i2c0: i2c@39b040000 { + compatible =3D "apple,t6000-i2c", "apple,i2c"; + reg =3D <0x3 0x9b040000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c0_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c0>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + }; + + i2c1: i2c@39b044000 { + compatible =3D "apple,t6000-i2c", "apple,i2c"; + reg =3D <0x3 0x9b044000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c1_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c1>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c2: i2c@39b048000 { + compatible =3D "apple,t6000-i2c", "apple,i2c"; + reg =3D <0x3 0x9b048000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c2_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c2>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c3: i2c@39b04c000 { + compatible =3D "apple,t6000-i2c", "apple,i2c"; + reg =3D <0x3 0x9b04c000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c3_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c3>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c4: i2c@39b050000 { + compatible =3D "apple,t6000-i2c", "apple,i2c"; + reg =3D <0x3 0x9b050000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c4_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c4>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c5: i2c@39b054000 { + compatible =3D "apple,t6000-i2c", "apple,i2c"; + reg =3D <0x3 0x9b054000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c5_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c5>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + serial0: serial@39b200000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x3 0x9b200000 0x0 0x1000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* + * TODO: figure out the clocking properly, there may + * be a third selectable clock. + */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + power-domains =3D <&ps_uart0>; + status =3D "disabled"; + }; + + pcie0_dart_0: dart@581008000 { + compatible =3D "apple,t6000-dart"; + reg =3D <0x5 0x81008000 0x0 0x4000>; + #iommu-cells =3D <1>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + power-domains =3D <&ps_apcie_gp_sys>; + }; + + pcie0_dart_1: dart@582008000 { + compatible =3D "apple,t6000-dart"; + reg =3D <0x5 0x82008000 0x0 0x4000>; + #iommu-cells =3D <1>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + power-domains =3D <&ps_apcie_gp_sys>; + }; + + pcie0_dart_2: dart@583008000 { + compatible =3D "apple,t6000-dart"; + reg =3D <0x5 0x83008000 0x0 0x4000>; + #iommu-cells =3D <1>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + power-domains =3D <&ps_apcie_gp_sys>; + }; + + pcie0_dart_3: dart@584008000 { + compatible =3D "apple,t6000-dart"; + reg =3D <0x5 0x84008000 0x0 0x4000>; + #iommu-cells =3D <1>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + power-domains =3D <&ps_apcie_gp_sys>; + }; + + pcie0: pcie@590000000 { + compatible =3D "apple,t6000-pcie", "apple,pcie"; + device_type =3D "pci"; + + reg =3D <0x5 0x90000000 0x0 0x1000000>, + <0x5 0x80000000 0x0 0x100000>, + <0x5 0x81000000 0x0 0x4000>, + <0x5 0x82000000 0x0 0x4000>, + <0x5 0x83000000 0x0 0x4000>, + <0x5 0x84000000 0x0 0x4000>; + reg-names =3D "config", "rc", "port0", "port1", "port2", "port3"; + + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + ; + + msi-controller; + msi-parent =3D <&pcie0>; + msi-ranges =3D <&aic AIC_IRQ 0 1581 IRQ_TYPE_EDGE_RISING 32>; + + + iommu-map =3D <0x100 &pcie0_dart_0 1 1>, + <0x200 &pcie0_dart_1 1 1>, + <0x300 &pcie0_dart_2 1 1>, + <0x400 &pcie0_dart_3 1 1>; + iommu-map-mask =3D <0xff00>; + + bus-range =3D <0 4>; + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges =3D <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>, + <0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>; + + power-domains =3D <&ps_apcie_gp_sys>; + pinctrl-0 =3D <&pcie_pins>; + pinctrl-names =3D "default"; + + port00: pci@0,0 { + device_type =3D "pci"; + reg =3D <0x0 0x0 0x0 0x0 0x0>; + reset-gpios =3D <&pinctrl_ap 4 GPIO_ACTIVE_LOW>; + + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + + interrupt-controller; + #interrupt-cells =3D <1>; + + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &port00 0 0 0 0>, + <0 0 0 2 &port00 0 0 0 1>, + <0 0 0 3 &port00 0 0 0 2>, + <0 0 0 4 &port00 0 0 0 3>; + }; + + port01: pci@1,0 { + device_type =3D "pci"; + reg =3D <0x800 0x0 0x0 0x0 0x0>; + reset-gpios =3D <&pinctrl_ap 5 GPIO_ACTIVE_LOW>; + + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + + interrupt-controller; + #interrupt-cells =3D <1>; + + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &port01 0 0 0 0>, + <0 0 0 2 &port01 0 0 0 1>, + <0 0 0 3 &port01 0 0 0 2>, + <0 0 0 4 &port01 0 0 0 3>; + }; + + port02: pci@2,0 { + device_type =3D "pci"; + reg =3D <0x1000 0x0 0x0 0x0 0x0>; + reset-gpios =3D <&pinctrl_ap 6 GPIO_ACTIVE_LOW>; + + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + + interrupt-controller; + #interrupt-cells =3D <1>; + + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &port02 0 0 0 0>, + <0 0 0 2 &port02 0 0 0 1>, + <0 0 0 3 &port02 0 0 0 2>, + <0 0 0 4 &port02 0 0 0 3>; + }; + + port03: pci@3,0 { + device_type =3D "pci"; + reg =3D <0x1800 0x0 0x0 0x0 0x0>; + reset-gpios =3D <&pinctrl_ap 7 GPIO_ACTIVE_LOW>; + + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + + interrupt-controller; + #interrupt-cells =3D <1>; + + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &port03 0 0 0 0>, + <0 0 0 2 &port03 0 0 0 1>, + <0 0 0 3 &port03 0 0 0 2>, + <0 0 0 4 &port03 0 0 0 3>; + }; + }; diff --git a/arch/arm64/boot/dts/apple/t600x-dieX.dtsi b/arch/arm64/boot/dt= s/apple/t600x-dieX.dtsi new file mode 100644 index 000000000000..0a437b68e86c --- /dev/null +++ b/arch/arm64/boot/dts/apple/t600x-dieX.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Devices used on both dies on the Apple T6002 "M1 Ultra" and present on + * Apple T6000/T6001 "M1 Pro/Max". + * + * Copyright The Asahi Linux Contributors + */ + + DIE_NODE(pmgr): power-management@28e080000 { + compatible =3D "apple,t6000-pmgr", "apple,pmgr", "syscon", "simple-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x2 0x8e080000 0 0x4000>; + }; + + DIE_NODE(pmgr_east): power-management@28e580000 { + compatible =3D "apple,t6000-pmgr", "apple,pmgr", "syscon", "simple-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x2 0x8e580000 0 0xc000>; + }; + + DIE_NODE(pmgr_south): power-management@28e680000 { + compatible =3D "apple,t6000-pmgr", "apple,pmgr", "syscon", "simple-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x2 0x8e680000 0 0xc000>; + }; + + DIE_NODE(pinctrl_nub): pinctrl@2921f0000 { + compatible =3D "apple,t6000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x921f0000 0x0 0x4000>; + power-domains =3D <&DIE_NODE(ps_nub_gpio)>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&DIE_NODE(pinctrl_nub) 0 0 16>; + apple,npins =3D <16>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + DIE_NODE(pmgr_mini): power-management@292280000 { + compatible =3D "apple,t6000-pmgr", "apple,pmgr", "syscon", "simple-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x2 0x92280000 0 0x4000>; + }; + + DIE_NODE(pinctrl_aop): pinctrl@293820000 { + compatible =3D "apple,t6000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x93820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&DIE_NODE(pinctrl_aop) 0 0 63>; + apple,npins =3D <63>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + DIE_NODE(pinctrl_ap): pinctrl@39b028000 { + compatible =3D "apple,t6000-pinctrl", "apple,pinctrl"; + reg =3D <0x3 0x9b028000 0x0 0x4000>; + + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + + clocks =3D <&clkref>; + power-domains =3D <&DIE_NODE(ps_gpio)>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&DIE_NODE(pinctrl_ap) 0 0 255>; + apple,npins =3D <255>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; diff --git a/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi b/arch/arm64/bo= ot/dts/apple/t600x-gpio-pins.dtsi new file mode 100644 index 000000000000..b31f1a7a2b3f --- /dev/null +++ b/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * GPIO pin mappings for Apple T600x SoCs. + * + * Copyright The Asahi Linux Contributors + */ + +&pinctrl_ap { + i2c0_pins: i2c0-pins { + pinmux =3D , + ; + }; + + i2c1_pins: i2c1-pins { + pinmux =3D , + ; + }; + + i2c2_pins: i2c2-pins { + pinmux =3D , + ; + }; + + i2c3_pins: i2c3-pins { + pinmux =3D , + ; + }; + + i2c4_pins: i2c4-pins { + pinmux =3D , + ; + }; + + i2c5_pins: i2c5-pins { + pinmux =3D , + ; + }; + + pcie_pins: pcie-pins { + pinmux =3D , + , + , + ; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t600x-nvme.dtsi b/arch/arm64/boot/dt= s/apple/t600x-nvme.dtsi new file mode 100644 index 000000000000..7dff738d317e --- /dev/null +++ b/arch/arm64/boot/dts/apple/t600x-nvme.dtsi @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * NVMe related devices for Apple T600x SoCs. + * + * Copyright The Asahi Linux Contributors + */ + + DIE_NODE(ans_mbox): mbox@38f408000 { + compatible =3D "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4"; + reg =3D <0x3 0x8f408000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + ; + interrupt-names =3D "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + power-domains =3D <&DIE_NODE(ps_ans2)>; + #mbox-cells =3D <0>; + }; + + DIE_NODE(sart): sart@393c50000 { + compatible =3D "apple,t6000-sart"; + reg =3D <0x3 0x93c50000 0x0 0x10000>; + power-domains =3D <&DIE_NODE(ps_ans2)>; + }; + + DIE_NODE(nvme): nvme@393cc0000 { + compatible =3D "apple,t6000-nvme-ans2", "apple,nvme-ans2"; + reg =3D <0x3 0x93cc0000 0x0 0x40000>, <0x3 0x8f400000 0x0 0x4000>; + reg-names =3D "nvme", "ans"; + interrupt-parent =3D <&aic>; + /* The NVME interrupt is always routed to die */ + interrupts =3D ; + mboxes =3D <&DIE_NODE(ans_mbox)>; + apple,sart =3D <&DIE_NODE(sart)>; + power-domains =3D <&DIE_NODE(ps_ans2)>, + <&DIE_NODE(ps_apcie_st_sys)>, + <&DIE_NODE(ps_apcie_st1_sys)>; + power-domain-names =3D "ans", "apcie0", "apcie1"; + resets =3D <&DIE_NODE(ps_ans2)>; + }; diff --git a/arch/arm64/boot/dts/apple/t600x-pmgr.dtsi b/arch/arm64/boot/dt= s/apple/t600x-pmgr.dtsi new file mode 100644 index 000000000000..b8daeb0368d5 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t600x-pmgr.dtsi @@ -0,0 +1,2012 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR Power domains for the Apple T6001 "M1 Max" SoC + * + * Copyright The Asahi Linux Contributors + */ + +&DIE_NODE(pmgr) { + DIE_NODE(ps_pms_bridge): power-controller@100 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x100 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms_bridge); + apple,always-on; /* Core device */ + }; + + DIE_NODE(ps_aic): power-controller@108 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(aic); + apple,always-on; /* Core device */ + }; + + DIE_NODE(ps_dwi): power-controller@110 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dwi); + apple,always-on; /* Core device */ + }; + + DIE_NODE(ps_pms): power-controller@118 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms); + apple,always-on; /* Core device */ + }; + + DIE_NODE(ps_gpio): power-controller@120 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(gpio); + power-domains =3D <&DIE_NODE(ps_pms)>, <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_soc_dpe): power-controller@128 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x128 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(soc_dpe); + apple,always-on; /* Core device */ + }; + + DIE_NODE(ps_pmgr_soc_ocla): power-controller@130 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x130 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pmgr_soc_ocla); + power-domains =3D <&DIE_NODE(ps_pms)>; + }; + + DIE_NODE(ps_pcie0_ref): power-controller@138 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pcie0_ref); + }; + + DIE_NODE(ps_pcie1_ref): power-controller@140 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pcie1_ref); + }; + + DIE_NODE(ps_apcie_st): power-controller@148 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_st); + power-domains =3D <&DIE_NODE(ps_pcie1_ref)>; + }; + + DIE_NODE(ps_apcie_gp): power-controller@150 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_gp); + power-domains =3D <&DIE_NODE(ps_pcie0_ref)>; + }; + + DIE_NODE(ps_devc0_ivdmc): power-controller@180 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x180 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(devc0_ivdmc); + }; + + DIE_NODE(ps_amcc0): power-controller@188 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x188 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc0); + apple,always-on; /* Memory controller */ + }; + + DIE_NODE(ps_amcc2): power-controller@190 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x190 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc2); + apple,always-on; /* Memory controller */ + }; + + DIE_NODE(ps_dcs_00): power-controller@198 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x198 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_00); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_01): power-controller@1a0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_01); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_02): power-controller@1a8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_02); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_03): power-controller@1b0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_03); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_08): power-controller@1b8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_08); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_09): power-controller@1c0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_09); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_10): power-controller@1c8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_10); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_11): power-controller@1d0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_11); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_afi): power-controller@1d8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afi); + apple,always-on; /* Apple Fabric, CPU interface is here */ + }; + + DIE_NODE(ps_afc): power-controller@1e0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afc); + apple,always-on; /* Apple Fabric, CPU interface is here */ + }; + + DIE_NODE(ps_afr): power-controller@1e8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afr); + /* Apple Fabric, media DIE_NODE(stuff): this can power down */ + }; + + DIE_NODE(ps_afnc1_ioa): power-controller@1f0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc1_ioa); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_afnc0_ioa): power-controller@1f8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc0_ioa); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_afnc1_ls): power-controller@200 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x200 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc1_ls); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc1_ioa)>; + }; + + DIE_NODE(ps_afnc0_ls): power-controller@208 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x208 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc0_ls); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc0_ioa)>; + }; + + DIE_NODE(ps_afnc1_lw0): power-controller@210 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x210 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc1_lw0); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc1_ls)>; + }; + + DIE_NODE(ps_afnc1_lw1): power-controller@218 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x218 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc1_lw1); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc1_ls)>; + }; + + DIE_NODE(ps_afnc1_lw2): power-controller@220 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x220 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc1_lw2); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc1_ls)>; + }; + + DIE_NODE(ps_afnc0_lw0): power-controller@228 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x228 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc0_lw0); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc0_ls)>; + }; + + DIE_NODE(ps_scodec): power-controller@230 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x230 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(scodec); + power-domains =3D <&DIE_NODE(ps_afnc1_lw0)>; + }; + + DIE_NODE(ps_atc0_common): power-controller@238 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x238 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_common); + power-domains =3D <&DIE_NODE(ps_afnc1_lw1)>; + }; + + DIE_NODE(ps_atc1_common): power-controller@240 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x240 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_common); + power-domains =3D <&DIE_NODE(ps_afnc1_lw1)>; + }; + + DIE_NODE(ps_c0_usb31drd): power-controller@248 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x248 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(c0_usb31drd); + power-domains =3D <&DIE_NODE(ps_usb)>; + }; + + DIE_NODE(ps_c1_usb31drd): power-controller@250 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(c1_usb31drd); + power-domains =3D <&DIE_NODE(ps_usb)>; + }; + + DIE_NODE(ps_dispext0_fe): power-controller@258 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x258 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext0_fe); + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_dispext1_fe): power-controller@260 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x260 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext1_fe); + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_ane_sys): power-controller@268 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x268 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ane_sys); + power-domains =3D <&DIE_NODE(ps_afr)>; + }; + + DIE_NODE(ps_avd_sys): power-controller@270 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x270 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(avd_sys); + power-domains =3D <&DIE_NODE(ps_afr)>; + }; + + DIE_NODE(ps_dispext0_cpu0): power-controller@280 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x280 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext0_cpu0); + power-domains =3D <&DIE_NODE(ps_dispext0_fe)>; + }; + + DIE_NODE(ps_dispext1_cpu0): power-controller@2a8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext1_cpu0); + power-domains =3D <&DIE_NODE(ps_dispext1_fe)>; + }; + + DIE_NODE(ps_ane_sys_cpu): power-controller@2c8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ane_sys_cpu); + power-domains =3D <&DIE_NODE(ps_ane_sys)>; + }; + +#if DIE_NO =3D=3D 0 + /* PMP is only present on die 0 of the M1 Ultra */ + DIE_NODE(ps_pmp): power-controller@2d8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pmp); + }; +#endif + + DIE_NODE(ps_pms_sram): power-controller@2e0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms_sram); + }; + + DIE_NODE(ps_apcie_st_sys): power-controller@2e8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_st_sys); + power-domains =3D <&DIE_NODE(ps_apcie_st)>, <&DIE_NODE(ps_ans2)>; + }; + + DIE_NODE(ps_apcie_st1_sys): power-controller@2f0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_st1_sys); + power-domains =3D <&DIE_NODE(ps_apcie_st)>, <&DIE_NODE(ps_ans2)>; + }; + + DIE_NODE(ps_atc2_common): power-controller@2f8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_common); + power-domains =3D <&DIE_NODE(ps_afnc1_lw1)>; + }; + + DIE_NODE(ps_atc3_common): power-controller@300 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x300 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_common); + power-domains =3D <&DIE_NODE(ps_afnc1_lw1)>; + }; + + DIE_NODE(ps_usb): power-controller@318 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x318 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(usb); + power-domains =3D <&DIE_NODE(ps_afnc1_lw2)>; + }; + + DIE_NODE(ps_apcie_gp_sys): power-controller@320 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x320 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_gp_sys); + power-domains =3D <&DIE_NODE(ps_afnc1_lw2)>, <&DIE_NODE(ps_apcie_gp)>; + apple,always-on; /* Breaks things if shut down */ + }; + + DIE_NODE(ps_atc0_cio): power-controller@328 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x328 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_cio); + power-domains =3D <&DIE_NODE(ps_atc0_common)>; + }; + + DIE_NODE(ps_atc0_pcie): power-controller@330 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x330 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_pcie); + power-domains =3D <&DIE_NODE(ps_atc0_common)>; + }; + + DIE_NODE(ps_atc1_cio): power-controller@338 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x338 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_cio); + power-domains =3D <&DIE_NODE(ps_atc1_common)>; + }; + + DIE_NODE(ps_atc1_pcie): power-controller@340 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x340 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_pcie); + power-domains =3D <&DIE_NODE(ps_atc1_common)>; + }; + + DIE_NODE(ps_atc2_cio): power-controller@348 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x348 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_cio); + power-domains =3D <&DIE_NODE(ps_atc2_common)>; + }; + + DIE_NODE(ps_atc2_pcie): power-controller@350 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x350 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_pcie); + power-domains =3D <&DIE_NODE(ps_atc2_common)>; + }; + + DIE_NODE(ps_atc3_cio): power-controller@358 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x358 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_cio); + power-domains =3D <&DIE_NODE(ps_atc3_common)>; + }; + + DIE_NODE(ps_atc3_pcie): power-controller@360 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x360 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_pcie); + power-domains =3D <&DIE_NODE(ps_atc3_common)>; + }; + + DIE_NODE(ps_c0_usbctl): power-controller@368 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x368 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(c0_usbctl); + power-domains =3D <&DIE_NODE(ps_usb)>; + }; + + DIE_NODE(ps_c1_usbctl): power-controller@370 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x370 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(c1_usbctl); + power-domains =3D <&DIE_NODE(ps_usb)>; + }; + + DIE_NODE(ps_atc0_cio_pcie): power-controller@378 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x378 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_cio_pcie); + power-domains =3D <&DIE_NODE(ps_atc0_cio)>; + }; + + DIE_NODE(ps_atc0_cio_usb): power-controller@380 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x380 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_cio_usb); + power-domains =3D <&DIE_NODE(ps_atc0_cio)>; + }; + + DIE_NODE(ps_atc1_cio_pcie): power-controller@388 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x388 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_cio_pcie); + power-domains =3D <&DIE_NODE(ps_atc1_cio)>; + }; + + DIE_NODE(ps_atc1_cio_usb): power-controller@390 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x390 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_cio_usb); + power-domains =3D <&DIE_NODE(ps_atc1_cio)>; + }; + + DIE_NODE(ps_atc2_cio_pcie): power-controller@398 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x398 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_cio_pcie); + power-domains =3D <&DIE_NODE(ps_atc2_cio)>; + }; + + DIE_NODE(ps_atc2_cio_usb): power-controller@3a0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x3a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_cio_usb); + power-domains =3D <&DIE_NODE(ps_atc2_cio)>; + }; + + DIE_NODE(ps_atc3_cio_pcie): power-controller@3a8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x3a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_cio_pcie); + power-domains =3D <&DIE_NODE(ps_atc3_cio)>; + }; + + DIE_NODE(ps_atc3_cio_usb): power-controller@3b0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x3b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_cio_usb); + power-domains =3D <&DIE_NODE(ps_atc3_cio)>; + }; + + DIE_NODE(ps_trace_fab): power-controller@3b8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x3b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(trace_fab); + }; +}; + +&DIE_NODE(pmgr_east) { + DIE_NODE(ps_clvr_spmi0): power-controller@100 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x100 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(clvr_spmi0); + apple,always-on; /* PCPU voltage regulator interface (used by SMC) */ + }; + + DIE_NODE(ps_clvr_spmi1): power-controller@108 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(clvr_spmi1); + apple,always-on; /* GPU voltage regulator interface (used by SMC) */ + }; + + DIE_NODE(ps_clvr_spmi2): power-controller@110 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(clvr_spmi2); + apple,always-on; /* ANE, fabric, AFR voltage regulator interface (used b= y SMC) */ + }; + + DIE_NODE(ps_clvr_spmi3): power-controller@118 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(clvr_spmi3); + apple,always-on; /* Additional voltage regulator, probably used on T6001= (SMC) */ + }; + + DIE_NODE(ps_clvr_spmi4): power-controller@120 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(clvr_spmi4); + apple,always-on; /* Additional voltage regulator, probably used on T6001= (SMC) */ + }; + + DIE_NODE(ps_ispsens0): power-controller@128 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x128 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ispsens0); + }; + + DIE_NODE(ps_ispsens1): power-controller@130 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x130 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ispsens1); + }; + + DIE_NODE(ps_ispsens2): power-controller@138 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ispsens2); + }; + + DIE_NODE(ps_ispsens3): power-controller@140 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ispsens3); + }; + + DIE_NODE(ps_afnc2_ioa): power-controller@148 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc2_ioa); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_afnc2_ls): power-controller@150 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc2_ls); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc2_ioa)>; + }; + + DIE_NODE(ps_afnc2_lw0): power-controller@158 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc2_lw0); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc2_ls)>; + }; + + DIE_NODE(ps_afnc2_lw1): power-controller@160 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x160 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc2_lw1); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc2_ls)>; + }; + + DIE_NODE(ps_afnc3_ioa): power-controller@168 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x168 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc3_ioa); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_afnc3_ls): power-controller@170 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x170 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc3_ls); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc3_ioa)>; + }; + + DIE_NODE(ps_afnc3_lw0): power-controller@178 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x178 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc3_lw0); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc3_ls)>; + }; + + DIE_NODE(ps_sio): power-controller@180 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x180 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sio); + power-domains =3D <&DIE_NODE(ps_afnc2_lw1)>; + }; + + DIE_NODE(ps_sio_cpu): power-controller@188 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x188 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sio_cpu); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_fpwm0): power-controller@190 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x190 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(fpwm0); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_fpwm1): power-controller@198 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x198 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(fpwm1); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_fpwm2): power-controller@1a0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(fpwm2); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c0): power-controller@1a8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c0); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c1): power-controller@1b0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c1); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c2): power-controller@1b8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c2); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c3): power-controller@1c0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c3); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c4): power-controller@1c8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c4); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c5): power-controller@1d0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c5); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c6): power-controller@1d8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c6); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c7): power-controller@1e0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c7); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_spi_p): power-controller@1e8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi_p); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_spi0): power-controller@1f0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi0); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_spi1): power-controller@1f8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi1); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_spi2): power-controller@200 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x200 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi2); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_spi3): power-controller@208 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x208 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi3); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_spi4): power-controller@210 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x210 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi4); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_sio_spmi0): power-controller@218 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x218 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sio_spmi0); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_sio_spmi1): power-controller@220 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x220 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sio_spmi1); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_sio_spmi2): power-controller@228 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x228 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sio_spmi2); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_uart_p): power-controller@230 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x230 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart_p); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_uart_n): power-controller@238 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x238 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart_n); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart0): power-controller@240 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x240 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart0); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart1): power-controller@248 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x248 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart1); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart2): power-controller@250 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart2); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart3): power-controller@258 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x258 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart3); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart4): power-controller@260 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x260 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart4); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart6): power-controller@268 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x268 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart6); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart7): power-controller@270 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x270 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart7); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_audio_p): power-controller@278 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x278 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(audio_p); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_sio_adma): power-controller@280 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x280 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sio_adma); + power-domains =3D <&DIE_NODE(ps_audio_p)>, <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_mca0): power-controller@288 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x288 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mca0); + power-domains =3D <&DIE_NODE(ps_audio_p)>, <&DIE_NODE(ps_sio_adma)>; + }; + + DIE_NODE(ps_mca1): power-controller@290 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x290 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mca1); + power-domains =3D <&DIE_NODE(ps_audio_p)>, <&DIE_NODE(ps_sio_adma)>; + }; + + DIE_NODE(ps_mca2): power-controller@298 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x298 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mca2); + power-domains =3D <&DIE_NODE(ps_audio_p)>, <&DIE_NODE(ps_sio_adma)>; + }; + + DIE_NODE(ps_mca3): power-controller@2a0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mca3); + power-domains =3D <&DIE_NODE(ps_audio_p)>, <&DIE_NODE(ps_sio_adma)>; + }; + + DIE_NODE(ps_dpa0): power-controller@2a8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dpa0); + power-domains =3D <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_dpa1): power-controller@2b0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dpa1); + power-domains =3D <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_dpa2): power-controller@2b8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dpa2); + power-domains =3D <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_dpa3): power-controller@2c0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dpa3); + power-domains =3D <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_dpa4): power-controller@2c8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dpa4); + power-domains =3D <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_aes): power-controller@2d0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(aes); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_amcc1): power-controller@2d8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc1); + apple,always-on; /* Memory controller */ + }; + + DIE_NODE(ps_amcc3): power-controller@2e0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc3); + apple,always-on; /* Memory controller */ + }; + + DIE_NODE(ps_dcs_04): power-controller@2e8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_04); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_05): power-controller@2f0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_05); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_06): power-controller@2f8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x2f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_06); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_07): power-controller@300 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x300 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_07); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_12): power-controller@308 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x308 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_12); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_13): power-controller@310 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x310 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_13); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_14): power-controller@318 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x318 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_14); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_15): power-controller@320 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x320 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_15); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_disp0_fe): power-controller@328 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x328 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(disp0_fe); + power-domains =3D <&DIE_NODE(ps_afnc2_lw0)>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + DIE_NODE(ps_disp0_cpu0): power-controller@350 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x350 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(disp0_cpu0); + power-domains =3D <&DIE_NODE(ps_disp0_fe)>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + apple,min-state =3D <4>; + }; + + DIE_NODE(ps_dispdfr_fe): power-controller@378 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x378 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispdfr_fe); + power-domains =3D <&DIE_NODE(ps_afnc2_lw1)>; + }; + + DIE_NODE(ps_dispdfr_be): power-controller@380 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x380 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispdfr_be); + power-domains =3D <&DIE_NODE(ps_dispdfr_fe)>; + }; + + DIE_NODE(ps_mipi_dsi): power-controller@388 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x388 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mipi_dsi); + power-domains =3D <&DIE_NODE(ps_dispdfr_be)>; + }; + + DIE_NODE(ps_jpg): power-controller@390 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x390 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(jpg); + power-domains =3D <&DIE_NODE(ps_afr)>; + }; + + DIE_NODE(ps_msr0): power-controller@398 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x398 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(msr0); + power-domains =3D <&DIE_NODE(ps_afr)>; + }; + + DIE_NODE(ps_msr0_ase_core): power-controller@3a0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x3a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(msr0_ase_core); + power-domains =3D <&DIE_NODE(ps_msr0)>; + }; + + DIE_NODE(ps_isp_sys): power-controller@3a8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x3a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(isp_sys); + power-domains =3D <&DIE_NODE(ps_afnc2_lw1)>; + }; + + DIE_NODE(ps_venc_sys): power-controller@3b0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x3b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc_sys); + power-domains =3D <&DIE_NODE(ps_afr)>; + }; + + DIE_NODE(ps_ans2): power-controller@3b8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x3b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ans2); + /* + * The ADT makes ps_apcie_st[1]_sys depend on ps_ans2 instead, + * but we'd rather have a single power domain for the downstream + * device to depend on, so use this node as the child. + * This makes more sense anyway (since ANS2 uses APCIE_ST). + */ + power-domains =3D <&DIE_NODE(ps_afnc2_lw0)>; + }; + + DIE_NODE(ps_gfx): power-controller@3c0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x3c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(gfx); + power-domains =3D <&DIE_NODE(ps_afr)>; + }; + + DIE_NODE(ps_sep): power-controller@c00 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xc00 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sep); + apple,always-on; /* Locked on */ + }; + + DIE_NODE(ps_venc_dma): power-controller@8000 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x8000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc_dma); + power-domains =3D <&DIE_NODE(ps_venc_sys)>; + }; + + DIE_NODE(ps_venc_pipe4): power-controller@8008 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x8008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc_pipe4); + power-domains =3D <&DIE_NODE(ps_venc_dma)>; + }; + + DIE_NODE(ps_venc_pipe5): power-controller@8010 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x8010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc_pipe5); + power-domains =3D <&DIE_NODE(ps_venc_dma)>; + }; + + DIE_NODE(ps_venc_me0): power-controller@8018 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x8018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc_me0); + power-domains =3D <&DIE_NODE(ps_venc_pipe5)>, <&DIE_NODE(ps_venc_pipe4)>; + }; + + DIE_NODE(ps_venc_me1): power-controller@8020 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x8020 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc_me1); + power-domains =3D <&DIE_NODE(ps_venc_me0)>; + }; +}; + +&DIE_NODE(pmgr_south) { + DIE_NODE(ps_amcc4): power-controller@100 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x100 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc4); + apple,always-on; /* Memory controller */ + }; + + DIE_NODE(ps_amcc5): power-controller@108 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc5); + apple,always-on; /* Memory controller */ + }; + + DIE_NODE(ps_amcc6): power-controller@110 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc6); + apple,always-on; /* Memory controller */ + }; + + DIE_NODE(ps_amcc7): power-controller@118 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc7); + apple,always-on; /* Memory controller */ + }; + + DIE_NODE(ps_dcs_16): power-controller@120 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_16); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_17): power-controller@128 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x128 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_17); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_18): power-controller@130 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x130 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_18); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_19): power-controller@138 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_19); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_20): power-controller@140 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_20); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_21): power-controller@148 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_21); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_22): power-controller@150 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_22); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_23): power-controller@158 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_23); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_24): power-controller@160 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x160 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_24); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_25): power-controller@168 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x168 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_25); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_26): power-controller@170 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x170 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_26); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_27): power-controller@178 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x178 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_27); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_28): power-controller@180 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x180 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_28); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_29): power-controller@188 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x188 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_29); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_30): power-controller@190 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x190 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_30); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_dcs_31): power-controller@198 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x198 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_31); + apple,always-on; /* LPDDR5 interface */ + }; + + DIE_NODE(ps_afnc4_ioa): power-controller@1a0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc4_ioa); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_afnc4_ls): power-controller@1a8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc4_ls); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc4_ioa)>; + }; + + DIE_NODE(ps_afnc4_lw0): power-controller@1b0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc4_lw0); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc4_ls)>; + }; + + DIE_NODE(ps_afnc5_ioa): power-controller@1b8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc5_ioa); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_afnc5_ls): power-controller@1c0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc5_ls); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc5_ioa)>; + }; + + DIE_NODE(ps_afnc5_lw0): power-controller@1c8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc5_lw0); + apple,always-on; /* Apple Fabric */ + power-domains =3D <&DIE_NODE(ps_afnc5_ls)>; + }; + + DIE_NODE(ps_dispext2_fe): power-controller@1d0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext2_fe); + power-domains =3D <&DIE_NODE(ps_afnc4_lw0)>; + }; + + DIE_NODE(ps_dispext2_cpu0): power-controller@1e8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x1e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext2_cpu0); + power-domains =3D <&DIE_NODE(ps_dispext2_fe)>; + }; + + DIE_NODE(ps_dispext3_fe): power-controller@210 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x210 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext3_fe); + power-domains =3D <&DIE_NODE(ps_afnc4_lw0)>; + }; + + DIE_NODE(ps_dispext3_cpu0): power-controller@228 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x228 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext3_cpu0); + power-domains =3D <&DIE_NODE(ps_dispext3_fe)>; + }; + + DIE_NODE(ps_msr1): power-controller@250 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(msr1); + power-domains =3D <&DIE_NODE(ps_afnc5_lw0)>, <&DIE_NODE(ps_afr)>; + }; + + DIE_NODE(ps_msr1_ase_core): power-controller@258 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x258 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(msr1_ase_core); + power-domains =3D <&DIE_NODE(ps_msr1)>; + }; + + DIE_NODE(ps_venc1_sys): power-controller@260 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x260 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_sys); + power-domains =3D <&DIE_NODE(ps_afnc5_lw0)>, <&DIE_NODE(ps_afr)>; + }; + + /* Seems to be disabled on shipping hardware */ +#if 0 + DIE_NODE(ps_ane1_sys): power-controller@268 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x268 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ane1_sys); + power-domains =3D <&DIE_NODE(ps_afnc5_lw0)>; + }; + + DIE_NODE(ps_ane1_sys_cpu): power-controller@270 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x270 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ane1_sys_cpu); + power-domains =3D <&DIE_NODE(ps_ane1_sys)>; + }; +#endif + + DIE_NODE(ps_venc1_dma): power-controller@8000 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x8000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_dma); + power-domains =3D <&DIE_NODE(ps_venc1_sys)>; + }; + + DIE_NODE(ps_venc1_pipe4): power-controller@8008 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x8008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_pipe4); + power-domains =3D <&DIE_NODE(ps_venc1_dma)>; + }; + + DIE_NODE(ps_venc1_pipe5): power-controller@8010 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x8010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_pipe5); + power-domains =3D <&DIE_NODE(ps_venc1_dma)>; + }; + + DIE_NODE(ps_venc1_me0): power-controller@8018 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x8018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_me0); + power-domains =3D <&DIE_NODE(ps_venc1_pipe4)>, <&DIE_NODE(ps_venc1_pipe5= )>; + }; + + DIE_NODE(ps_venc1_me1): power-controller@8020 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x8020 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_me1); + power-domains =3D <&DIE_NODE(ps_venc1_me0)>; + }; + + DIE_NODE(ps_prores): power-controller@c000 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xc000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(prores); + power-domains =3D <&DIE_NODE(ps_afnc4_lw0)>; + }; +}; + +&DIE_NODE(pmgr_mini) { + DIE_NODE(ps_debug): power-controller@58 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x58 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(debug); + apple,always-on; /* Core AON device */ + }; + + DIE_NODE(ps_nub_spmi0): power-controller@60 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x60 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi0); + apple,always-on; /* Core AON device */ + }; + + DIE_NODE(ps_nub_spmi1): power-controller@68 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x68 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi1); + apple,always-on; /* Core AON device */ + }; + + DIE_NODE(ps_nub_aon): power-controller@70 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x70 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_aon); + apple,always-on; /* Core AON device */ + }; + + DIE_NODE(ps_msg): power-controller@78 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x78 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(msg); + }; + + DIE_NODE(ps_nub_gpio): power-controller@80 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x80 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_gpio); + apple,always-on; /* Core AON device */ + }; + + DIE_NODE(ps_atc0_usb_aon): power-controller@88 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x88 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_usb_aon); + apple,always-on; /* Needs to stay on for dwc3 to work */ + }; + + DIE_NODE(ps_atc1_usb_aon): power-controller@90 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x90 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_usb_aon); + apple,always-on; /* Needs to stay on for dwc3 to work */ + }; + + DIE_NODE(ps_atc2_usb_aon): power-controller@98 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x98 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_usb_aon); + apple,always-on; /* Needs to stay on for dwc3 to work */ + }; + + DIE_NODE(ps_atc3_usb_aon): power-controller@a0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xa0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_usb_aon); + apple,always-on; /* Needs to stay on for dwc3 to work */ + }; + + DIE_NODE(ps_gp_usb_aon): power-controller@a8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xa8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(gp_usb_aon); + }; + + DIE_NODE(ps_nub_fabric): power-controller@b0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xb0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_fabric); + apple,always-on; /* Core AON device */ + }; + + DIE_NODE(ps_nub_sram): power-controller@b8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xb8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_sram); + apple,always-on; /* Core AON device */ + }; + + DIE_NODE(ps_debug_usb): power-controller@c0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xc0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(debug_usb); + apple,always-on; /* Core AON device */ + power-domains =3D <&DIE_NODE(ps_debug)>; + }; + + DIE_NODE(ps_debug_auth): power-controller@c8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xc8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(debug_auth); + apple,always-on; /* Core AON device */ + power-domains =3D <&DIE_NODE(ps_debug)>; + }; + + DIE_NODE(ps_atc0_usb): power-controller@d0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xd0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_usb); + power-domains =3D <&DIE_NODE(ps_atc0_usb_aon)>, <&DIE_NODE(ps_atc0_commo= n)>; + }; + + DIE_NODE(ps_atc1_usb): power-controller@d8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xd8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_usb); + power-domains =3D <&DIE_NODE(ps_atc1_usb_aon)>, <&DIE_NODE(ps_atc1_commo= n)>; + }; + + DIE_NODE(ps_atc2_usb): power-controller@e0 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xe0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_usb); + power-domains =3D <&DIE_NODE(ps_atc2_usb_aon)>, <&DIE_NODE(ps_atc2_commo= n)>; + }; + + DIE_NODE(ps_atc3_usb): power-controller@e8 { + compatible =3D "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0xe8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_usb); + power-domains =3D <&DIE_NODE(ps_atc3_usb_aon)>, <&DIE_NODE(ps_atc3_commo= n)>; + }; +}; --=20 2.35.1 From nobody Wed Apr 8 12:59:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A0A0ECAAA1 for ; Fri, 9 Sep 2022 13:52:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230171AbiIINwP (ORCPT ); Fri, 9 Sep 2022 09:52:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35184 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230181AbiIINvd (ORCPT ); Fri, 9 Sep 2022 09:51:33 -0400 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3F79142D8C; Fri, 9 Sep 2022 06:51:24 -0700 (PDT) Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id EA8E926EFF0; Fri, 9 Sep 2022 15:51:06 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Hector Martin , Alyssa Rosenzweig , Krzysztof Kozlowski , Rob Herring , Sven Peter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 07/10] arm64: dts: apple: Add J314 and J316 devicetrees Date: Fri, 9 Sep 2022 15:51:00 +0200 Message-Id: <20220909135103.98179-8-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Hector Martin These are the 14-inch and 16-inch 2021 MacBooks, in both M1 Pro and M1 Max variants (t6000 and t6001). Signed-off-by: Hector Martin Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/Makefile | 4 + arch/arm64/boot/dts/apple/t6000-j314s.dts | 18 +++ arch/arm64/boot/dts/apple/t6000-j316s.dts | 18 +++ arch/arm64/boot/dts/apple/t6001-j314c.dts | 18 +++ arch/arm64/boot/dts/apple/t6001-j316c.dts | 18 +++ .../arm64/boot/dts/apple/t600x-j314-j316.dtsi | 110 ++++++++++++++++++ 6 files changed, 186 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t6000-j314s.dts create mode 100644 arch/arm64/boot/dts/apple/t6000-j316s.dts create mode 100644 arch/arm64/boot/dts/apple/t6001-j314c.dts create mode 100644 arch/arm64/boot/dts/apple/t6001-j316c.dts create mode 100644 arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index c0510c25ca6a..b021931b0a17 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -4,3 +4,7 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j313.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j456.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j457.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6000-j314s.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6001-j314c.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6000-j316s.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6001-j316c.dtb diff --git a/arch/arm64/boot/dts/apple/t6000-j314s.dts b/arch/arm64/boot/dt= s/apple/t6000-j314s.dts new file mode 100644 index 000000000000..c9e192848fe3 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6000-j314s.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (14-inch, M1 Pro, 2021) + * + * target-type: J314s + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6000.dtsi" +#include "t600x-j314-j316.dtsi" + +/ { + compatible =3D "apple,j314s", "apple,t6000", "apple,arm-platform"; + model =3D "Apple MacBook Pro (14-inch, M1 Pro, 2021)"; +}; diff --git a/arch/arm64/boot/dts/apple/t6000-j316s.dts b/arch/arm64/boot/dt= s/apple/t6000-j316s.dts new file mode 100644 index 000000000000..ff1803ce2300 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6000-j316s.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (16-inch, M1 Pro, 2021) + * + * target-type: J316s + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6000.dtsi" +#include "t600x-j314-j316.dtsi" + +/ { + compatible =3D "apple,j316s", "apple,t6000", "apple,arm-platform"; + model =3D "Apple MacBook Pro (16-inch, M1 Pro, 2021)"; +}; diff --git a/arch/arm64/boot/dts/apple/t6001-j314c.dts b/arch/arm64/boot/dt= s/apple/t6001-j314c.dts new file mode 100644 index 000000000000..1761d15b98c1 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6001-j314c.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (14-inch, M1 Max, 2021) + * + * target-type: J314c + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6001.dtsi" +#include "t600x-j314-j316.dtsi" + +/ { + compatible =3D "apple,j314c", "apple,t6001", "apple,arm-platform"; + model =3D "Apple MacBook Pro (14-inch, M1 Max, 2021)"; +}; diff --git a/arch/arm64/boot/dts/apple/t6001-j316c.dts b/arch/arm64/boot/dt= s/apple/t6001-j316c.dts new file mode 100644 index 000000000000..750e9beeffc0 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6001-j316c.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (16-inch, M1 Max, 2021) + * + * target-type: J316c + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6001.dtsi" +#include "t600x-j314-j316.dtsi" + +/ { + compatible =3D "apple,j316c", "apple,t6001", "apple,arm-platform"; + model =3D "Apple MacBook Pro (16-inch, M1 Max, 2021)"; +}; diff --git a/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi b/arch/arm64/bo= ot/dts/apple/t600x-j314-j316.dtsi new file mode 100644 index 000000000000..8079200aeb12 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (14/16-inch, 2021) + * + * This file contains the parts common to J314 and J316 devices with both = t6000 and t6001. + * + * target-type: J314s / J314c / J316s / J316c + * + * Copyright The Asahi Linux Contributors + */ + +/ { + aliases { + serial0 =3D &serial0; + wifi0 =3D &wifi0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + memory@10000000000 { + device_type =3D "memory"; + reg =3D <0x100 0 0x2 0>; /* To be filled by loader */ + }; +}; + +&serial0 { + status =3D "okay"; +}; + +/* USB Type C */ +&i2c0 { + hpm0: usb-pd@38 { + compatible =3D "apple,cd321x"; + reg =3D <0x38>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <174 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; + + hpm1: usb-pd@3f { + compatible =3D "apple,cd321x"; + reg =3D <0x3f>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <174 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; + + hpm2: usb-pd@3b { + compatible =3D "apple,cd321x"; + reg =3D <0x3b>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <174 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; + + /* MagSafe port */ + hpm5: usb-pd@3a { + compatible =3D "apple,cd321x"; + reg =3D <0x3a>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <174 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; +}; + +/* PCIe devices */ +&port00 { + /* WLAN */ + bus-range =3D <1 1>; + wifi0: wifi@0,0 { + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-mac-address =3D [00 10 18 00 00 10]; + }; +}; + +&port01 { + /* SD card reader */ + bus-range =3D <2 2>; + sdhci0: mmc@0,0 { + compatible =3D "pci17a0,9755"; + reg =3D <0x20000 0x0 0x0 0x0 0x0>; + cd-inverted; + wp-inverted; + }; +}; + +&pcie0_dart_2 { + status =3D "disabled"; +}; + +&pcie0_dart_3 { + status =3D "disabled"; +}; + +/delete-node/ &port02; +/delete-node/ &port03; --=20 2.35.1 From nobody Wed Apr 8 12:59:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35469C6FA82 for ; Fri, 9 Sep 2022 13:52:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229596AbiIINwS (ORCPT ); Fri, 9 Sep 2022 09:52:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231326AbiIINvi (ORCPT ); Fri, 9 Sep 2022 09:51:38 -0400 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3D77142D82; Fri, 9 Sep 2022 06:51:24 -0700 (PDT) Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id 6252C26EFF1; Fri, 9 Sep 2022 15:51:07 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Alyssa Rosenzweig , Hector Martin , Krzysztof Kozlowski , Rob Herring , Sven Peter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 08/10] arm64: dts: apple: Add J375 devicetrees Date: Fri, 9 Sep 2022 15:51:01 +0200 Message-Id: <20220909135103.98179-9-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" These are the Mac Studio devices with M1 Max (t6001) and M1 Ultra (t6002). Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/Makefile | 2 + arch/arm64/boot/dts/apple/t6001-j375c.dts | 18 ++++ arch/arm64/boot/dts/apple/t6002-j375d.dts | 50 ++++++++++ arch/arm64/boot/dts/apple/t600x-j375.dtsi | 115 ++++++++++++++++++++++ 4 files changed, 185 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t6001-j375c.dts create mode 100644 arch/arm64/boot/dts/apple/t6002-j375d.dts create mode 100644 arch/arm64/boot/dts/apple/t600x-j375.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index b021931b0a17..5a7506ff5ea3 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -8,3 +8,5 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t6000-j314s.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6001-j314c.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6000-j316s.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6001-j316c.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6001-j375c.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6002-j375d.dtb diff --git a/arch/arm64/boot/dts/apple/t6001-j375c.dts b/arch/arm64/boot/dt= s/apple/t6001-j375c.dts new file mode 100644 index 000000000000..62ea437b58b2 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6001-j375c.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Mac Studio (M1 Max, 2022) + * + * target-type: J375c + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6001.dtsi" +#include "t600x-j375.dtsi" + +/ { + compatible =3D "apple,j375c", "apple,t6001", "apple,arm-platform"; + model =3D "Apple Mac Studio (M1 Max, 2022)"; +}; diff --git a/arch/arm64/boot/dts/apple/t6002-j375d.dts b/arch/arm64/boot/dt= s/apple/t6002-j375d.dts new file mode 100644 index 000000000000..3365429bdc8b --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6002-j375d.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Mac Studio (M1 Ultra, 2022) + * + * target-type: J375d + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6002.dtsi" +#include "t600x-j375.dtsi" + +/ { + compatible =3D "apple,j375d", "apple,t6002", "apple,arm-platform"; + model =3D "Apple Mac Studio (M1 Ultra, 2022)"; +}; + +/* USB Type C */ +&i2c0 { + /* front-right */ + hpm4: usb-pd@39 { + compatible =3D "apple,cd321x"; + reg =3D <0x39>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <174 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; + + /* front-left */ + hpm5: usb-pd@3a { + compatible =3D "apple,cd321x"; + reg =3D <0x3a>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <174 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; +}; + +/* delete unused always-on power-domains on die 1 */ + +/delete-node/ &ps_atc2_usb_aon_die1; +/delete-node/ &ps_atc2_usb_die1; + +/delete-node/ &ps_atc3_usb_aon_die1; +/delete-node/ &ps_atc3_usb_die1; + +/delete-node/ &ps_disp0_cpu0_die1; +/delete-node/ &ps_disp0_fe_die1; diff --git a/arch/arm64/boot/dts/apple/t600x-j375.dtsi b/arch/arm64/boot/dt= s/apple/t600x-j375.dtsi new file mode 100644 index 000000000000..c5444cb34389 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t600x-j375.dtsi @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Mac Studio (2022) + * + * This file contains the parts common to J375 devices with both t6001 and= t6002. + * + * target-type: J375c / J375d + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +/ { + aliases { + serial0 =3D &serial0; + wifi0 =3D &wifi0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + memory@10000000000 { + device_type =3D "memory"; + reg =3D <0x100 0 0x2 0>; /* To be filled by loader */ + }; +}; + +&serial0 { + status =3D "okay"; +}; + +/* USB Type C */ +&i2c0 { + hpm0: usb-pd@38 { + compatible =3D "apple,cd321x"; + reg =3D <0x38>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <174 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; + + hpm1: usb-pd@3f { + compatible =3D "apple,cd321x"; + reg =3D <0x3f>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <174 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; + + hpm2: usb-pd@3b { + compatible =3D "apple,cd321x"; + reg =3D <0x3b>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <174 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; + + hpm3: usb-pd@3c { + compatible =3D "apple,cd321x"; + reg =3D <0x3c>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <174 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; +}; + +/* PCIe devices */ +&port00 { + /* WLAN */ + bus-range =3D <1 1>; + wifi0: wifi@0,0 { + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-mac-address =3D [00 10 18 00 00 10]; + }; +}; + +&port01 { + /* SD card reader */ + bus-range =3D <2 2>; + sdhci0: mmc@0,0 { + compatible =3D "pci17a0,9755"; + reg =3D <0x20000 0x0 0x0 0x0 0x0>; + cd-inverted; + wp-inverted; + }; +}; + +&port02 { + /* 10 Gbit Ethernet */ + bus-range =3D <3 3>; + ethernet0: ethernet@0,0 { + reg =3D <0x30000 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-mac-address =3D [00 10 18 00 00 00]; + }; +}; + +&port03 { + /* USB xHCI */ + bus-range =3D <4 4>; +}; --=20 2.35.1 From nobody Wed Apr 8 12:59:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5D08ECAAD3 for ; Fri, 9 Sep 2022 13:52:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231987AbiIINwV (ORCPT ); Fri, 9 Sep 2022 09:52:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231825AbiIINvi (ORCPT ); Fri, 9 Sep 2022 09:51:38 -0400 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F40B2142D8F; Fri, 9 Sep 2022 06:51:24 -0700 (PDT) Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id CF35A26EFF2; Fri, 9 Sep 2022 15:51:07 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , =?UTF-8?q?Martin=20Povi=C5=A1er?= , Alyssa Rosenzweig , Hector Martin , Krzysztof Kozlowski , Rob Herring , Sven Peter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 09/10] arm64: dts: apple: t8103: Add MCA and its support Date: Fri, 9 Sep 2022 15:51:02 +0200 Message-Id: <20220909135103.98179-10-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Martin Povi=C3=85=C2=A1er Add the MCA I2S transceiver node and its supporting NCO, ADMAC nodes. Signed-off-by: Martin Povi=C5=A1er Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/t8103-jxxx.dtsi | 4 ++ arch/arm64/boot/dts/apple/t8103.dtsi | 73 +++++++++++++++++++++++ 2 files changed, 77 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi b/arch/arm64/boot/dt= s/apple/t8103-jxxx.dtsi index fe2ae40fa9dd..503a1b243efa 100644 --- a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi +++ b/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi @@ -76,3 +76,7 @@ wifi0: network@0,0 { local-mac-address =3D [00 00 00 00 00 00]; }; }; + +&nco_clkref { + clock-frequency =3D <900000000>; +}; diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/app= le/t8103.dtsi index 51a63b29d404..51bc901482db 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -116,6 +116,16 @@ clkref: clock-ref { clock-output-names =3D "clkref"; }; =20 + /* + * This is a fabulated representation of the input clock + * to NCO since we don't know the true clock tree. + */ + nco_clkref: clock-ref-nco { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-output-names =3D "nco_ref"; + }; + soc { compatible =3D "simple-bus"; #address-cells =3D <2>; @@ -124,6 +134,15 @@ soc { ranges; nonposted-mmio; =20 + dart_sio: iommu@235004000 { + compatible =3D "apple,t8103-dart"; + reg =3D <0x2 0x35004000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_sio_cpu>; + }; + i2c0: i2c@235010000 { compatible =3D "apple,t8103-i2c", "apple,i2c"; reg =3D <0x2 0x35010000 0x0 0x4000>; @@ -219,6 +238,60 @@ serial2: serial@235208000 { status =3D "disabled"; }; =20 + admac: dma-controller@238200000 { + compatible =3D "apple,t8103-admac", "apple,admac"; + reg =3D <0x2 0x38200000 0x0 0x34000>; + dma-channels =3D <24>; + interrupts-extended =3D <0>, + <&aic AIC_IRQ 626 IRQ_TYPE_LEVEL_HIGH>, + <0>, + <0>; + #dma-cells =3D <1>; + iommus =3D <&dart_sio 2>; + power-domains =3D <&ps_sio_adma>; + }; + + mca: i2s@238400000 { + compatible =3D "apple,t8103-mca", "apple,mca"; + reg =3D <0x2 0x38400000 0x0 0x18000>, + <0x2 0x38300000 0x0 0x30000>; + + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + ; + + resets =3D <&ps_audio_p>; + clocks =3D <&nco 0>, <&nco 1>, <&nco 2>, + <&nco 3>, <&nco 4>, <&nco 4>; + power-domains =3D <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>, + <&ps_mca2>, <&ps_mca3>, <&ps_mca4>, <&ps_mca5>; + dmas =3D <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>, + <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>, + <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>, + <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>, + <&admac 16>, <&admac 17>, <&admac 18>, <&admac 19>, + <&admac 20>, <&admac 21>, <&admac 22>, <&admac 23>; + dma-names =3D "tx0a", "rx0a", "tx0b", "rx0b", + "tx1a", "rx1a", "tx1b", "rx1b", + "tx2a", "rx2a", "tx2b", "rx2b", + "tx3a", "rx3a", "tx3b", "rx3b", + "tx4a", "rx4a", "tx4b", "rx4b", + "tx5a", "rx5a", "tx5b", "rx5b"; + + #sound-dai-cells =3D <1>; + }; + + nco: clock-controller@23b044000 { + compatible =3D "apple,t8103-nco", "apple,nco"; + reg =3D <0x2 0x3b044000 0x0 0x14000>; + clocks =3D <&nco_clkref>; + #clock-cells =3D <1>; + }; + aic: interrupt-controller@23b100000 { compatible =3D "apple,t8103-aic", "apple,aic"; #interrupt-cells =3D <3>; --=20 2.35.1 From nobody Wed Apr 8 12:59:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E7FBC6FA82 for ; Fri, 9 Sep 2022 13:52:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229989AbiIINwd (ORCPT ); Fri, 9 Sep 2022 09:52:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231702AbiIINvl (ORCPT ); Fri, 9 Sep 2022 09:51:41 -0400 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4AF1B97521; Fri, 9 Sep 2022 06:51:30 -0700 (PDT) Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id 4A67826EFF3; Fri, 9 Sep 2022 15:51:08 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Alyssa Rosenzweig , Hector Martin , Krzysztof Kozlowski , Rob Herring , Sven Peter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 10/10] arm64: dts: apple: t600x: Add MCA and its support Date: Fri, 9 Sep 2022 15:51:03 +0200 Message-Id: <20220909135103.98179-11-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the MCA I2S transceiver and its supporting ADMAC and NCO nodes. Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/t600x-common.dtsi | 9 +++ arch/arm64/boot/dts/apple/t600x-die0.dtsi | 62 +++++++++++++++++++ .../arm64/boot/dts/apple/t600x-j314-j316.dtsi | 4 ++ arch/arm64/boot/dts/apple/t600x-j375.dtsi | 4 ++ 4 files changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t600x-common.dtsi b/arch/arm64/boot/= dts/apple/t600x-common.dtsi index e29b88e2c853..f5fac1926a25 100644 --- a/arch/arm64/boot/dts/apple/t600x-common.dtsi +++ b/arch/arm64/boot/dts/apple/t600x-common.dtsi @@ -125,4 +125,13 @@ clkref: clock-ref { clock-output-names =3D "clkref"; }; =20 + /* + * This is a fabulated representation of the input clock + * to NCO since we don't know the true clock tree. + */ + nco_clkref: clock-ref-nco { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-output-names =3D "nco_ref"; + }; }; diff --git a/arch/arm64/boot/dts/apple/t600x-die0.dtsi b/arch/arm64/boot/dt= s/apple/t600x-die0.dtsi index 2d66eead8aee..639c90e108a7 100644 --- a/arch/arm64/boot/dts/apple/t600x-die0.dtsi +++ b/arch/arm64/boot/dts/apple/t600x-die0.dtsi @@ -7,6 +7,13 @@ */ =20 =20 + nco: clock-controller@28e03c000 { + compatible =3D "apple,t6000-nco", "apple,nco"; + reg =3D <0x2 0x8e03c000 0x0 0x14000>; + clocks =3D <&nco_clkref>; + #clock-cells =3D <1>; + }; + aic: interrupt-controller@28e100000 { compatible =3D "apple,t6000-aic", "apple,aic2"; #interrupt-cells =3D <4>; @@ -46,6 +53,24 @@ wdt: watchdog@2922b0000 { interrupts =3D ; }; =20 + dart_sio_0: iommu@39b004000 { + compatible =3D "apple,t6000-dart"; + reg =3D <0x3 0x9b004000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_sio_cpu>; + }; + + dart_sio_1: iommu@39b008000 { + compatible =3D "apple,t6000-dart"; + reg =3D <0x3 0x9b008000 0x0 0x8000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_sio_cpu>; + }; + i2c0: i2c@39b040000 { compatible =3D "apple,t6000-i2c", "apple,i2c"; reg =3D <0x3 0x9b040000 0x0 0x4000>; @@ -145,6 +170,43 @@ serial0: serial@39b200000 { status =3D "disabled"; }; =20 + admac: dma-controller@39b400000 { + compatible =3D "apple,t6000-admac", "apple,admac"; + reg =3D <0x3 0x9b400000 0x0 0x34000>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + interrupts-extended =3D <0>, + <&aic AIC_IRQ 0 1118 IRQ_TYPE_LEVEL_HIGH>, + <0>, + <0>; + iommus =3D <&dart_sio_0 2>, <&dart_sio_1 2>; + power-domains =3D <&ps_sio_adma>; + }; + + mca: mca@39b600000 { + compatible =3D "apple,t6000-mca", "apple,mca"; + reg =3D <0x3 0x9b600000 0x0 0x10000>, + <0x3 0x9b500000 0x0 0x20000>; + clocks =3D <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>; + dmas =3D <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>, + <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>, + <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>, + <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>; + dma-names =3D "tx0a", "rx0a", "tx0b", "rx0b", + "tx1a", "rx1a", "tx1b", "rx1b", + "tx2a", "rx2a", "tx2b", "rx2b", + "tx3a", "rx3a", "tx3b", "rx3b"; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + ; + power-domains =3D <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>, + <&ps_mca2>, <&ps_mca3>; + resets =3D <&ps_audio_p>; + #sound-dai-cells =3D <1>; + }; + pcie0_dart_0: dart@581008000 { compatible =3D "apple,t6000-dart"; reg =3D <0x5 0x81008000 0x0 0x4000>; diff --git a/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi b/arch/arm64/bo= ot/dts/apple/t600x-j314-j316.dtsi index 8079200aeb12..34906d522f0a 100644 --- a/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi +++ b/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi @@ -76,6 +76,10 @@ hpm5: usb-pd@3a { }; }; =20 +&nco_clkref { + clock-frequency =3D <1068000000>; +}; + /* PCIe devices */ &port00 { /* WLAN */ diff --git a/arch/arm64/boot/dts/apple/t600x-j375.dtsi b/arch/arm64/boot/dt= s/apple/t600x-j375.dtsi index c5444cb34389..216f0a952dff 100644 --- a/arch/arm64/boot/dts/apple/t600x-j375.dtsi +++ b/arch/arm64/boot/dts/apple/t600x-j375.dtsi @@ -77,6 +77,10 @@ hpm3: usb-pd@3c { }; }; =20 +&nco_clkref { + clock-frequency =3D <1068000000>; +}; + /* PCIe devices */ &port00 { /* WLAN */ --=20 2.35.1