From nobody Sat Sep 21 19:55:19 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3A67C6FA89 for ; Thu, 8 Sep 2022 17:12:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231820AbiIHRMK (ORCPT ); Thu, 8 Sep 2022 13:12:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231752AbiIHRME (ORCPT ); Thu, 8 Sep 2022 13:12:04 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DC1913F87; Thu, 8 Sep 2022 10:12:03 -0700 (PDT) Received: from notapiano.myfiosgateway.com (unknown [70.107.189.129]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id A9D7D6601FAB; Thu, 8 Sep 2022 18:12:00 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1662657122; bh=rOUGO4cGjU8jRBffaVEnBvlEo3ADSgzcmPqVWtblivg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W4yZZ88/tyH+Mtz54J7dUPKtAaHu9sulHCvGhJW0XceEyf8xM1bOtseUPo5hgcJH7 c9D+t/8/oXiBbUIKijjlEigm9H47MnfqvDaxSD/qGlTVe4rrGitDjT6a7OPx6NfmRI wGusqe9oxSjjCkXqhrpMSX0ePdYMSMYhD7LaY5FobGoFrjzLqscx/nJ8Z2wK2Qyyuf I5F9lkBDNROwsJLXm5zWVH4HW/Vtb60zHdchwPRT/rf1LIOd+RSyUKcZmT8PxcgOCQ 0P/AM0UQhCDovEesQEDKNiiwIVN7IqgcUCTWdj1vt6mLj2E/2ftgECTPO8kLtT/ful tPd0UqN3wFyVg== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH 2/3] arm64: dts: mediatek: asurada: Add display backlight Date: Thu, 8 Sep 2022 13:11:52 -0400 Message-Id: <20220908171153.670762-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220908171153.670762-1-nfraprado@collabora.com> References: <20220908171153.670762-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the display backlight for the Asurada platform. It relies on the display PWM controller, so also enable and configure this component. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8192-asurada.dtsi | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 1d99e470ea1a..33ef55b6dbe1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -23,6 +23,16 @@ memory@40000000 { reg =3D <0 0x40000000 0 0x80000000>; }; =20 + backlight_lcd0: backlight-lcd0 { + compatible =3D "pwm-backlight"; + pwms =3D <&pwm0 0 500000>; + power-supply =3D <&ppvar_sys>; + enable-gpios =3D <&pio 152 0>; + brightness-levels =3D <0 1023>; + num-interpolated-steps =3D <1023>; + default-brightness-level =3D <576>; + }; + pp1000_dpbrdg: regulator-1v0-dpbrdg { compatible =3D "regulator-fixed"; regulator-name =3D "pp1000_dpbrdg"; @@ -840,6 +850,17 @@ pins-pcie-en-pp3300-wlan { }; }; =20 + pwm0_pins: pwm0-default-pins { + pins-pwm { + pinmux =3D ; + }; + + pins-inhibit { + pinmux =3D ; + output-high; + }; + }; + scp_pins: scp-pins { pins-vreq-vao { pinmux =3D ; @@ -901,6 +922,13 @@ &pmic { interrupts-extended =3D <&pio 214 IRQ_TYPE_LEVEL_HIGH>; }; =20 +&pwm0 { + status =3D "okay"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm0_pins>; +}; + &scp { status =3D "okay"; =20 --=20 2.37.3