From nobody Mon Apr 6 14:10:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3A61C38145 for ; Wed, 7 Sep 2022 09:21:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230370AbiIGJV3 (ORCPT ); Wed, 7 Sep 2022 05:21:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229809AbiIGJVW (ORCPT ); Wed, 7 Sep 2022 05:21:22 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 628C21DA4F; Wed, 7 Sep 2022 02:21:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662542480; x=1694078480; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=GuFBZXXxj5JZvk7OWi1+kSXB5Q/GhtyNc2SsO4+S5jQ=; b=yXcd3PbOmciICT7n3LHqOsCLUU/qEckW+MVtQ+QjRp+As8hWvCklSNg5 o3E1FEqqi/zoeNhlb00glnmmJujt50I+76ZCxnSDw7fkx0yLkYZD3t/EY j3967eg3gFYy/YFK2mjG6FvXz+rFwNKzJl+wZJya5OWOKYuZlZGG7fjKt mUNIMYVInEn8qYuXmZPXDgJvVPB7RexoStj6F8oL0McM93KvAyt5FG3J5 Tu22hAZv9jUG31ZrV+lNtGY2jXZCtgk/OZKFAO7AKrkdPWMtHi5yN+Nyz HRK+dFWc0i0bpGag4vOaXoIaoafLphaxjCl7JZdwDSOohYOGQaRdGqSYz Q==; X-IronPort-AV: E=Sophos;i="5.93,296,1654585200"; d="scan'208";a="112520797" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Sep 2022 02:21:19 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 7 Sep 2022 02:21:18 -0700 Received: from che-lt-i63539lx.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 7 Sep 2022 02:21:12 -0700 From: Hari Prasath To: , , , , , , , , , , , , , , , CC: Subject: [linux][PATCH 2/6] ARM: dts: at91: sam9x60: Move flexcom definitions to the SoC dtsi Date: Wed, 7 Sep 2022 14:50:50 +0530 Message-ID: <20220907092054.29915-3-Hari.PrasathGE@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> References: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move the flexcom definitions to the SoC specifc DTSI file retaining only the pinmux and desired functions in the board specific DTS file of sam9x60ek. Signed-off-by: Hari Prasath Signed-off-by: Manikandan M Signed-off-by: Durai Manickam KR --- arch/arm/boot/dts/at91-sam9x60ek.dts | 34 +----------------- arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++-- 2 files changed, 51 insertions(+), 35 deletions(-) diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-= sam9x60ek.dts index b9b7a235ef89..9d9e50c77794 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -211,15 +211,10 @@ status =3D "okay"; =20 i2c0: i2c@600 { - compatible =3D "microchip,sam9x60-i2c"; - reg =3D <0x600 0x200>; - interrupts =3D <5 IRQ_TYPE_LEVEL_HIGH 7>; #address-cells =3D <1>; #size-cells =3D <0>; - clocks =3D <&pmc PMC_TYPE_PERIPHERAL 5>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_flx0_default>; - atmel,fifo-size =3D <16>; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns =3D <35>; @@ -239,16 +234,8 @@ status =3D "disabled"; =20 spi4: spi@400 { - compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; - reg =3D <0x400 0x200>; - interrupts =3D <13 IRQ_TYPE_LEVEL_HIGH 7>; - clocks =3D <&pmc PMC_TYPE_PERIPHERAL 13>; - clock-names =3D "spi_clk"; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_flx4_default>; - atmel,fifo-size =3D <16>; - #address-cells =3D <1>; - #size-cells =3D <0>; status =3D "disabled"; }; }; @@ -258,22 +245,8 @@ status =3D "okay"; =20 uart5: serial@200 { - compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; - reg =3D <0x200 0x200>; - interrupts =3D <14 IRQ_TYPE_LEVEL_HIGH 7>; - dmas =3D <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(10))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(11))>; - dma-names =3D "tx", "rx"; - clocks =3D <&pmc PMC_TYPE_PERIPHERAL 14>; - clock-names =3D "usart"; - pinctrl-0 =3D <&pinctrl_flx5_default>; pinctrl-names =3D "default"; - atmel,use-dma-rx; - atmel,use-dma-tx; + pinctrl-0 =3D <&pinctrl_flx5_default>; status =3D "okay"; }; }; @@ -283,15 +256,10 @@ status =3D "okay"; =20 i2c6: i2c@600 { - compatible =3D "microchip,sam9x60-i2c"; - reg =3D <0x600 0x200>; - interrupts =3D <9 IRQ_TYPE_LEVEL_HIGH 7>; #address-cells =3D <1>; #size-cells =3D <0>; - clocks =3D <&pmc PMC_TYPE_PERIPHERAL 9>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_flx6_default>; - atmel,fifo-size =3D <16>; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns =3D <35>; diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index d3f60f6a456d..f0e0dc20de1b 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -169,6 +169,16 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf0000000 0x800>; status =3D "disabled"; + + spi4: spi@400 { + compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D <13 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 13>; + clock-names =3D "spi_clk"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx5: flexcom@f0004000 { @@ -179,6 +189,26 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf0004000 0x800>; status =3D "disabled"; + + uart5: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <14 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(10))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(11))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 14>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + status =3D "disabled"; + }; }; =20 dma0: dma-controller@f0008000 { @@ -378,6 +408,15 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf8010000 0x800>; status =3D "disabled"; + + i2c6: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <9 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 9>; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx7: flexcom@f8014000 { @@ -404,10 +443,19 @@ compatible =3D "atmel,sama5d2-flexcom"; reg =3D <0xf801c000 0x200>; clocks =3D <&pmc PMC_TYPE_PERIPHERAL 5>; - #address-cells =3D <1>; - #size-cells =3D <1>; ranges =3D <0x0 0xf801c000 0x800>; status =3D "disabled"; + + i2c0: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <5 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 5>; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx1: flexcom@f8020000 { --=20 2.17.1