From nobody Mon Apr 6 12:33:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E479DECAAD3 for ; Wed, 7 Sep 2022 09:21:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230409AbiIGJVo (ORCPT ); Wed, 7 Sep 2022 05:21:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229881AbiIGJVY (ORCPT ); Wed, 7 Sep 2022 05:21:24 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C29BAA3CB; Wed, 7 Sep 2022 02:21:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662542482; x=1694078482; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; 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Wed, 7 Sep 2022 02:21:05 -0700 From: Hari Prasath To: , , , , , , , , , , , , , , , CC: Subject: [linux][PATCH 1/6] ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom functions Date: Wed, 7 Sep 2022 14:50:49 +0530 Message-ID: <20220907092054.29915-2-Hari.PrasathGE@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> References: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Manikandan M Fixed the label numbering of the flexcom functions so that all 13 flexcom functions of sam9x60 are in the following order when the missing flexcom functions are added: flx0: uart0, spi0, i2c0 flx1: uart1, spi1, i2c1 flx2: uart2, spi2, i2c2 flx3: uart3, spi3, i2c3 flx4: uart4, spi4, i2c4 flx5: uart5, spi5, i2c5 flx6: uart6, i2c6 flx7: uart7, i2c7 flx8: uart8, i2c8 flx9: uart9, i2c9 flx10: uart10, i2c10 flx11: uart11, i2c11 flx12: uart12, i2c12 Signed-off-by: Manikandan M --- arch/arm/boot/dts/at91-sam9x60ek.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-= sam9x60ek.dts index 7ade9979e1c6..b9b7a235ef89 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -16,8 +16,8 @@ =20 aliases { i2c0 =3D &i2c0; - i2c1 =3D &i2c1; - serial1 =3D &uart1; + i2c1 =3D &i2c6; + serial1 =3D &uart5; }; =20 chosen { @@ -238,7 +238,7 @@ atmel,flexcom-mode =3D ; status =3D "disabled"; =20 - spi0: spi@400 { + spi4: spi@400 { compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; reg =3D <0x400 0x200>; interrupts =3D <13 IRQ_TYPE_LEVEL_HIGH 7>; @@ -257,7 +257,7 @@ atmel,flexcom-mode =3D ; status =3D "okay"; =20 - uart1: serial@200 { + uart5: serial@200 { compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg =3D <0x200 0x200>; interrupts =3D <14 IRQ_TYPE_LEVEL_HIGH 7>; @@ -282,7 +282,7 @@ atmel,flexcom-mode =3D ; status =3D "okay"; =20 - i2c1: i2c@600 { + i2c6: i2c@600 { compatible =3D "microchip,sam9x60-i2c"; reg =3D <0x600 0x200>; interrupts =3D <9 IRQ_TYPE_LEVEL_HIGH 7>; @@ -442,7 +442,7 @@ AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; =20 - pinctrl_flx5_default: flx_uart { + pinctrl_flx5_default: flx5_uart { atmel,pins =3D X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3A61C38145 for ; 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X-IronPort-AV: E=Sophos;i="5.93,296,1654585200"; d="scan'208";a="112520797" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Sep 2022 02:21:19 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 7 Sep 2022 02:21:18 -0700 Received: from che-lt-i63539lx.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 7 Sep 2022 02:21:12 -0700 From: Hari Prasath To: , , , , , , , , , , , , , , , CC: Subject: [linux][PATCH 2/6] ARM: dts: at91: sam9x60: Move flexcom definitions to the SoC dtsi Date: Wed, 7 Sep 2022 14:50:50 +0530 Message-ID: <20220907092054.29915-3-Hari.PrasathGE@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> References: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move the flexcom definitions to the SoC specifc DTSI file retaining only the pinmux and desired functions in the board specific DTS file of sam9x60ek. Signed-off-by: Hari Prasath Signed-off-by: Manikandan M Signed-off-by: Durai Manickam KR --- arch/arm/boot/dts/at91-sam9x60ek.dts | 34 +----------------- arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++-- 2 files changed, 51 insertions(+), 35 deletions(-) diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-= sam9x60ek.dts index b9b7a235ef89..9d9e50c77794 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -211,15 +211,10 @@ status =3D "okay"; =20 i2c0: i2c@600 { - compatible =3D "microchip,sam9x60-i2c"; - reg =3D <0x600 0x200>; - interrupts =3D <5 IRQ_TYPE_LEVEL_HIGH 7>; #address-cells =3D <1>; #size-cells =3D <0>; - clocks =3D <&pmc PMC_TYPE_PERIPHERAL 5>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_flx0_default>; - atmel,fifo-size =3D <16>; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns =3D <35>; @@ -239,16 +234,8 @@ status =3D "disabled"; =20 spi4: spi@400 { - compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; - reg =3D <0x400 0x200>; - interrupts =3D <13 IRQ_TYPE_LEVEL_HIGH 7>; - clocks =3D <&pmc PMC_TYPE_PERIPHERAL 13>; - clock-names =3D "spi_clk"; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_flx4_default>; - atmel,fifo-size =3D <16>; - #address-cells =3D <1>; - #size-cells =3D <0>; status =3D "disabled"; }; }; @@ -258,22 +245,8 @@ status =3D "okay"; =20 uart5: serial@200 { - compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; - reg =3D <0x200 0x200>; - interrupts =3D <14 IRQ_TYPE_LEVEL_HIGH 7>; - dmas =3D <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(10))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(11))>; - dma-names =3D "tx", "rx"; - clocks =3D <&pmc PMC_TYPE_PERIPHERAL 14>; - clock-names =3D "usart"; - pinctrl-0 =3D <&pinctrl_flx5_default>; pinctrl-names =3D "default"; - atmel,use-dma-rx; - atmel,use-dma-tx; + pinctrl-0 =3D <&pinctrl_flx5_default>; status =3D "okay"; }; }; @@ -283,15 +256,10 @@ status =3D "okay"; =20 i2c6: i2c@600 { - compatible =3D "microchip,sam9x60-i2c"; - reg =3D <0x600 0x200>; - interrupts =3D <9 IRQ_TYPE_LEVEL_HIGH 7>; #address-cells =3D <1>; #size-cells =3D <0>; - clocks =3D <&pmc PMC_TYPE_PERIPHERAL 9>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_flx6_default>; - atmel,fifo-size =3D <16>; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns =3D <35>; diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index d3f60f6a456d..f0e0dc20de1b 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -169,6 +169,16 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf0000000 0x800>; status =3D "disabled"; + + spi4: spi@400 { + compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D <13 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 13>; + clock-names =3D "spi_clk"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx5: flexcom@f0004000 { @@ -179,6 +189,26 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf0004000 0x800>; status =3D "disabled"; + + uart5: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <14 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(10))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(11))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 14>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + status =3D "disabled"; + }; }; =20 dma0: dma-controller@f0008000 { @@ -378,6 +408,15 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf8010000 0x800>; status =3D "disabled"; + + i2c6: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <9 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 9>; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx7: flexcom@f8014000 { @@ -404,10 +443,19 @@ compatible =3D "atmel,sama5d2-flexcom"; reg =3D <0xf801c000 0x200>; clocks =3D <&pmc PMC_TYPE_PERIPHERAL 5>; - #address-cells =3D <1>; - #size-cells =3D <1>; ranges =3D <0x0 0xf801c000 0x800>; status =3D "disabled"; + + i2c0: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <5 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 5>; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx1: flexcom@f8020000 { --=20 2.17.1 From nobody Mon Apr 6 12:33:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53D30ECAAD3 for ; Wed, 7 Sep 2022 09:22:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230413AbiIGJWA (ORCPT ); Wed, 7 Sep 2022 05:22:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230406AbiIGJVn (ORCPT ); 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07 Sep 2022 02:21:34 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 7 Sep 2022 02:21:25 -0700 Received: from che-lt-i63539lx.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 7 Sep 2022 02:21:19 -0700 From: Hari Prasath To: , , , , , , , , , , , , , , , CC: Subject: [linux][PATCH 3/6] ARM: dts: at91: sam9x60: Specify the FIFO size for the Flexcom UART Date: Wed, 7 Sep 2022 14:50:51 +0530 Message-ID: <20220907092054.29915-4-Hari.PrasathGE@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> References: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Manikandan M The UART submodule in Flexcom has 16-byte Transmit and Receive FIFOs. Signed-off-by: Manikandan M --- arch/arm/boot/dts/sam9x60.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index f0e0dc20de1b..224b406c8384 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -207,6 +207,7 @@ clock-names =3D "usart"; atmel,use-dma-rx; atmel,use-dma-tx; + atmel,fifo-size =3D <16>; status =3D "disabled"; }; }; --=20 2.17.1 From nobody Mon Apr 6 12:33:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6104EC54EE9 for ; Wed, 7 Sep 2022 09:22:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229883AbiIGJWH (ORCPT ); Wed, 7 Sep 2022 05:22:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230417AbiIGJVo (ORCPT ); Wed, 7 Sep 2022 05:21:44 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D0F4B14F1; Wed, 7 Sep 2022 02:21:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662542497; x=1694078497; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=JMofcc0/3WtiNBW5HbbI91nM/6aF8hmAmb4q7yBUGxc=; b=P5caLgAMCC+PvAXFf0Hct8BZ9d/o9Y7Zn5u8Hkx9NJepLWJIEJUye/AJ PHO2k0vvKklCoJsK98ML2LWtFu6FVcc8nVbhfcMaeMUtskPE/aWcQJYhO SIkjQsaMmiDwu7QxKiEYGmYoHXu3Mij0b4mTBMT4A5vpaz6lv7aFaDEMK xO6TkELvQnoeT4GTisZRscMmAzlyj8cgsEaJ23filYIBB5UFeQ5DZuuob F1Is5SlTPIN718KR43Xwy8eeADBK1cbT2Dhmnzjj+1qy/7FTE9uQBTRk3 Thtx4Is5ow6PdzR4RxDRUJmLo3OXQcPTWzuxa1nJQD/RSBQrbVrLs1I3a g==; X-IronPort-AV: E=Sophos;i="5.93,296,1654585200"; d="scan'208";a="172732977" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Sep 2022 02:21:35 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 7 Sep 2022 02:21:32 -0700 Received: from che-lt-i63539lx.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 7 Sep 2022 02:21:26 -0700 From: Hari Prasath To: , , , , , , , , , , , , , , , CC: Subject: [linux][PATCH 4/6] ARM: dts: at91: sam9x60: Add DMA bindigs for the flexcom nodes Date: Wed, 7 Sep 2022 14:50:52 +0530 Message-ID: <20220907092054.29915-5-Hari.PrasathGE@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> References: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add dma bindings for flexcom nodes in the soc dtsi file. Users those who don't wish to use the DMA function for their flexcom functions can overwrite the dma bindings in the board device tree file. Signed-off-by: Manikandan M Signed-off-by: Hari Prasath --- arch/arm/boot/dts/at91-sam9x60ek.dts | 3 +++ arch/arm/boot/dts/sam9x60.dtsi | 27 +++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-= sam9x60ek.dts index 9d9e50c77794..9ad528e1bdd2 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -213,6 +213,7 @@ i2c0: i2c@600 { #address-cells =3D <1>; #size-cells =3D <0>; + dmas =3D <0>, <0>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_flx0_default>; i2c-analog-filter; @@ -234,6 +235,7 @@ status =3D "disabled"; =20 spi4: spi@400 { + dmas =3D <0>, <0>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_flx4_default>; status =3D "disabled"; @@ -258,6 +260,7 @@ i2c6: i2c@600 { #address-cells =3D <1>; #size-cells =3D <0>; + dmas =3D <0>, <0>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_flx6_default>; i2c-analog-filter; diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index 224b406c8384..feeabc53e0ec 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -176,6 +176,15 @@ interrupts =3D <13 IRQ_TYPE_LEVEL_HIGH 7>; clocks =3D <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names =3D "spi_clk"; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(8))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(9))>; + dma-names =3D "tx", "rx"; atmel,fifo-size =3D <16>; status =3D "disabled"; }; @@ -415,6 +424,15 @@ reg =3D <0x600 0x200>; interrupts =3D <9 IRQ_TYPE_LEVEL_HIGH 7>; clocks =3D <&pmc PMC_TYPE_PERIPHERAL 9>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(12))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(13))>; + dma-names =3D "tx", "rx"; atmel,fifo-size =3D <16>; status =3D "disabled"; }; @@ -454,6 +472,15 @@ #address-cells =3D <1>; #size-cells =3D <0>; clocks =3D <&pmc PMC_TYPE_PERIPHERAL 5>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(0))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(1))>; + dma-names =3D "tx", "rx"; atmel,fifo-size =3D <16>; status =3D "disabled"; }; --=20 2.17.1 From nobody Mon Apr 6 12:33:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8872ECAAD3 for ; Wed, 7 Sep 2022 09:22:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230358AbiIGJWN (ORCPT ); Wed, 7 Sep 2022 05:22:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230287AbiIGJVr (ORCPT ); Wed, 7 Sep 2022 05:21:47 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 668E7B0B0A; Wed, 7 Sep 2022 02:21:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; 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Wed, 7 Sep 2022 02:21:34 -0700 From: Hari Prasath To: , , , , , , , , , , , , , , , CC: Subject: [linux][PATCH 5/6] ARM: dts: at91: sam9x60: Add missing flexcom definitions Date: Wed, 7 Sep 2022 14:50:53 +0530 Message-ID: <20220907092054.29915-6-Hari.PrasathGE@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> References: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Durai Manickam KR Added the missing flexcom functions for all the flexcom nodes. Signed-off-by: Manikandan M Signed-off-by: Durai Manickam KR Signed-off-by: Hari Prasath --- arch/arm/boot/dts/sam9x60.dtsi | 547 +++++++++++++++++++++++++++++++++ 1 file changed, 547 insertions(+) diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index feeabc53e0ec..1c580c3ba7c3 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -170,6 +170,27 @@ ranges =3D <0x0 0xf0000000 0x800>; status =3D "disabled"; =20 + uart4: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <13 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(8))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(9))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 13>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + spi4: spi@400 { compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; reg =3D <0x400 0x200>; @@ -188,6 +209,24 @@ atmel,fifo-size =3D <16>; status =3D "disabled"; }; + + i2c4: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <13 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 13>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(8))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(9))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx5: flexcom@f0004000 { @@ -219,6 +258,43 @@ atmel,fifo-size =3D <16>; status =3D "disabled"; }; + + spi5: spi@400 { + compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D <14 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 14>; + clock-names =3D "spi_clk"; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(10))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(11))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + i2c5: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <14 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 14>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(10))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(11))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 dma0: dma-controller@f0008000 { @@ -290,6 +366,45 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf0020000 0x800>; status =3D "disabled"; + + uart11: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <32 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(22))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(23))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 32>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + i2c11: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <32 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 32>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(22))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(23))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx12: flexcom@f0024000 { @@ -300,6 +415,45 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf0024000 0x800>; status =3D "disabled"; + + uart12: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <33 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(24))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(25))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 33>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + i2c12: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <33 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 33>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(24))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(25))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 pit64b: timer@f0028000 { @@ -419,6 +573,27 @@ ranges =3D <0x0 0xf8010000 0x800>; status =3D "disabled"; =20 + uart6: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <9 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(12))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(13))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 9>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + i2c6: i2c@600 { compatible =3D "microchip,sam9x60-i2c"; reg =3D <0x600 0x200>; @@ -446,6 +621,45 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf8014000 0x800>; status =3D "disabled"; + + uart7: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <10 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(14))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(15))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 10>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + i2c7: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <10 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 10>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(14))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(15))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx8: flexcom@f8018000 { @@ -456,15 +670,96 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf8018000 0x800>; status =3D "disabled"; + + uart8: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <11 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(16))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(17))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 11>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + i2c8: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <11 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 11>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(16))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(17))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx0: flexcom@f801c000 { compatible =3D "atmel,sama5d2-flexcom"; reg =3D <0xf801c000 0x200>; clocks =3D <&pmc PMC_TYPE_PERIPHERAL 5>; + #address-cells =3D <1>; + #size-cells =3D <1>; ranges =3D <0x0 0xf801c000 0x800>; status =3D "disabled"; =20 + uart0: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <5 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(0))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(1))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 5>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + spi0: spi@400 { + compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D <5 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 5>; + clock-names =3D "spi_clk"; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(0))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(1))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + i2c0: i2c@600 { compatible =3D "microchip,sam9x60-i2c"; reg =3D <0x600 0x200>; @@ -494,6 +789,64 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf8020000 0x800>; status =3D "disabled"; + + uart1: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <6 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(2))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(3))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 6>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + spi1: spi@400 { + compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D <6 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 6>; + clock-names =3D "spi_clk"; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(2))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(3))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + i2c1: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <6 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 6>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(2))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(3))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx2: flexcom@f8024000 { @@ -504,6 +857,64 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf8024000 0x800>; status =3D "disabled"; + + uart2: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <7 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(4))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(5))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 7>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + spi2: spi@400 { + compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D <7 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 7>; + clock-names =3D "spi_clk"; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(4))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(5))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + i2c2: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <7 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(4))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(5))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx3: flexcom@f8028000 { @@ -514,6 +925,64 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf8028000 0x800>; status =3D "disabled"; + + uart3: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <8 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(6))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(7))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 8>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + spi3: spi@400 { + compatible =3D "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D <8 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 8>; + clock-names =3D "spi_clk"; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(6))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(7))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + i2c3: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <8 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 8>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(6))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(7))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 macb0: ethernet@f802c000 { @@ -579,6 +1048,45 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf8040000 0x800>; status =3D "disabled"; + + uart9: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <15 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(18))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(19))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 15>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + i2c9: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <15 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 15>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(18))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(19))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 flx10: flexcom@f8044000 { @@ -589,6 +1097,45 @@ #size-cells =3D <1>; ranges =3D <0x0 0xf8044000 0x800>; status =3D "disabled"; + + uart10: serial@200 { + compatible =3D "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D <16 IRQ_TYPE_LEVEL_HIGH 7>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(20))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(21))>; + dma-names =3D "tx", "rx"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 16>; + clock-names =3D "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; + + i2c10: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D <16 IRQ_TYPE_LEVEL_HIGH 7>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 16>; + dmas =3D <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(20))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(21))>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <16>; + status =3D "disabled"; + }; }; =20 isi: isi@f8048000 { --=20 2.17.1 From nobody Mon Apr 6 12:33:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DDA70C38145 for ; Wed, 7 Sep 2022 09:22:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230443AbiIGJW1 (ORCPT ); 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X-IronPort-AV: E=Sophos;i="5.93,296,1654585200"; d="scan'208";a="172733042" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Sep 2022 02:21:48 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 7 Sep 2022 02:21:47 -0700 Received: from che-lt-i63539lx.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 7 Sep 2022 02:21:41 -0700 From: Hari Prasath To: , , , , , , , , , , , , , , , CC: Subject: [linux][PATCH 6/6] ARM: dts: at91: sam9x60_curiosity: Add device tree for sam9x60_curiosity board Date: Wed, 7 Sep 2022 14:50:54 +0530 Message-ID: <20220907092054.29915-7-Hari.PrasathGE@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> References: <20220907092054.29915-1-Hari.PrasathGE@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Manikandan M Add device tree file for sam9x60_curiosity board. Signed-off-by: Durai Manickam KR Signed-off-by: Manikandan M Signed-off-by: Hari Prasath --- .../devicetree/bindings/arm/atmel-at91.yaml | 6 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/at91-sam9x60_curiosity.dts | 532 ++++++++++++++++++ 3 files changed, 539 insertions(+) create mode 100644 arch/arm/boot/dts/at91-sam9x60_curiosity.dts diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Docume= ntation/devicetree/bindings/arm/atmel-at91.yaml index 2b7848bb7769..fae3a3090fbd 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml @@ -97,6 +97,12 @@ properties: - const: microchip,sam9x60 - const: atmel,at91sam9 =20 + - description: SAM9X60 Curiosity board + items: + - const: microchip,sam9x60-curiosity + - const: microchip,sam9x60 + - const: atmel,at91sam9 + - description: Nattis v2 board with Natte v2 power board items: - const: axentia,nattis-2 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 595e870750cd..cd60cda5d187 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -51,6 +51,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) +=3D \ at91sam9x25ek.dtb \ at91sam9x35ek.dtb dtb-$(CONFIG_SOC_SAM9X60) +=3D \ + at91-sam9x60_curiosity.dtb \ at91-sam9x60ek.dtb dtb-$(CONFIG_SOC_SAM_V7) +=3D \ at91-kizbox2-2.dtb \ diff --git a/arch/arm/boot/dts/at91-sam9x60_curiosity.dts b/arch/arm/boot/d= ts/at91-sam9x60_curiosity.dts new file mode 100644 index 000000000000..75e6727b5e3a --- /dev/null +++ b/arch/arm/boot/dts/at91-sam9x60_curiosity.dts @@ -0,0 +1,532 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * at91-sam9x60_curiosity.dts - Device Tree file for Microchip SAM9X60 CUR= IOSITY board + * + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries + * + * Author: Manikandan M + */ +/dts-v1/; +#include "sam9x60.dtsi" +#include + +/ { + model =3D "Microchip SAM9X60 CURIOSITY"; + compatible =3D "microchip,sam9x60-curiosity", "microchip,sam9x60", "atmel= ,at91sam9"; + + aliases { + i2c0 =3D &i2c0; + i2c1 =3D &i2c6; + serial2 =3D &uart7; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@20000000 { + reg =3D <0x20000000 0x8000000>; + }; + + clocks { + slow_xtal { + clock-frequency =3D <32768>; + }; + + main_xtal { + clock-frequency =3D <24000000>; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_key_gpio_default>; + status =3D "okay"; + + button-user { + label =3D "PB_USER"; + gpios =3D <&pioA 29 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio_leds>; + status =3D "okay"; + + red { + label =3D "red"; + gpios =3D <&pioD 17 GPIO_ACTIVE_HIGH>; + }; + + green { + label =3D "green"; + gpios =3D <&pioD 19 GPIO_ACTIVE_HIGH>; + }; + + blue { + label =3D "blue"; + gpios =3D <&pioD 21 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + }; + + regulators: regulators { + compatible =3D "simple-bus"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + vdd_1v8: fixed-regulator-vdd_1v8@0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "VDD_1V8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + status =3D "okay"; + }; + + vdd_1v15: fixed-regulator-vdd_1v15@1 { + compatible =3D "regulator-fixed"; + regulator-name =3D "VDD_1V15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + regulator-always-on; + status =3D "okay"; + }; + + vdd1_3v3: fixed-regulator-vdd1_3v3@2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "VDD1_3V3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + status =3D "okay"; + }; + }; +}; + +&adc { + vddana-supply =3D <&vdd1_3v3>; + vref-supply =3D <&vdd1_3v3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_adc_default &pinctrl_adtrg_default>; + status =3D "okay"; +}; + +&can0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_can0_rx_tx>; + status =3D "disabled"; /* Conflict with dbgu. */ +}; + +&can1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_can1_rx_tx>; + status =3D "okay"; +}; + +&dbgu { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_dbgu>; + status =3D "okay"; /* Conflict with can0. */ +}; + +&ebi { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ebi_addr_nand &pinctrl_ebi_data_0_7>; + status =3D "okay"; + + nand_controller: nand-controller { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_nand_oe_we &pinctrl_nand_cs &pinctrl_nand_rb>; + status =3D "okay"; + + nand@3 { + reg =3D <0x3 0x0 0x800000>; + rb-gpios =3D <&pioD 5 GPIO_ACTIVE_HIGH>; + cs-gpios =3D <&pioD 4 GPIO_ACTIVE_HIGH>; + nand-bus-width =3D <8>; + nand-ecc-mode =3D "hw"; + nand-ecc-strength =3D <8>; + nand-ecc-step-size =3D <512>; + nand-on-flash-bbt; + label =3D "atmel_nand"; + + partitions { + compatible =3D "fixed-partitions"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + at91bootstrap@0 { + label =3D "at91bootstrap"; + reg =3D <0x0 0x40000>; + }; + + uboot@40000 { + label =3D "u-boot"; + reg =3D <0x40000 0xc0000>; + }; + + ubootenvred@100000 { + label =3D "U-Boot Env Redundant"; + reg =3D <0x100000 0x40000>; + }; + + ubootenv@140000 { + label =3D "U-Boot Env"; + reg =3D <0x140000 0x40000>; + }; + + dtb@180000 { + label =3D "device tree"; + reg =3D <0x180000 0x80000>; + }; + + kernel@200000 { + label =3D "kernel"; + reg =3D <0x200000 0x600000>; + }; + + rootfs@800000 { + label =3D "rootfs"; + reg =3D <0x800000 0x1f800000>; + }; + }; + }; + }; +}; + +&flx0 { + atmel,flexcom-mode =3D ; + status =3D "okay"; + + i2c0: i2c@600 { + dmas =3D <0>, <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_flx0_default>; + i2c-analog-filter; + i2c-digital-filter; + i2c-digital-filter-width-ns =3D <35>; + status =3D "okay"; + + eeprom@53 { + compatible =3D "atmel,24c02"; + reg =3D <0x53>; + pagesize =3D <16>; + status =3D "okay"; + }; + }; +}; + +&flx6 { + atmel,flexcom-mode =3D ; + status =3D "okay"; + + i2c6: i2c@600 { + dmas =3D <0>, <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_flx6_default>; + i2c-analog-filter; + i2c-digital-filter; + i2c-digital-filter-width-ns =3D <35>; + status =3D "disabled"; + }; +}; + +&flx7 { + atmel,flexcom-mode =3D ; + status =3D "okay"; + + uart7: serial@200 { + #address-cells =3D <1>; + #size-cells =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_flx7_default>; + status =3D "okay"; + }; +}; + +&macb0 { + phy-mode =3D "rmii"; + #address-cells =3D <1>; + #size-cells =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_macb0_rmii>; + status =3D "okay"; + + ethernet-phy@0 { + reg =3D <0x0>; + }; +}; + +&pinctrl { + adc { + pinctrl_adc_default: adc_default { + atmel,pins =3D ; + }; + + pinctrl_adtrg_default: adtrg_default { + atmel,pins =3D ; + }; + }; + + can0 { + pinctrl_can0_rx_tx: can0_rx_tx { + atmel,pins =3D + ; /* Enable CAN T= ransceivers */ + }; + }; + + can1 { + pinctrl_can1_rx_tx: can1_rx_tx { + atmel,pins =3D + ; /* Enable CAN = Transceivers */ + }; + }; + + dbgu { + pinctrl_dbgu: dbgu-0 { + atmel,pins =3D ; + }; + }; + + ebi { + pinctrl_ebi_data_0_7: ebi-data-lsb-0 { + atmel,pins =3D + ; + }; + + pinctrl_ebi_data_0_15: ebi-data-msb-0 { + atmel,pins =3D + ; + }; + + pinctrl_ebi_addr_nand: ebi-addr-0 { + atmel,pins =3D + ; + }; + }; + + flexcom { + pinctrl_flx0_default: flx0_twi { + atmel,pins =3D + ; + }; + + pinctrl_flx6_default: flx6_twi { + atmel,pins =3D + ; + }; + + pinctrl_flx7_default: flx7_usart { + atmel,pins =3D + ; + }; + }; + + gpio_keys { + pinctrl_key_gpio_default: pinctrl_key_gpio { + atmel,pins =3D ; + }; + }; + + leds { + pinctrl_gpio_leds: gpio_leds { + atmel,pins =3D ; + }; + }; + + macb0 { + pinctrl_macb0_rmii: macb0_rmii-0 { + atmel,pins =3D + ; /* PB10 periph A */ + }; + }; + + nand { + pinctrl_nand_oe_we: nand-oe-we-0 { + atmel,pins =3D + ; + }; + + pinctrl_nand_rb: nand-rb-0 { + atmel,pins =3D + ; + }; + + pinctrl_nand_cs: nand-cs-0 { + atmel,pins =3D + ; + }; + }; + + pwm0 { + pinctrl_pwm0_0: pwm0_0 { + atmel,pins =3D ; + }; + + pinctrl_pwm0_1: pwm0_1 { + atmel,pins =3D ; + }; + + pinctrl_pwm0_2: pwm0_2 { + atmel,pins =3D ; + }; + }; + + sdmmc0 { + pinctrl_sdmmc0_default: sdmmc0 { + atmel,pins =3D + ; /* PA20 DAT3 periph A with pullup */ + }; + pinctrl_sdmmc0_cd: sdmmc0_cd { + atmel,pins =3D + ; + }; + }; + + sdmmc1 { + pinctrl_sdmmc1_default: sdmmc1 { + atmel,pins =3D + ; /* PA4 DAT3 periph B with pullup */ + }; + }; + + usb0 { + pinctrl_usba_vbus: usba_vbus { + atmel,pins =3D ; + }; + }; + + usb1 { + pinctrl_usb_default: usb_default { + atmel,pins =3D ; + }; + }; +}; /* pinctrl */ + +&pwm0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pwm0_0 &pinctrl_pwm0_1 &pinctrl_pwm0_2>; + status =3D "okay"; +}; + +&sdmmc0 { + bus-width =3D <4>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_sdmmc0_default &pinctrl_sdmmc0_cd>; + cd-gpios =3D <&pioA 25 GPIO_ACTIVE_LOW>; + disable-wp; + status =3D "okay"; +}; + +&sdmmc1 { + bus-width =3D <4>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_sdmmc1_default>; + status =3D "disabled"; +}; + +&shutdown_controller { + debounce-delay-us =3D <976>; + status =3D "okay"; + + input@0 { + reg =3D <0>; + }; +}; + +&tcb0 { + timer0: timer@0 { + compatible =3D "atmel,tcb-timer"; + reg =3D <0>; + }; + + timer1: timer@1 { + compatible =3D "atmel,tcb-timer"; + reg =3D <1>; + }; +}; + +&usb0 { + atmel,vbus-gpio =3D <&pioA 27 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usba_vbus>; + status =3D "okay"; +}; + +&usb1 { + num-ports =3D <3>; + atmel,vbus-gpio =3D <0 + &pioD 18 GPIO_ACTIVE_HIGH + &pioD 15 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usb_default>; + status =3D "okay"; +}; + +&usb2 { + status =3D "okay"; +}; + +&watchdog { + status =3D "okay"; +}; --=20 2.17.1