From nobody Mon Apr 6 20:11:41 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A846ECAAA1 for ; Sat, 3 Sep 2022 00:24:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231804AbiICAYN (ORCPT ); Fri, 2 Sep 2022 20:24:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231435AbiICAX0 (ORCPT ); Fri, 2 Sep 2022 20:23:26 -0400 Received: from mail-pg1-x54a.google.com (mail-pg1-x54a.google.com [IPv6:2607:f8b0:4864:20::54a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5757F63D1 for ; Fri, 2 Sep 2022 17:23:23 -0700 (PDT) Received: by mail-pg1-x54a.google.com with SMTP id 15-20020a63020f000000b0041b578f43f9so1888611pgc.11 for ; Fri, 02 Sep 2022 17:23:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=PvUdDgcJt2n+rsBljDkGNrBoyU4Rfeywa67YYhOs2Os=; b=hp9UsSaSUQW6/lS6OEq+lgoNM/OAL7afsdN/wWTzCsgzlK076VC8AFsMhM6/hFneDU ztVGZp1AZH4Co9RVgIHkAvQLvWUth/LCfTEBMDyOVqin9kYRLyuANehjIZ536rFUw4eN cgoRNLUtbm8gplTkPvzNcL6PSsJ3qGQhSaJx3vywyL/8uB1qZToCbGGAUsh9xLkK5Vx1 8kw7m+THQnb/knMpULq3URVZT8S8y+94k3f8XzE7BnOWUgyh4d/YOr2Kicwv69r2pO4A Muac4bWq62mNQ9BzKAM3d2mG82E+8zv/VgFy15BCJN5cMHirlAc76BZKGWL1G5GmnL19 KUBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=PvUdDgcJt2n+rsBljDkGNrBoyU4Rfeywa67YYhOs2Os=; b=ZDFpwkOLI4fnpqZSK2EEs3Vx5+6b0ZD3eMB+eM7r6/PwMpggErO+trL5pdce2CsPsj cShBJ8fKbKMkXQ/u6E18fcGxGkDUqjJBeOlANbztjOTnyH4AM7O10OTqUaDN//LMO12K bfxbIqisVsBbuQWAgHF56JszuTDAHaOLJyQN+esJ4j/uwcYNCZMDBzSYmjhQZ71PmsX2 Ez2ci5hkyny1cfz7OqJ3tuJycKivbg78OJWHZxK+ngFNCEsrWrS5mPWgP4U4qckCFHNK TpMrH0JIk1FhqOG5zp88IwDRlkUhmExpr7588086TtoF94dAnp3q62AFt1Ym7YzqxjDR RUnQ== X-Gm-Message-State: ACgBeo3zdlXzMas6yicYfvxo2vuawG9dFQkbO5DPXNP5pq/gGZqASbG9 odLNoslxzW42f5dY61I/czQiW9XvIjc= X-Google-Smtp-Source: AA6agR7d9kLZfyjpjnJDkIqPfDKJtru5IjWJBCPmBn2Kv1abPDq9p9t5cjddNhVgcjVy4czww9KyQ/VvxO8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90a:e7c2:b0:1f5:85ab:938c with SMTP id kb2-20020a17090ae7c200b001f585ab938cmr7624680pjb.133.1662164603472; Fri, 02 Sep 2022 17:23:23 -0700 (PDT) Reply-To: Sean Christopherson Date: Sat, 3 Sep 2022 00:22:45 +0000 In-Reply-To: <20220903002254.2411750-1-seanjc@google.com> Mime-Version: 1.0 References: <20220903002254.2411750-1-seanjc@google.com> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog Message-ID: <20220903002254.2411750-15-seanjc@google.com> Subject: [PATCH v2 14/23] KVM: x86: Honor architectural behavior for aliased 8-bit APIC IDs From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Suravee Suthikulpanit , Maxim Levitsky , Li RongQing Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Apply KVM's hotplug hack if and only if userspace has enabled 32-bit IDs for x2APIC. If 32-bit IDs are not enabled, disable the optimized map to honor x86 architectural behavior if multiple vCPUs shared a physical APIC ID. As called out in the changelog that added the hack, all CPUs whose (possibly truncated) APIC ID matches the target are supposed to receive the IPI. KVM intentionally differs from real hardware, because real hardware (Knights Landing) does just "x2apic_id & 0xff" to decide whether to accept the interrupt in xAPIC mode and it can deliver one interrupt to more than one physical destination, e.g. 0x123 to 0x123 and 0x23. Applying the hack even when x2APIC is not fully enabled means KVM doesn't correctly handle scenarios where the guest has aliased xAPIC IDs across multiple vCPUs, as only the vCPU with the lowest vCPU ID will receive any interrupts. It's extremely unlikely any real world guest aliase APIC IDs, or even modifies APIC IDs, but KVM's behavior is arbitrary, e.g. the lowest vCPU ID "wins" regardless of which vCPU is "aliasing" and which vCPU is "normal". Furthermore, the hack is _not_ guaranteed to work! The hack works if and only if the optimized APIC map is successfully allocated. If the map allocation fails (unlikely), KVM will fall back to its unoptimized behavior, which _does_ honor the architectural behavior. Pivot on 32-bit x2APIC IDs being enabled as that is required to take advantage of the hotplug hack (see kvm_apic_state_fixup()), i.e. won't break existing setups unless they are way, way off in the weeds. And an entry in KVM's errata to document the hack. Alternatively, KVM could provide an actual x2APIC quirk and document the hack that way, but there's unlikely to ever be a use case for disabling the quirk. Go the errata route to avoid having to validate a quirk no one cares about. Fixes: 5bd5db385b3e ("KVM: x86: allow hotplug of VCPU with APIC ID over 0xf= f") Signed-off-by: Sean Christopherson --- Documentation/virt/kvm/x86/errata.rst | 11 ++++++ arch/x86/kvm/lapic.c | 50 ++++++++++++++++++++++----- 2 files changed, 52 insertions(+), 9 deletions(-) diff --git a/Documentation/virt/kvm/x86/errata.rst b/Documentation/virt/kvm= /x86/errata.rst index 410e0aa63493..49a05f24747b 100644 --- a/Documentation/virt/kvm/x86/errata.rst +++ b/Documentation/virt/kvm/x86/errata.rst @@ -37,3 +37,14 @@ Nested virtualization features ------------------------------ =20 TBD + +x2APIC +------ +When KVM_X2APIC_API_USE_32BIT_IDS is enabled, KVM activates a hack/quirk t= hat +allows sending events to a single vCPU using its x2APIC ID even if the tar= get +vCPU has legacy xAPIC enabled, e.g. to bring up hotplugged vCPUs via INIT-= SIPI +on VMs with > 255 vCPUs. A side effect of the quirk is that, if multiple = vCPUs +have the same physical APIC ID, KVM will deliver events targeting that API= C ID +only to the vCPU with the lowest vCPU ID. If KVM_X2APIC_API_USE_32BIT_IDS= is +not enabled, KVM follows x86 architecture when processing interrupts (all = vCPUs +matching the target APIC ID receive the interrupt). diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 75748c380ceb..4c5f49c4d4f1 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -260,10 +260,10 @@ void kvm_recalculate_apic_map(struct kvm *kvm) kvm_for_each_vcpu(i, vcpu, kvm) { struct kvm_lapic *apic =3D vcpu->arch.apic; struct kvm_lapic **cluster; + u32 x2apic_id, physical_id; u16 mask; u32 ldr; u8 xapic_id; - u32 x2apic_id; =20 if (!kvm_apic_present(vcpu)) continue; @@ -271,16 +271,48 @@ void kvm_recalculate_apic_map(struct kvm *kvm) xapic_id =3D kvm_xapic_id(apic); x2apic_id =3D kvm_x2apic_id(apic); =20 - /* Hotplug hack: see kvm_apic_match_physical_addr(), ... */ - if ((apic_x2apic_mode(apic) || x2apic_id > 0xff) && - x2apic_id <=3D new->max_apic_id) - new->phys_map[x2apic_id] =3D apic; /* - * ... xAPIC ID of VCPUs with APIC ID > 0xff will wrap-around, - * prevent them from masking VCPUs with APIC ID <=3D 0xff. + * Apply KVM's hotplug hack if userspace has enable 32-bit APIC + * IDs. Allow sending events to vCPUs by their x2APIC ID even + * if the target vCPU is in legacy xAPIC mode, and silently + * ignore aliased xAPIC IDs (the x2APIC ID is truncated to 8 + * bits, causing IDs > 0xff to wrap and collide). + * + * Honor the architectural (and KVM's non-optimized) behavior + * if userspace has not enabled 32-bit x2APIC IDs. Each APIC + * is supposed to process messages independently. If multiple + * vCPUs have the same effective APIC ID, e.g. due to the + * x2APIC wrap or because the guest manually modified its xAPIC + * IDs, events targeting that ID are supposed to be recognized + * by all vCPUs with said ID. */ - if (!apic_x2apic_mode(apic) && !new->phys_map[xapic_id]) - new->phys_map[xapic_id] =3D apic; + if (kvm->arch.x2apic_format) { + /* See also kvm_apic_match_physical_addr(). */ + if ((apic_x2apic_mode(apic) || x2apic_id > 0xff) && + x2apic_id <=3D new->max_apic_id) + new->phys_map[x2apic_id] =3D apic; + + if (!apic_x2apic_mode(apic) && !new->phys_map[xapic_id]) + new->phys_map[xapic_id] =3D apic; + } else { + /* + * Disable the optimized map if the physical APIC ID is + * already mapped, i.e. is aliased to multiple vCPUs. + * The optimized map requires a strict 1:1 mapping + * between IDs and vCPUs. + */ + if (apic_x2apic_mode(apic)) + physical_id =3D x2apic_id; + else + physical_id =3D xapic_id; + + if (new->phys_map[physical_id]) { + kvfree(new); + new =3D NULL; + goto out; + } + new->phys_map[physical_id] =3D apic; + } =20 if (!kvm_apic_sw_enabled(apic)) continue; --=20 2.37.2.789.g6183377224-goog