From nobody Mon Apr 6 21:34:19 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9913ECAAD3 for ; Thu, 1 Sep 2022 22:43:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235172AbiIAWnv (ORCPT ); Thu, 1 Sep 2022 18:43:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233452AbiIAWng (ORCPT ); Thu, 1 Sep 2022 18:43:36 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 923E467CBE; Thu, 1 Sep 2022 15:43:35 -0700 (PDT) Received: from localhost (unknown [188.27.54.142]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id D9CD86601EBA; Thu, 1 Sep 2022 23:43:33 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1662072214; bh=KzKhwls9rXQht8qlDBSXnDEtPH0QZN4XnleCNhtFc2A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kpfF10M5FSXdKo0xIxEt1vC/iH6NSySzU3FZjcVe/7rN8d5OR5up1eZhQu5YiZ/fu ObJrfeJaVpEmyXLSvgR0QnPqX10nAeQavXd0fxostkX9WOE2AjGkty5OBVWlVJZ5aU jMIRPVv8OlE1Fgt4YSpIPJrZu1/TYFll/AxcVQDsFJciGJRMc+qcLcN+bEkeX8IoWW G46sX0BWmBIkaQjsbGfTQ4XxNe2NEPSSZtbKQHgd9b4QuBM7ZKdcxIPOjBcDdRG/gu M5NUuZq0JhlA5+KN/ccJew0mpr8AymDHv/mVpvbWplBb3qWGKlJcYBFOTZ5ZSFCZc6 sRwNh6vOZT+qA== From: Cristian Ciocaltea To: Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Michael Zhu , Drew Fustini , Emil Renner Berthing Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH 1/3] dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board Date: Fri, 2 Sep 2022 01:42:51 +0300 Message-Id: <20220901224253.2353071-2-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220901224253.2353071-1-cristian.ciocaltea@collabora.com> References: <20220901224253.2353071-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Document the compatibles for StarFive VisionFive V1 SBC [1]. The board is based on the StarFive JH7100 SoC. [1] https://github.com/starfive-tech/VisionFive Signed-off-by: Cristian Ciocaltea Reviewed-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/starfive.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Docume= ntation/devicetree/bindings/riscv/starfive.yaml index 5b36243fd674..9c948b379c8f 100644 --- a/Documentation/devicetree/bindings/riscv/starfive.yaml +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml @@ -21,6 +21,9 @@ properties: - items: - const: beagle,beaglev-starlight-jh7100-r0 - const: starfive,jh7100 + - items: + - const: starfive,visionfive-v1 + - const: starfive,jh7100 =20 additionalProperties: true =20 --=20 2.37.2 From nobody Mon Apr 6 21:34:19 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D100C54EE9 for ; Thu, 1 Sep 2022 22:43:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234159AbiIAWnr (ORCPT ); Thu, 1 Sep 2022 18:43:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47170 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234825AbiIAWni (ORCPT ); Thu, 1 Sep 2022 18:43:38 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B79296AA1A; Thu, 1 Sep 2022 15:43:37 -0700 (PDT) Received: from localhost (unknown [188.27.54.142]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 64E736601EBB; Thu, 1 Sep 2022 23:43:36 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1662072216; bh=KGA9+LQHMyEoNGDJQE/5v2mw3mjNk7h79xPplUMEGys=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oYNC0gPhRGNntWVgxqRvpobFHTmBErU/8NfI1S6J/V5jskwaZGK6nuInq/RfbuIrM V6GVSJFv6W/XGVlnRnEGLFqA9/2sNzgPagtAW1//WiRFhN5iFgykX3WXJvlz2zmC8g epjXw40l0QOFRZgJOkNPppPHIvD5oP+F6AP2AGF9MlxKVE6Um+4+Gwf++gQaPzye0G 1aeb7d/9928MByXtiy/CdxSyPzkcUpd+LWJu3KKhHLCZ3jWjx7bzy0eRNP/eQvdsQP OjxPWabHl30Q/3Xe5FmFdmAi9HcYdNBulryjEFXm7lNYvPST2oDRvJaKSUrrg8rZWN mZ10su0ncWPFw== From: Cristian Ciocaltea To: Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Michael Zhu , Drew Fustini , Emil Renner Berthing Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH 2/3] riscv: dts: starfive: Add common DT for JH7100 based boards Date: Fri, 2 Sep 2022 01:42:52 +0300 Message-Id: <20220901224253.2353071-3-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220901224253.2353071-1-cristian.ciocaltea@collabora.com> References: <20220901224253.2353071-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In preparation for adding initial device tree support for the StarFive VisionFive board, which is similar with BeagleV Starlight, move most of the content from jh7100-beaglev-starlight.dts to a new file, to be shared between the two boards. Signed-off-by: Cristian Ciocaltea Reviewed-by: Conor Dooley --- .../dts/starfive/jh7100-beaglev-starlight.dts | 153 +---------------- .../boot/dts/starfive/jh7100-common.dtsi | 161 ++++++++++++++++++ 2 files changed, 162 insertions(+), 152 deletions(-) create mode 100644 arch/riscv/boot/dts/starfive/jh7100-common.dtsi diff --git a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts b/ar= ch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts index c9af67f7a0d2..7cda3a89020a 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts +++ b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts @@ -5,160 +5,9 @@ */ =20 /dts-v1/; -#include "jh7100.dtsi" -#include -#include -#include +#include "jh7100-common.dtsi" =20 / { model =3D "BeagleV Starlight Beta"; compatible =3D "beagle,beaglev-starlight-jh7100-r0", "starfive,jh7100"; - - aliases { - serial0 =3D &uart3; - }; - - chosen { - stdout-path =3D "serial0:115200n8"; - }; - - cpus { - timebase-frequency =3D <6250000>; - }; - - memory@80000000 { - device_type =3D "memory"; - reg =3D <0x0 0x80000000 0x2 0x0>; - }; - - leds { - compatible =3D "gpio-leds"; - - led-ack { - gpios =3D <&gpio 43 GPIO_ACTIVE_HIGH>; - color =3D ; - function =3D LED_FUNCTION_HEARTBEAT; - linux,default-trigger =3D "heartbeat"; - label =3D "ack"; - }; - }; -}; - -&gpio { - i2c0_pins: i2c0-0 { - i2c-pins { - pinmux =3D , - ; - bias-disable; /* external pull-up */ - input-enable; - input-schmitt-enable; - }; - }; - - i2c1_pins: i2c1-0 { - i2c-pins { - pinmux =3D , - ; - bias-pull-up; - input-enable; - input-schmitt-enable; - }; - }; - - i2c2_pins: i2c2-0 { - i2c-pins { - pinmux =3D , - ; - bias-disable; /* external pull-up */ - input-enable; - input-schmitt-enable; - }; - }; - - uart3_pins: uart3-0 { - rx-pins { - pinmux =3D ; - bias-pull-up; - drive-strength =3D <14>; - input-enable; - input-schmitt-enable; - slew-rate =3D <0>; - }; - tx-pins { - pinmux =3D ; - bias-disable; - drive-strength =3D <35>; - input-disable; - input-schmitt-disable; - slew-rate =3D <0>; - }; - }; -}; - -&i2c0 { - clock-frequency =3D <100000>; - i2c-sda-hold-time-ns =3D <300>; - i2c-sda-falling-time-ns =3D <500>; - i2c-scl-falling-time-ns =3D <500>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c0_pins>; - status =3D "okay"; - - pmic@5e { - compatible =3D "ti,tps65086"; - reg =3D <0x5e>; - gpio-controller; - #gpio-cells =3D <2>; - - regulators { - }; - }; -}; - -&i2c1 { - clock-frequency =3D <400000>; - i2c-sda-hold-time-ns =3D <300>; - i2c-sda-falling-time-ns =3D <100>; - i2c-scl-falling-time-ns =3D <100>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c1_pins>; - status =3D "okay"; -}; - -&i2c2 { - clock-frequency =3D <100000>; - i2c-sda-hold-time-ns =3D <300>; - i2c-sda-falling-time-ns =3D <500>; - i2c-scl-falling-time-ns =3D <500>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c2_pins>; - status =3D "okay"; -}; - -&osc_sys { - clock-frequency =3D <25000000>; -}; - -&osc_aud { - clock-frequency =3D <27000000>; -}; - -&uart3 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&uart3_pins>; - status =3D "okay"; }; diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/b= oot/dts/starfive/jh7100-common.dtsi new file mode 100644 index 000000000000..6a66abacb612 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2021 StarFive Technology Co., Ltd. + * Copyright (C) 2021 Emil Renner Berthing + */ + +/dts-v1/; +#include "jh7100.dtsi" +#include +#include +#include + +/ { + aliases { + serial0 =3D &uart3; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + cpus { + timebase-frequency =3D <6250000>; + }; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x0 0x80000000 0x2 0x0>; + }; + + leds { + compatible =3D "gpio-leds"; + + led-ack { + gpios =3D <&gpio 43 GPIO_ACTIVE_HIGH>; + color =3D ; + function =3D LED_FUNCTION_HEARTBEAT; + linux,default-trigger =3D "heartbeat"; + label =3D "ack"; + }; + }; +}; + +&gpio { + i2c0_pins: i2c0-0 { + i2c-pins { + pinmux =3D , + ; + bias-disable; /* external pull-up */ + input-enable; + input-schmitt-enable; + }; + }; + + i2c1_pins: i2c1-0 { + i2c-pins { + pinmux =3D , + ; + bias-pull-up; + input-enable; + input-schmitt-enable; + }; + }; + + i2c2_pins: i2c2-0 { + i2c-pins { + pinmux =3D , + ; + bias-disable; /* external pull-up */ + input-enable; + input-schmitt-enable; + }; + }; + + uart3_pins: uart3-0 { + rx-pins { + pinmux =3D ; + bias-pull-up; + drive-strength =3D <14>; + input-enable; + input-schmitt-enable; + slew-rate =3D <0>; + }; + tx-pins { + pinmux =3D ; + bias-disable; + drive-strength =3D <35>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + }; +}; + +&i2c0 { + clock-frequency =3D <100000>; + i2c-sda-hold-time-ns =3D <300>; + i2c-sda-falling-time-ns =3D <500>; + i2c-scl-falling-time-ns =3D <500>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0_pins>; + status =3D "okay"; + + pmic@5e { + compatible =3D "ti,tps65086"; + reg =3D <0x5e>; + gpio-controller; + #gpio-cells =3D <2>; + + regulators { + }; + }; +}; + +&i2c1 { + clock-frequency =3D <400000>; + i2c-sda-hold-time-ns =3D <300>; + i2c-sda-falling-time-ns =3D <100>; + i2c-scl-falling-time-ns =3D <100>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1_pins>; + status =3D "okay"; +}; + +&i2c2 { + clock-frequency =3D <100000>; + i2c-sda-hold-time-ns =3D <300>; + i2c-sda-falling-time-ns =3D <500>; + i2c-scl-falling-time-ns =3D <500>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c2_pins>; + status =3D "okay"; +}; + +&osc_sys { + clock-frequency =3D <25000000>; +}; + +&osc_aud { + clock-frequency =3D <27000000>; +}; + +&uart3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart3_pins>; + status =3D "okay"; +}; --=20 2.37.2 From nobody Mon Apr 6 21:34:19 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DD12ECAAD2 for ; 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d=collabora.com; s=mail; t=1662072219; bh=qSEp5SybsWViAzv/VCOFJkSqNKS5KKyfvzLsd6XpWQ0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YGTkAEqx1Ndy6V+y1dADJlyc6v+uWY0JXsIUthW+1otCWlyGinNnuKJ5D/3gJ2p85 UCmBqEZjbt2SLFVvCwuVJ85VZnGtG1blrWmhiB6lopH0CxWnU0nvXEyGzbXrWsl5aD oEN9RihYRularyWLORY6LYkpFhXn/upsB3PjeCMnToyBLqzzjD/uKyopuhrz18rQq8 RmQ3r6FA7EWan0KzxOn68M+7ujxYq/gVimEHEwSEQyJIZwHGXIrySbJ9EljqYuZI/+ p/kMH9Xgt4+hnCCTguDKLh2DJNsNyapYmzkX7i3515wtvZJaKvfdzVyy6icFyZKXZw hRW4n584VNwng== From: Cristian Ciocaltea To: Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Michael Zhu , Drew Fustini , Emil Renner Berthing Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH 3/3] riscv: dts: starfive: Add StarFive VisionFive V1 device tree Date: Fri, 2 Sep 2022 01:42:53 +0300 Message-Id: <20220901224253.2353071-4-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220901224253.2353071-1-cristian.ciocaltea@collabora.com> References: <20220901224253.2353071-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add initial device tree for the StarFive VisionFive V1 SBC [1], which is similar with the already supported BeagleV Starlight Beta board, both being based on the StarFive JH7100 SoC. [1] https://github.com/starfive-tech/VisionFive Signed-off-by: Cristian Ciocaltea Reviewed-by: Conor Dooley --- arch/riscv/boot/dts/starfive/Makefile | 2 +- .../jh7100-starfive-visionfive-v1.dts | 20 +++++++++++++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive= -v1.dts diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/st= arfive/Makefile index 0ea1bc15ab30..039c143cba33 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-$(CONFIG_SOC_STARFIVE) +=3D jh7100-beaglev-starlight.dtb +dtb-$(CONFIG_SOC_STARFIVE) +=3D jh7100-beaglev-starlight.dtb jh7100-starfi= ve-visionfive-v1.dtb diff --git a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts= b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts new file mode 100644 index 000000000000..e82af72f1aaf --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2021 StarFive Technology Co., Ltd. + * Copyright (C) 2021 Emil Renner Berthing + */ + +/dts-v1/; +#include "jh7100-common.dtsi" +#include + +/ { + model =3D "StarFive VisionFive V1"; + compatible =3D "starfive,visionfive-v1", "starfive,jh7100"; + + gpio-restart { + compatible =3D "gpio-restart"; + gpios =3D <&gpio 63 GPIO_ACTIVE_HIGH>; + priority =3D <224>; + }; +}; --=20 2.37.2