From nobody Mon Apr 6 23:08:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B924ECAAD3 for ; Thu, 1 Sep 2022 22:21:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235257AbiIAWV3 (ORCPT ); Thu, 1 Sep 2022 18:21:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235101AbiIAWUo (ORCPT ); Thu, 1 Sep 2022 18:20:44 -0400 Received: from mail.3ffe.de (0001.3ffe.de [IPv6:2a01:4f8:c0c:9d57::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 969C374DE4; Thu, 1 Sep 2022 15:19:11 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.3ffe.de (Postfix) with ESMTPSA id 5AC62217A; Fri, 2 Sep 2022 00:19:09 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2022082101; t=1662070749; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BiI5TQZGL3DF7blkbUH50XjCMGU3ASvuhqmdZrATPSY=; b=o+2Poh+gKgP+6uHwPpy5fxRqS/APBhmxpk0ROGSZlgeNQ+GX+YJVWQJIsVYK6lIidfJxuo pAO7b4RZrmwS2NVvjPOppWcm2OvlJ7FiZGV6lmbIkXpYVEQj3DBu2Ozc0w+q1ZWLIsB7bX CftS5BzrGNZF3oDCG7iWprkhj38oTRhIEqnnqxVMNz3RxgTW7XrxEJxMLJDvpCVAR4+brM FWVOToO8pdY5GJVJf1DzirEvjWSmIUMnHRihXlAiLW7h1jgGB64nCyh4vUSUyIcR/7G2RT HzVK+YYp7cSbi5D4Ig5rtK2fXcVWipyeWe6Kse3RLBHRnSTkpHgiIxTJ985LTQ== From: Michael Walle To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , Shawn Guo , Li Yang , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Frank Rowand Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ahmad Fatoum , Philipp Zabel , Michael Walle Subject: [PATCH v2 03/20] nvmem: core: add an index parameter to the cell Date: Fri, 2 Sep 2022 00:18:40 +0200 Message-Id: <20220901221857.2600340-4-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220901221857.2600340-1-michael@walle.cc> References: <20220901221857.2600340-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam: Yes Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Sometimes a cell can represend multiple values. For example, a base ethernet address stored in the NVMEM can be expanded into multiple discreet ones by adding an offset. For this use case, introduce an index parameter which is then used to distiguish between values. This parameter will then be passed to the post process hook which can then use it to create different values during reading. At the moment, there is only support for the device tree path. You can add the index to the phandle, e.g. &net { nvmem-cells =3D <&base_mac_address 2>; nvmem-cell-names =3D "mac-address"; }; &nvmem_provider { base_mac_address: base-mac-address@0 { #nvmem-cell-cells =3D <1>; reg =3D <0 6>; }; }; Signed-off-by: Michael Walle --- changes since v1: - none drivers/nvmem/core.c | 37 ++++++++++++++++++++++++---------- drivers/nvmem/imx-ocotp.c | 4 ++-- include/linux/nvmem-provider.h | 4 ++-- 3 files changed, 30 insertions(+), 15 deletions(-) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 321d7d63e068..ab055e4fc409 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -60,6 +60,7 @@ struct nvmem_cell_entry { struct nvmem_cell { struct nvmem_cell_entry *entry; const char *id; + int index; }; =20 static DEFINE_MUTEX(nvmem_mutex); @@ -1127,7 +1128,8 @@ struct nvmem_device *devm_nvmem_device_get(struct dev= ice *dev, const char *id) } EXPORT_SYMBOL_GPL(devm_nvmem_device_get); =20 -static struct nvmem_cell *nvmem_create_cell(struct nvmem_cell_entry *entry= , const char *id) +static struct nvmem_cell *nvmem_create_cell(struct nvmem_cell_entry *entry, + const char *id, int index) { struct nvmem_cell *cell; const char *name =3D NULL; @@ -1146,6 +1148,7 @@ static struct nvmem_cell *nvmem_create_cell(struct nv= mem_cell_entry *entry, cons =20 cell->id =3D name; cell->entry =3D entry; + cell->index =3D index; =20 return cell; } @@ -1184,7 +1187,7 @@ nvmem_cell_get_from_lookup(struct device *dev, const = char *con_id) __nvmem_device_put(nvmem); cell =3D ERR_PTR(-ENOENT); } else { - cell =3D nvmem_create_cell(cell_entry, con_id); + cell =3D nvmem_create_cell(cell_entry, con_id, 0); if (IS_ERR(cell)) __nvmem_device_put(nvmem); } @@ -1232,15 +1235,27 @@ struct nvmem_cell *of_nvmem_cell_get(struct device_= node *np, const char *id) struct nvmem_device *nvmem; struct nvmem_cell_entry *cell_entry; struct nvmem_cell *cell; + struct of_phandle_args cell_spec; int index =3D 0; + int cell_index =3D 0; + int ret; =20 /* if cell name exists, find index to the name */ if (id) index =3D of_property_match_string(np, "nvmem-cell-names", id); =20 - cell_np =3D of_parse_phandle(np, "nvmem-cells", index); - if (!cell_np) - return ERR_PTR(-ENOENT); + ret =3D of_parse_phandle_with_optional_args(np, "nvmem-cells", + "#nvmem-cell-cells", + index, &cell_spec); + if (ret) + return ERR_PTR(ret); + + if (cell_spec.args_count > 1) + return ERR_PTR(-EINVAL); + + cell_np =3D cell_spec.np; + if (cell_spec.args_count) + cell_index =3D cell_spec.args[0]; =20 nvmem_np =3D of_get_next_parent(cell_np); if (!nvmem_np) @@ -1257,7 +1272,7 @@ struct nvmem_cell *of_nvmem_cell_get(struct device_no= de *np, const char *id) return ERR_PTR(-ENOENT); } =20 - cell =3D nvmem_create_cell(cell_entry, id); + cell =3D nvmem_create_cell(cell_entry, id, cell_index); if (IS_ERR(cell)) __nvmem_device_put(nvmem); =20 @@ -1410,8 +1425,8 @@ static void nvmem_shift_read_buffer_in_place(struct n= vmem_cell_entry *cell, void } =20 static int __nvmem_cell_read(struct nvmem_device *nvmem, - struct nvmem_cell_entry *cell, - void *buf, size_t *len, const char *id) + struct nvmem_cell_entry *cell, + void *buf, size_t *len, const char *id, int index) { int rc; =20 @@ -1425,7 +1440,7 @@ static int __nvmem_cell_read(struct nvmem_device *nvm= em, nvmem_shift_read_buffer_in_place(cell, buf); =20 if (nvmem->cell_post_process) { - rc =3D nvmem->cell_post_process(nvmem->priv, id, + rc =3D nvmem->cell_post_process(nvmem->priv, id, index, cell->offset, buf, cell->bytes); if (rc) return rc; @@ -1460,7 +1475,7 @@ void *nvmem_cell_read(struct nvmem_cell *cell, size_t= *len) if (!buf) return ERR_PTR(-ENOMEM); =20 - rc =3D __nvmem_cell_read(nvmem, cell->entry, buf, len, cell->id); + rc =3D __nvmem_cell_read(nvmem, cell->entry, buf, len, cell->id, cell->in= dex); if (rc) { kfree(buf); return ERR_PTR(rc); @@ -1773,7 +1788,7 @@ ssize_t nvmem_device_cell_read(struct nvmem_device *n= vmem, if (rc) return rc; =20 - rc =3D __nvmem_cell_read(nvmem, &cell, buf, &len, NULL); + rc =3D __nvmem_cell_read(nvmem, &cell, buf, &len, NULL, 0); if (rc) return rc; =20 diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index 14284e866f26..e9b52ecb3f72 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -222,8 +222,8 @@ static int imx_ocotp_read(void *context, unsigned int o= ffset, return ret; } =20 -static int imx_ocotp_cell_pp(void *context, const char *id, unsigned int o= ffset, - void *data, size_t bytes) +static int imx_ocotp_cell_pp(void *context, const char *id, int index, + unsigned int offset, void *data, size_t bytes) { struct ocotp_priv *priv =3D context; =20 diff --git a/include/linux/nvmem-provider.h b/include/linux/nvmem-provider.h index 50caa117cb62..8f964b394292 100644 --- a/include/linux/nvmem-provider.h +++ b/include/linux/nvmem-provider.h @@ -20,8 +20,8 @@ typedef int (*nvmem_reg_read_t)(void *priv, unsigned int = offset, typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset, void *val, size_t bytes); /* used for vendor specific post processing of cell data */ -typedef int (*nvmem_cell_post_process_t)(void *priv, const char *id, unsig= ned int offset, - void *buf, size_t bytes); +typedef int (*nvmem_cell_post_process_t)(void *priv, const char *id, int i= ndex, + unsigned int offset, void *buf, size_t bytes); =20 enum nvmem_type { NVMEM_TYPE_UNKNOWN =3D 0, --=20 2.30.2