From nobody Mon Apr 6 23:17:58 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 041DEECAAD3 for ; Thu, 1 Sep 2022 22:22:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235317AbiIAWWQ (ORCPT ); Thu, 1 Sep 2022 18:22:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234587AbiIAWVC (ORCPT ); Thu, 1 Sep 2022 18:21:02 -0400 Received: from mail.3ffe.de (0001.3ffe.de [IPv6:2a01:4f8:c0c:9d57::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2413EA1A7A; Thu, 1 Sep 2022 15:19:20 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.3ffe.de (Postfix) with ESMTPSA id EC95421F3; Fri, 2 Sep 2022 00:19:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2022082101; t=1662070753; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LIX4yxuF0DGmjyYqcq9SoUgQqK7P8vqfhJMPdhCjIuY=; b=1pWbuAxWdMwT5D8wMxbQzVDKrwv53ygywBxxhmfilg0XfGxJYOy068oczfGF5yk0ax3Cte 3mH8erEbjQjmTQniaLsRuSogHTGuqvdhAE4QHrosV84qP8rmfiL9QAAGWNpLZcZpuJJF5F Oq4LWyO9BtAWXi+5b6iqmPjNCDioaZgcCzJ1W7aFiYZgyxNU5scoEA53MmYEPcngT8BQ9t YjBCs1V1tz6fX2UQZ63i6/s5T5DhOlFCu89JDDeKfhtxsZgjPp1fq7Eqb/uh9xz+KsZeHq f3hlIGoQxMxvySycN+g1aeMbCS9XGFomw5COSImxeQM5r/vJStVD4OGW3zp4hQ== From: Michael Walle To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , Shawn Guo , Li Yang , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Frank Rowand Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ahmad Fatoum , Philipp Zabel , Michael Walle Subject: [PATCH v2 11/20] nvmem: imx-ocotp: replace global post processing with layouts Date: Fri, 2 Sep 2022 00:18:48 +0200 Message-Id: <20220901221857.2600340-12-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220901221857.2600340-1-michael@walle.cc> References: <20220901221857.2600340-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam: Yes Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In preparation of retiring the global post processing hook change this driver to use layouts. The layout will be supplied during registration and will be used to add the post processing hook to all added cells. Signed-off-by: Michael Walle Tested-by: Michael Walle # on kontron-pitx-imx8m --- Complile-time tested only! Please test. changes since v1: - new patch drivers/nvmem/imx-ocotp.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index e9b52ecb3f72..ac0edb6398f1 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -225,18 +225,13 @@ static int imx_ocotp_read(void *context, unsigned int= offset, static int imx_ocotp_cell_pp(void *context, const char *id, int index, unsigned int offset, void *data, size_t bytes) { - struct ocotp_priv *priv =3D context; + u8 *buf =3D data; + int i; =20 /* Deal with some post processing of nvmem cell data */ - if (id && !strcmp(id, "mac-address")) { - if (priv->params->reverse_mac_address) { - u8 *buf =3D data; - int i; - - for (i =3D 0; i < bytes/2; i++) - swap(buf[i], buf[bytes - i - 1]); - } - } + if (id && !strcmp(id, "mac-address")) + for (i =3D 0; i < bytes / 2; i++) + swap(buf[i], buf[bytes - i - 1]); =20 return 0; } @@ -488,7 +483,6 @@ static struct nvmem_config imx_ocotp_nvmem_config =3D { .stride =3D 1, .reg_read =3D imx_ocotp_read, .reg_write =3D imx_ocotp_write, - .cell_post_process =3D imx_ocotp_cell_pp, }; =20 static const struct ocotp_params imx6q_params =3D { @@ -595,6 +589,17 @@ static const struct of_device_id imx_ocotp_dt_ids[] = =3D { }; MODULE_DEVICE_TABLE(of, imx_ocotp_dt_ids); =20 +static void imx_ocotp_fixup_cell_info(struct nvmem_device *nvmem, + struct nvmem_layout *layout, + struct nvmem_cell_info *cell) +{ + cell->read_post_process =3D imx_ocotp_cell_pp; +} + +struct nvmem_layout imx_ocotp_layout =3D { + .fixup_cell_info =3D imx_ocotp_fixup_cell_info, +}; + static int imx_ocotp_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; @@ -619,6 +624,9 @@ static int imx_ocotp_probe(struct platform_device *pdev) imx_ocotp_nvmem_config.size =3D 4 * priv->params->nregs; imx_ocotp_nvmem_config.dev =3D dev; imx_ocotp_nvmem_config.priv =3D priv; + if (priv->params->reverse_mac_address) + imx_ocotp_nvmem_config.layout =3D &imx_ocotp_layout; + priv->config =3D &imx_ocotp_nvmem_config; =20 clk_prepare_enable(priv->clk); --=20 2.30.2