From nobody Mon Apr 6 21:32:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2BFAC64991 for ; Thu, 1 Sep 2022 17:33:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234189AbiIARdL (ORCPT ); Thu, 1 Sep 2022 13:33:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233027AbiIARdI (ORCPT ); Thu, 1 Sep 2022 13:33:08 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43306844D3 for ; Thu, 1 Sep 2022 10:33:03 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id b9-20020a170903228900b001730a0e11e5so12189504plh.19 for ; Thu, 01 Sep 2022 10:33:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date; bh=ofkPShsbSyFZI8RD89m1othYee0wghfvC+xOO3506Ww=; b=f2dd3K7JeejrjsilIf7B/bJPMfWDAesXu74GJj5UL5npsZ7j6ECo4hfl8eZJB/bNr3 bCdkXlUWwDY6FJNayKbHXBSl2B8PDA5tdlW2msiT3NoNm4HmjyaBEeGzlyiyjn5rnxZ4 x8FPhCZ8agVZtma2hSpCkQ4MqpAyumxQUFlpVImng5LLoStpvYNZDxOVJetkEHnN4Psn 8fc7dncVnaSCBIo+BZ4MoBd/NJLiK4AdFy/0T8gXysm5dZO6tHNKbWoN7o90lBA2G+Ys TI1GTbTnjTe4wn0NvwvBWRH2jesFS/3QxI/DLTPdIptUvfv4oJPvutgdLoa8wIN6Te/j I0PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date; bh=ofkPShsbSyFZI8RD89m1othYee0wghfvC+xOO3506Ww=; b=Ev+7KWOV90xZIvhe/8qROIu2yu1jHCZvndj+kZBvYUhiYXoS+QKEjRXX2LxQZkUWuH F7b/Rwh+eGIBv377PCVMBQ6F+KZilWn06stuc4T5msoQT3/Gz6A0fgAH/PhWREPjr5Ua jlgY3hSfvKyZEB8L9w+6ay6R8OAYSyHknTi4H407ueSamBqZUDsX4Ol0CGNEcJ8LqvwE BeIdwJdIgwT5T4c+zEWympPRHr3d8Iu+xU5NP8BjwWlRKdfWSYYEYTUBBkDVAS1vaSLD i5KZ4ixu5dGt1WS1tmZouPRjqCg99b8Yz8x299hIj0liG/KSITy2GM8Xuv4X2CQ5+T1w dqkg== X-Gm-Message-State: ACgBeo0D8pka6u3LlBkqkjha+3TQw0TMqjkkzQ1Zx1aS3jKs9AGTLkUf woWkdu6MUP1bRv9Z31lHnCVvZJzgQHw= X-Google-Smtp-Source: AA6agR4P+E5miP9Nzqe0YpKuXmcmAYUmB55ligejTXr1uwXWZNlQ62OIme5k2Kuvg5q1JpWRl1OlVS+7czk= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90a:e655:b0:1fe:4ec3:aba with SMTP id ep21-20020a17090ae65500b001fe4ec30abamr236338pjb.182.1662053582852; Thu, 01 Sep 2022 10:33:02 -0700 (PDT) Reply-To: Sean Christopherson Date: Thu, 1 Sep 2022 17:32:54 +0000 In-Reply-To: <20220901173258.925729-1-seanjc@google.com> Mime-Version: 1.0 References: <20220901173258.925729-1-seanjc@google.com> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog Message-ID: <20220901173258.925729-2-seanjc@google.com> Subject: [PATCH v4 1/5] perf/x86/core: Remove unnecessary stubs provided for KVM-only helpers From: Sean Christopherson To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Sean Christopherson , Paolo Bonzini Cc: Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove CONFIG_PERF_EVENT=3Dn stubs for functions that are effectively KVM-only. KVM selects PERF_EVENT and will never consume the stubs. Dropping the unnecessary stubs will allow simplifying x86_perf_get_lbr() by getting rid of the impossible-to-hit error path (which KVM doesn't even check). Opportunstically reorganize the declarations to collapse multiple CONFIG_PERF_EVENTS #ifdefs. Signed-off-by: Sean Christopherson Acked-by: Peter Zijlstra (Intel) Reported-by: kernel test robot --- arch/x86/include/asm/perf_event.h | 53 ++++++++----------------------- 1 file changed, 13 insertions(+), 40 deletions(-) diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_= event.h index f6fc8dd51ef4..f839eb55f298 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -525,46 +525,18 @@ extern u64 perf_get_hw_event_config(int hw_event); extern void perf_check_microcode(void); extern void perf_clear_dirty_counters(void); extern int x86_perf_rdpmc_index(struct perf_event *event); -#else -static inline void perf_get_x86_pmu_capability(struct x86_pmu_capability *= cap) -{ - memset(cap, 0, sizeof(*cap)); -} =20 -static inline u64 perf_get_hw_event_config(int hw_event) -{ - return 0; -} - -static inline void perf_events_lapic_init(void) { } -static inline void perf_check_microcode(void) { } -#endif - -#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) +#ifdef CONFIG_CPU_SUP_INTEL extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *da= ta); extern int x86_perf_get_lbr(struct x86_pmu_lbr *lbr); -#else -struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *data); -static inline int x86_perf_get_lbr(struct x86_pmu_lbr *lbr) -{ - return -1; -} -#endif +extern void intel_pt_handle_vmx(int on); +#endif /* CONFIG_CPU_SUP_INTEL */ =20 -#ifdef CONFIG_CPU_SUP_INTEL - extern void intel_pt_handle_vmx(int on); -#else -static inline void intel_pt_handle_vmx(int on) -{ +#ifdef CONFIG_CPU_SUP_AMD +extern void amd_pmu_enable_virt(void); +extern void amd_pmu_disable_virt(void); =20 -} -#endif - -#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD) - extern void amd_pmu_enable_virt(void); - extern void amd_pmu_disable_virt(void); - -#if defined(CONFIG_PERF_EVENTS_AMD_BRS) +#ifdef CONFIG_PERF_EVENTS_AMD_BRS =20 #define PERF_NEEDS_LOPWR_CB 1 =20 @@ -582,12 +554,13 @@ static inline void perf_lopwr_cb(bool lopwr_in) static_call_mod(perf_lopwr_cb)(lopwr_in); } =20 -#endif /* PERF_NEEDS_LOPWR_CB */ +#endif /* CONFIG_PERF_EVENTS_AMD_BRS */ +#endif /* CONFIG_CPU_SUP_AMD */ =20 -#else - static inline void amd_pmu_enable_virt(void) { } - static inline void amd_pmu_disable_virt(void) { } -#endif +#else /* !CONFIG_PERF_EVENTS */ +static inline void perf_events_lapic_init(void) { } +static inline void perf_check_microcode(void) { } +#endif /* CONFIG_PERF_EVENTS */ =20 #define arch_perf_out_copy_user copy_from_user_nmi =20 --=20 2.37.2.789.g6183377224-goog From nobody Mon Apr 6 21:32:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 253A6C64991 for ; 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Thu, 01 Sep 2022 10:33:04 -0700 (PDT) Reply-To: Sean Christopherson Date: Thu, 1 Sep 2022 17:32:55 +0000 In-Reply-To: <20220901173258.925729-1-seanjc@google.com> Mime-Version: 1.0 References: <20220901173258.925729-1-seanjc@google.com> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog Message-ID: <20220901173258.925729-3-seanjc@google.com> Subject: [PATCH v4 2/5] perf/x86/core: Drop the unnecessary return value from x86_perf_get_lbr() From: Sean Christopherson To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Sean Christopherson , Paolo Bonzini Cc: Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Drop the return value from x86_perf_get_lbr() now that there's no stub, i.e. now that success is guaranteed (which is a bit of a lie since success was always guaranteed, it's just more obvious now). Signed-off-by: Sean Christopherson Acked-by: Peter Zijlstra (Intel) --- arch/x86/events/intel/lbr.c | 6 +----- arch/x86/include/asm/perf_event.h | 2 +- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c index 4f70fb6c2c1e..b8ad31c52cf0 100644 --- a/arch/x86/events/intel/lbr.c +++ b/arch/x86/events/intel/lbr.c @@ -1868,10 +1868,8 @@ void __init intel_pmu_arch_lbr_init(void) * x86_perf_get_lbr - get the LBR records information * * @lbr: the caller's memory to store the LBR records information - * - * Returns: 0 indicates the LBR info has been successfully obtained */ -int x86_perf_get_lbr(struct x86_pmu_lbr *lbr) +void x86_perf_get_lbr(struct x86_pmu_lbr *lbr) { int lbr_fmt =3D x86_pmu.intel_cap.lbr_format; =20 @@ -1879,8 +1877,6 @@ int x86_perf_get_lbr(struct x86_pmu_lbr *lbr) lbr->from =3D x86_pmu.lbr_from; lbr->to =3D x86_pmu.lbr_to; lbr->info =3D (lbr_fmt =3D=3D LBR_FORMAT_INFO) ? x86_pmu.lbr_info : 0; - - return 0; } EXPORT_SYMBOL_GPL(x86_perf_get_lbr); =20 diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_= event.h index f839eb55f298..f6d9230cdfab 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -528,7 +528,7 @@ extern int x86_perf_rdpmc_index(struct perf_event *even= t); =20 #ifdef CONFIG_CPU_SUP_INTEL extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *da= ta); -extern int x86_perf_get_lbr(struct x86_pmu_lbr *lbr); +extern void x86_perf_get_lbr(struct x86_pmu_lbr *lbr); extern void intel_pt_handle_vmx(int on); #endif /* CONFIG_CPU_SUP_INTEL */ =20 --=20 2.37.2.789.g6183377224-goog From nobody Mon Apr 6 21:32:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D0FDECAAD1 for ; Thu, 1 Sep 2022 17:33:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234624AbiIARd1 (ORCPT ); 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Thu, 01 Sep 2022 10:33:06 -0700 (PDT) Reply-To: Sean Christopherson Date: Thu, 1 Sep 2022 17:32:56 +0000 In-Reply-To: <20220901173258.925729-1-seanjc@google.com> Mime-Version: 1.0 References: <20220901173258.925729-1-seanjc@google.com> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog Message-ID: <20220901173258.925729-4-seanjc@google.com> Subject: [PATCH v4 3/5] KVM: VMX: Move vmx_get_perf_capabilities() definition to vmx.c From: Sean Christopherson To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Sean Christopherson , Paolo Bonzini Cc: Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move vmx_get_perf_capabilities() to vmx.c as a non-inline function so that it can safely reference x86_perf_get_lbr(), which is available iff CPU_SUP_INTEL=3Dy, i.e. only if kvm_intel is being built. The helper is non-trivial and isn't used in any paths that are performance critical, i.e. doesn't need to be inlined. No functional change intended. Signed-off-by: Sean Christopherson Acked-by: Peter Zijlstra (Intel) --- arch/x86/kvm/vmx/capabilities.h | 24 ++---------------------- arch/x86/kvm/vmx/vmx.c | 22 ++++++++++++++++++++++ 2 files changed, 24 insertions(+), 22 deletions(-) diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilitie= s.h index c5e5dfef69c7..23dca5ebae16 100644 --- a/arch/x86/kvm/vmx/capabilities.h +++ b/arch/x86/kvm/vmx/capabilities.h @@ -75,6 +75,8 @@ struct vmx_capability { }; extern struct vmx_capability vmx_capability; =20 +u64 vmx_get_perf_capabilities(void); + static inline bool cpu_has_vmx_basic_inout(void) { return (((u64)vmcs_config.basic_cap << 32) & VMX_BASIC_INOUT); @@ -401,28 +403,6 @@ static inline bool vmx_pebs_supported(void) return boot_cpu_has(X86_FEATURE_PEBS) && kvm_pmu_cap.pebs_ept; } =20 -static inline u64 vmx_get_perf_capabilities(void) -{ - u64 perf_cap =3D PMU_CAP_FW_WRITES; - u64 host_perf_cap =3D 0; - - if (!enable_pmu) - return 0; - - if (boot_cpu_has(X86_FEATURE_PDCM)) - rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap); - - perf_cap |=3D host_perf_cap & PMU_CAP_LBR_FMT; - - if (vmx_pebs_supported()) { - perf_cap |=3D host_perf_cap & PERF_CAP_PEBS_MASK; - if ((perf_cap & PERF_CAP_PEBS_FORMAT) < 4) - perf_cap &=3D ~PERF_CAP_PEBS_BASELINE; - } - - return perf_cap; -} - static inline u64 vmx_supported_debugctl(void) { u64 debugctl =3D 0; diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index c9b49a09e6b5..657fa9908bf9 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1826,6 +1826,28 @@ static inline bool vmx_feature_control_msr_valid(str= uct kvm_vcpu *vcpu, return !(val & ~valid_bits); } =20 +u64 vmx_get_perf_capabilities(void) +{ + u64 perf_cap =3D PMU_CAP_FW_WRITES; + u64 host_perf_cap =3D 0; + + if (!enable_pmu) + return 0; + + if (boot_cpu_has(X86_FEATURE_PDCM)) + rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap); + + perf_cap |=3D host_perf_cap & PMU_CAP_LBR_FMT; + + if (vmx_pebs_supported()) { + perf_cap |=3D host_perf_cap & PERF_CAP_PEBS_MASK; + if ((perf_cap & PERF_CAP_PEBS_FORMAT) < 4) + perf_cap &=3D ~PERF_CAP_PEBS_BASELINE; + } + + return perf_cap; +} + static int vmx_get_msr_feature(struct kvm_msr_entry *msr) { switch (msr->index) { --=20 2.37.2.789.g6183377224-goog From nobody Mon Apr 6 21:32:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E85BECAAD5 for ; Thu, 1 Sep 2022 17:33:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234702AbiIARdi (ORCPT ); Thu, 1 Sep 2022 13:33:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234325AbiIARdM (ORCPT ); Thu, 1 Sep 2022 13:33:12 -0400 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A08694134 for ; Thu, 1 Sep 2022 10:33:08 -0700 (PDT) Received: by mail-pl1-x64a.google.com with SMTP id p18-20020a170902a41200b00172b0dc71e0so12136122plq.0 for ; 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Thu, 01 Sep 2022 10:33:07 -0700 (PDT) Reply-To: Sean Christopherson Date: Thu, 1 Sep 2022 17:32:57 +0000 In-Reply-To: <20220901173258.925729-1-seanjc@google.com> Mime-Version: 1.0 References: <20220901173258.925729-1-seanjc@google.com> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog Message-ID: <20220901173258.925729-5-seanjc@google.com> Subject: [PATCH v4 4/5] KVM: VMX: Fold vmx_supported_debugctl() into vcpu_supported_debugctl() From: Sean Christopherson To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Sean Christopherson , Paolo Bonzini Cc: Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Fold vmx_supported_debugctl() into vcpu_supported_debugctl(), its only caller. Setting bits only to clear them a few instructions later is rather silly, and splitting the logic makes things seem more complicated than they actually are. Opportunistically drop DEBUGCTLMSR_LBR_MASK now that there's a single reference to the pair of bits. The extra layer of indirection provides no meaningful value and makes it unnecessarily tedious to understand what KVM is doing. No functional change. Signed-off-by: Sean Christopherson Acked-by: Peter Zijlstra (Intel) --- arch/x86/kvm/vmx/capabilities.h | 15 --------------- arch/x86/kvm/vmx/vmx.c | 12 +++++++----- 2 files changed, 7 insertions(+), 20 deletions(-) diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilitie= s.h index 23dca5ebae16..189a64a6e139 100644 --- a/arch/x86/kvm/vmx/capabilities.h +++ b/arch/x86/kvm/vmx/capabilities.h @@ -24,8 +24,6 @@ extern int __read_mostly pt_mode; #define PMU_CAP_FW_WRITES (1ULL << 13) #define PMU_CAP_LBR_FMT 0x3f =20 -#define DEBUGCTLMSR_LBR_MASK (DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_O= N_PMI) - struct nested_vmx_msrs { /* * We only store the "true" versions of the VMX capability MSRs. We @@ -403,19 +401,6 @@ static inline bool vmx_pebs_supported(void) return boot_cpu_has(X86_FEATURE_PEBS) && kvm_pmu_cap.pebs_ept; } =20 -static inline u64 vmx_supported_debugctl(void) -{ - u64 debugctl =3D 0; - - if (boot_cpu_has(X86_FEATURE_BUS_LOCK_DETECT)) - debugctl |=3D DEBUGCTLMSR_BUS_LOCK_DETECT; - - if (vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT) - debugctl |=3D DEBUGCTLMSR_LBR_MASK; - - return debugctl; -} - static inline bool cpu_has_notify_vmexit(void) { return vmcs_config.cpu_based_2nd_exec_ctrl & diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 657fa9908bf9..a5e3c1e6aa2b 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -2030,13 +2030,15 @@ static u64 nested_vmx_truncate_sysenter_addr(struct= kvm_vcpu *vcpu, =20 static u64 vcpu_supported_debugctl(struct kvm_vcpu *vcpu) { - u64 debugctl =3D vmx_supported_debugctl(); + u64 debugctl =3D 0; =20 - if (!intel_pmu_lbr_is_enabled(vcpu)) - debugctl &=3D ~DEBUGCTLMSR_LBR_MASK; + if (boot_cpu_has(X86_FEATURE_BUS_LOCK_DETECT) && + guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT)) + debugctl |=3D DEBUGCTLMSR_BUS_LOCK_DETECT; =20 - if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT)) - debugctl &=3D ~DEBUGCTLMSR_BUS_LOCK_DETECT; + if ((vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT) && + intel_pmu_lbr_is_enabled(vcpu)) + debugctl |=3D DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI; =20 return debugctl; } --=20 2.37.2.789.g6183377224-goog From nobody Mon Apr 6 21:32:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5C4FECAAD3 for ; Thu, 1 Sep 2022 17:33:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233907AbiIARdm (ORCPT ); Thu, 1 Sep 2022 13:33:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234346AbiIARdM (ORCPT ); Thu, 1 Sep 2022 13:33:12 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BC739413E for ; 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charset="utf-8" Advertise LBR support to userspace via MSR_IA32_PERF_CAPABILITIES if and only if perf fully supports LBRs. Perf may disable LBRs (by zeroing the number of LBRs) even on platforms the allegedly support LBRs, e.g. if probing any LBR MSRs during setup fails. Fixes: be635e34c284 ("KVM: vmx/pmu: Expose LBR_FMT in the MSR_IA32_PERF_CAP= ABILITIES") Reported-by: Like Xu Signed-off-by: Sean Christopherson Acked-by: Peter Zijlstra (Intel) --- arch/x86/kvm/vmx/vmx.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index a5e3c1e6aa2b..8e237268ac10 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1829,6 +1829,7 @@ static inline bool vmx_feature_control_msr_valid(stru= ct kvm_vcpu *vcpu, u64 vmx_get_perf_capabilities(void) { u64 perf_cap =3D PMU_CAP_FW_WRITES; + struct x86_pmu_lbr lbr; u64 host_perf_cap =3D 0; =20 if (!enable_pmu) @@ -1837,7 +1838,9 @@ u64 vmx_get_perf_capabilities(void) if (boot_cpu_has(X86_FEATURE_PDCM)) rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap); =20 - perf_cap |=3D host_perf_cap & PMU_CAP_LBR_FMT; + x86_perf_get_lbr(&lbr); + if (lbr.nr) + perf_cap |=3D host_perf_cap & PMU_CAP_LBR_FMT; =20 if (vmx_pebs_supported()) { perf_cap |=3D host_perf_cap & PERF_CAP_PEBS_MASK; --=20 2.37.2.789.g6183377224-goog