From nobody Mon Apr 6 23:07:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66D59ECAAD1 for ; Thu, 1 Sep 2022 11:01:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234409AbiIALBE (ORCPT ); Thu, 1 Sep 2022 07:01:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37988 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234364AbiIALAu (ORCPT ); Thu, 1 Sep 2022 07:00:50 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F0CE112EE1 for ; Thu, 1 Sep 2022 04:00:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662030048; x=1693566048; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4JuSa0rA3IYfbc1uPjs5ktJOF53Z7JxjEPKEsf3ZhHw=; b=RINQbBnvgmiWHEMw8mFxMRQFzaOV9cI1NkqKxfa14gc0w/jAa7D7gfgk TdiwCWfboSgHSDhGvA1MOsWBIncWiaiu6rOkrCbJ8PkAJaeDEXvHE5fnC edeJ19tSM9olNvbJlJw7ssH6tjHDgIv3/LFfz+plxxKd/ZKNH2y4q3UF5 BoPmt2lisU8cACSL7T/AMOrIMKHSQW5e429zzF5q3nVZWkn2lEJDjEIIn WgKK6qLYTw+aveEWLgMP+krYNrf43e9P7BSj9ILCzjL9Ed0+fT+tN50BY Xzb7RN1Ixq45f5iJ3h6ivTf2lpSeKGYzINhWMUsV5lHStZntJ4UPShkKx g==; X-IronPort-AV: E=McAfee;i="6500,9779,10456"; a="294424787" X-IronPort-AV: E=Sophos;i="5.93,280,1654585200"; d="scan'208";a="294424787" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2022 04:00:48 -0700 X-IronPort-AV: E=Sophos;i="5.93,280,1654585200"; d="scan'208";a="673799618" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.252.42.13]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2022 04:00:45 -0700 From: Adrian Hunter To: Arnaldo Carvalho de Melo Cc: Jiri Olsa , Namhyung Kim , Ian Rogers , Andi Kleen , linux-kernel@vger.kernel.org Subject: [PATCH 1/5] perf tools: Add perf_config_scan() Date: Thu, 1 Sep 2022 14:00:28 +0300 Message-Id: <20220901110032.9226-2-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901110032.9226-1-adrian.hunter@intel.com> References: <20220901110032.9226-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To simplify getting a single config value, add a function to scan a config variable. Signed-off-by: Adrian Hunter --- tools/perf/util/config.c | 31 +++++++++++++++++++++++++++++++ tools/perf/util/config.h | 1 + 2 files changed, 32 insertions(+) diff --git a/tools/perf/util/config.c b/tools/perf/util/config.c index 60ce5908c664..3f2ae19a1dd4 100644 --- a/tools/perf/util/config.c +++ b/tools/perf/util/config.c @@ -908,3 +908,34 @@ void set_buildid_dir(const char *dir) /* for communicating with external commands */ setenv("PERF_BUILDID_DIR", buildid_dir, 1); } + +struct perf_config_scan_data { + const char *name; + const char *fmt; + va_list args; + int ret; +}; + +static int perf_config_scan_cb(const char *var, const char *value, void *d= ata) +{ + struct perf_config_scan_data *d =3D data; + + if (!strcmp(var, d->name)) + d->ret =3D vsscanf(value, d->fmt, d->args); + + return 0; +} + +int perf_config_scan(const char *name, const char *fmt, ...) +{ + struct perf_config_scan_data d =3D { + .name =3D name, + .fmt =3D fmt, + }; + + va_start(d.args, fmt); + perf_config(perf_config_scan_cb, &d); + va_end(d.args); + + return d.ret; +} diff --git a/tools/perf/util/config.h b/tools/perf/util/config.h index 2fd77aaff4d2..2e5e808928a5 100644 --- a/tools/perf/util/config.h +++ b/tools/perf/util/config.h @@ -29,6 +29,7 @@ typedef int (*config_fn_t)(const char *, const char *, vo= id *); =20 int perf_default_config(const char *, const char *, void *); int perf_config(config_fn_t fn, void *); +int perf_config_scan(const char *name, const char *fmt, ...) __scanf(2, 3); int perf_config_set(struct perf_config_set *set, config_fn_t fn, void *data); int perf_config_int(int *dest, const char *, const char *); --=20 2.25.1 From nobody Mon Apr 6 23:07:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90BBCECAAD1 for ; Thu, 1 Sep 2022 11:01:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234397AbiIALBI (ORCPT ); Thu, 1 Sep 2022 07:01:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234381AbiIALBA (ORCPT ); Thu, 1 Sep 2022 07:01:00 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 428DB1144CF for ; Thu, 1 Sep 2022 04:00:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662030050; x=1693566050; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+COgNiJU60nrHtd5yoDxcybxCHTdKYQtexMUf29NKBA=; b=BNg3u820hedk6LcWtUnC/nYpks68wLs+mD2Vi5sUHC1ovH3aFYlSAfw5 j+BMTB1liC8n5C7z8c8EHnSzXBWzuEMFJcd3DFOsgUeiR7jeRFEOJA/Kd j9C3jZTCy5C1PjoiQrPX/n/5s90TQb6xY/Dl/qWHvth2VN9Ztxb85heh6 xj+Dcozz+yb+tJB9PJBEVWK3eUqb53fFV46FJiT1SnKo3ps34NZFsl2Bc K/zAZjAwpU+0T612AsOr1lOy0hAxnt9AG8T2pjc7TF3/p0HMV7trjPVBU X4jD5SMOU35ircc8LPRcc1z0RsKejrQL761S071b+OTgTLGRSd90nqjt2 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10456"; a="294424792" X-IronPort-AV: E=Sophos;i="5.93,280,1654585200"; d="scan'208";a="294424792" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2022 04:00:50 -0700 X-IronPort-AV: E=Sophos;i="5.93,280,1654585200"; d="scan'208";a="673799633" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.252.42.13]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2022 04:00:48 -0700 From: Adrian Hunter To: Arnaldo Carvalho de Melo Cc: Jiri Olsa , Namhyung Kim , Ian Rogers , Andi Kleen , linux-kernel@vger.kernel.org Subject: [PATCH 2/5] perf auxtrace: Add itrace option flag d+e to log on error Date: Thu, 1 Sep 2022 14:00:29 +0300 Message-Id: <20220901110032.9226-3-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901110032.9226-1-adrian.hunter@intel.com> References: <20220901110032.9226-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add flag +e to the itrace d (decoder debug log) option to get output only on decoding errors. The log can be very big so reducing the output to where there are decoding errors can be useful for analyzing errors. By default, the log size in that case is 16384 bytes, but can be altered by perf config e.g. perf config itrace.debug-log-buffer-size=3D30000 Signed-off-by: Adrian Hunter --- tools/perf/Documentation/itrace.txt | 1 + tools/perf/Documentation/perf-config.txt | 7 +++++++ tools/perf/util/auxtrace.c | 13 +++++++++++++ tools/perf/util/auxtrace.h | 3 +++ 4 files changed, 24 insertions(+) diff --git a/tools/perf/Documentation/itrace.txt b/tools/perf/Documentation= /itrace.txt index 6b189669c450..0916bbfe64cb 100644 --- a/tools/perf/Documentation/itrace.txt +++ b/tools/perf/Documentation/itrace.txt @@ -64,6 +64,7 @@ debug messages will or will not be logged. Each flag must be preceded by either '+' or '-'. The flags are: a all perf events + e output only on errors (size configurable - see linkperf:perf-config[1]) o output to stdout =20 If supported, the 'q' option may be repeated to increase the effect. diff --git a/tools/perf/Documentation/perf-config.txt b/tools/perf/Document= ation/perf-config.txt index 0420e71698ee..39c890ead2dc 100644 --- a/tools/perf/Documentation/perf-config.txt +++ b/tools/perf/Documentation/perf-config.txt @@ -729,6 +729,13 @@ auxtrace.*:: If the directory does not exist or has the wrong file type, the current directory is used. =20 +itrace.*:: + + debug-log-buffer-size:: + Log size in bytes to output when using the option --itrace=3Dd+e + Refer 'itrace' option of linkperf:perf-script[1] or + linkperf:perf-report[1]. The default is 16384. + daemon.*:: =20 daemon.base:: diff --git a/tools/perf/util/auxtrace.c b/tools/perf/util/auxtrace.c index 6edab8a16de6..b59c278fe9ed 100644 --- a/tools/perf/util/auxtrace.c +++ b/tools/perf/util/auxtrace.c @@ -26,6 +26,7 @@ #include #include =20 +#include "config.h" #include "evlist.h" #include "dso.h" #include "map.h" @@ -1434,6 +1435,16 @@ static int get_flags(const char **ptr, unsigned int = *plus_flags, unsigned int *m } } =20 +#define ITRACE_DFLT_LOG_ON_ERROR_SZ 16384 + +static unsigned int itrace_log_on_error_size(void) +{ + unsigned int sz =3D 0; + + perf_config_scan("itrace.debug-log-buffer-size", "%u", &sz); + return sz ?: ITRACE_DFLT_LOG_ON_ERROR_SZ; +} + /* * Please check tools/perf/Documentation/perf-script.txt for information * about the options parsed here, which is introduced after this cset, @@ -1532,6 +1543,8 @@ int itrace_do_parse_synth_opts(struct itrace_synth_op= ts *synth_opts, if (get_flags(&p, &synth_opts->log_plus_flags, &synth_opts->log_minus_flags)) goto out_err; + if (synth_opts->log_plus_flags & AUXTRACE_LOG_FLG_ON_ERROR) + synth_opts->log_on_error_size =3D itrace_log_on_error_size(); break; case 'c': synth_opts->branches =3D true; diff --git a/tools/perf/util/auxtrace.h b/tools/perf/util/auxtrace.h index 6a4fbfd34c6b..cb8e0a01abb6 100644 --- a/tools/perf/util/auxtrace.h +++ b/tools/perf/util/auxtrace.h @@ -60,6 +60,7 @@ enum itrace_period_type { #define AUXTRACE_ERR_FLG_DATA_LOST (1 << ('l' - 'a')) =20 #define AUXTRACE_LOG_FLG_ALL_PERF_EVTS (1 << ('a' - 'a')) +#define AUXTRACE_LOG_FLG_ON_ERROR (1 << ('e' - 'a')) #define AUXTRACE_LOG_FLG_USE_STDOUT (1 << ('o' - 'a')) =20 /** @@ -110,6 +111,7 @@ enum itrace_period_type { * @log_plus_flags: flags to affect what is logged * @log_minus_flags: flags to affect what is logged * @quick: quicker (less detailed) decoding + * @log_on_error_size: size of log to keep for outputting log only on erro= rs */ struct itrace_synth_opts { bool set; @@ -155,6 +157,7 @@ struct itrace_synth_opts { unsigned int log_plus_flags; unsigned int log_minus_flags; unsigned int quick; + unsigned int log_on_error_size; }; =20 /** --=20 2.25.1 From nobody Mon Apr 6 23:07:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58544C0502C for ; Thu, 1 Sep 2022 11:01:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234217AbiIALBP (ORCPT ); Thu, 1 Sep 2022 07:01:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234395AbiIALBB (ORCPT ); Thu, 1 Sep 2022 07:01:01 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D0C5116E2E for ; Thu, 1 Sep 2022 04:00:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; 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01 Sep 2022 04:00:50 -0700 From: Adrian Hunter To: Arnaldo Carvalho de Melo Cc: Jiri Olsa , Namhyung Kim , Ian Rogers , Andi Kleen , linux-kernel@vger.kernel.org Subject: [PATCH 3/5] perf intel-pt: Improve man page layout slightly Date: Thu, 1 Sep 2022 14:00:30 +0300 Message-Id: <20220901110032.9226-4-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901110032.9226-1-adrian.hunter@intel.com> References: <20220901110032.9226-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Improve man page layout slightly by adding blank lines. Signed-off-by: Adrian Hunter --- tools/perf/Documentation/perf-intel-pt.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/tools/perf/Documentation/perf-intel-pt.txt b/tools/perf/Docume= ntation/perf-intel-pt.txt index 3dc3f0ccbd51..d5ddb968bcf4 100644 --- a/tools/perf/Documentation/perf-intel-pt.txt +++ b/tools/perf/Documentation/perf-intel-pt.txt @@ -943,12 +943,15 @@ event packets are recorded only if the "pwr_evt" conf= ig term was used. Refer to the config terms section above. The power events record information about C-state changes, whereas CBR is indicative of CPU frequency. perf script "event,synth" fields display information like this: + cbr: cbr: 22 freq: 2189 MHz (200%) mwait: hints: 0x60 extensions: 0x1 pwre: hw: 0 cstate: 2 sub-cstate: 0 exstop: ip: 1 pwrx: deepest cstate: 2 last cstate: 2 wake reason: 0x4 + Where: + "cbr" includes the frequency and the percentage of maximum non-turbo "mwait" shows mwait hints and extensions "pwre" shows C-state transitions (to a C-state deeper than C0) and @@ -956,6 +959,7 @@ Where: "exstop" indicates execution stopped and whether the IP was recorded exactly, "pwrx" indicates return to C0 + For more details refer to the Intel 64 and IA-32 Architectures Software Developer Manuals. =20 @@ -969,8 +973,10 @@ are quite important. Users must know if what they are= seeing is a complete picture or not. The "e" option may be followed by flags which affect what = errors will or will not be reported. Each flag must be preceded by either '+' or= '-'. The flags supported by Intel PT are: + -o Suppress overflow errors -l Suppress trace data lost errors + For example, for errors but not overflow or data lost errors: =20 --itrace=3De-o-l @@ -980,9 +986,11 @@ decoded packets and instructions. Note that this opti= on slows down the decoder and that the resulting file may be very large. The "d" option may be foll= owed by flags which affect what debug messages will or will not be logged. Each= flag must be preceded by either '+' or '-'. The flags support by Intel PT are: + -a Suppress logging of perf events +a Log all perf events +o Output to stdout instead of "intel_pt.log" + By default, logged perf events are filtered by any specified time ranges, = but flag +a overrides that. =20 --=20 2.25.1 From nobody Mon Apr 6 23:07:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40C6DECAAD1 for ; Thu, 1 Sep 2022 11:01:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234447AbiIALBR (ORCPT ); Thu, 1 Sep 2022 07:01:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234363AbiIALBB (ORCPT ); Thu, 1 Sep 2022 07:01:01 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 74BB111B60E for ; Thu, 1 Sep 2022 04:00:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662030054; x=1693566054; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Nd+dFMrIYKlvpN9Bna4ZvCa7BtWRiwnW4U6nXtKLvO0=; b=I10jcfcw1buXj/IEvEekFTfyuQcMpcfe4JfF35ZXBajbFI4QLf9iSwNs RjVtgDjsZuFnTOaSFfW6kcvwkyZfcudhu7aVXs3VYfa2eJaI5xBiYAMjR 3G6iqQsUp1KABcCqWYjBbhw/U/hwF57TX6/Y+oVzdJwrknbLQ9drH++yt be9b9VTQbWQKiCffYh1TFF3vDeo52ssI+lknC9ZPHGwP/4WZ7GUalJ4sx ty9jcXmOnBArrWTCpuktAU4283Dvthr55sjrcTbSCG76qIohpz7FNpwme aFnZLmUMC4geSofOZfzdRJR27pC9eIEUq4x10JHoBA5zy25Ewtxadejjn g==; X-IronPort-AV: E=McAfee;i="6500,9779,10456"; a="294424820" X-IronPort-AV: E=Sophos;i="5.93,280,1654585200"; d="scan'208";a="294424820" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2022 04:00:54 -0700 X-IronPort-AV: E=Sophos;i="5.93,280,1654585200"; d="scan'208";a="673799682" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.252.42.13]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2022 04:00:52 -0700 From: Adrian Hunter To: Arnaldo Carvalho de Melo Cc: Jiri Olsa , Namhyung Kim , Ian Rogers , Andi Kleen , linux-kernel@vger.kernel.org Subject: [PATCH 4/5] perf intel-pt: Improve object code read error message Date: Thu, 1 Sep 2022 14:00:31 +0300 Message-Id: <20220901110032.9226-5-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901110032.9226-1-adrian.hunter@intel.com> References: <20220901110032.9226-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The offset is more readable in hex instead of decimal. Signed-off-by: Adrian Hunter --- tools/perf/util/intel-pt.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c index d5e9fc8106dd..c01ff8001501 100644 --- a/tools/perf/util/intel-pt.c +++ b/tools/perf/util/intel-pt.c @@ -842,7 +842,8 @@ static int intel_pt_walk_next_insn(struct intel_pt_insn= *intel_pt_insn, offset, buf, INTEL_PT_INSN_BUF_SZ); if (len <=3D 0) { - intel_pt_log("ERROR: failed to read at %" PRIu64 " ", offset); + intel_pt_log("ERROR: failed to read at offset %#" PRIx64 " ", + offset); if (intel_pt_enable_logging) dso__fprintf(al.map->dso, intel_pt_log_fp()); return -EINVAL; --=20 2.25.1 From nobody Mon Apr 6 23:07:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B473ECAAD3 for ; Thu, 1 Sep 2022 11:01:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234422AbiIALBX (ORCPT ); Thu, 1 Sep 2022 07:01:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234406AbiIALBC (ORCPT ); Thu, 1 Sep 2022 07:01:02 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE21011E81D for ; Thu, 1 Sep 2022 04:00:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662030056; x=1693566056; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RtYK0BiDVziXnFNqLQQMzxTLP+0jwAiG2RMhkIE91Vo=; b=WQgNx6W8SBugKEbKH8mD7k2WvPL2HSOqzfhR6ouqT0tcl7ZWt6x0d65q Qw5sv7wvhqk8AKOF7lPRRkSwD94HPEjsRyWdO+YSMWCZOL7pAvU1ZX+SS TunCRA/MH6OkGvYPEUEO9J2drbVFlIzFceRSdr3BYVgM6GjLwLkBMWGHt 8S79l7syJ3EZla+nxYgCtBumMp1BiQwToEZEKAGTYuF8EZNNG/TjDVtlv P5xI8j8n1BmF3k1W0GO8iyff3EE3l1KR/S6IMBNl1Me3iNdJevrm1nttD cwC90Tpe0DzCt4uKfor/1kP0T2LzMxLlaVD1m7fS9VnARLdWrtNJWPZxs w==; X-IronPort-AV: E=McAfee;i="6500,9779,10456"; a="294424832" X-IronPort-AV: E=Sophos;i="5.93,280,1654585200"; d="scan'208";a="294424832" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2022 04:00:56 -0700 X-IronPort-AV: E=Sophos;i="5.93,280,1654585200"; d="scan'208";a="673799696" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.252.42.13]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2022 04:00:54 -0700 From: Adrian Hunter To: Arnaldo Carvalho de Melo Cc: Jiri Olsa , Namhyung Kim , Ian Rogers , Andi Kleen , linux-kernel@vger.kernel.org Subject: [PATCH 5/5] perf intel-pt: Support itrace option flag d+e to log on error Date: Thu, 1 Sep 2022 14:00:32 +0300 Message-Id: <20220901110032.9226-6-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901110032.9226-1-adrian.hunter@intel.com> References: <20220901110032.9226-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Pass d+e option and log size via intel_pt_log_enable(). Allocate a buffer for log messages and provide intel_pt_log_dump_buf() to dump and reset the buffer upon decoder errors. Example: $ sudo perf record -e intel_pt// sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.094 MB perf.data ] $ sudo perf config itrace.debug-log-buffer-size=3D300 $ sudo perf script --itrace=3Ded+e+o | head -20 Dumping debug log buffer (first line may be sliced) Other ffffffff96ca22f6: 48 89 e5 = Other ffffffff96ca22f9: 65 48 8b 05 ff e0 38 69 = Other ffffffff96ca2301: 48 3d c0 a5 c1 98 = Other ffffffff96ca2307: 74 08 = Jcc +8 ffffffff96ca2311: 5d = Other ffffffff96ca2312: c3 = Ret ERROR: Bad RET compression (TNT=3DN) at 0xffffffff96ca2312 End of debug log buffer dump instruction trace error type 1 time 15913.537143482 cpu 5 pid 36292 tid 3= 6292 ip 0xffffffff96ca2312 code 6: Trace doesn't match instruction Dumping debug log buffer (first line may be sliced) Other ffffffff96ce7fe9: f6 47 2e 20 = Other ffffffff96ce7fed: 74 11 = Jcc +17 ffffffff96ce7fef: 48 8b 87 28 0a 00 00 = Other ffffffff96ce7ff6: 5d = Other ffffffff96ce7ff7: 48 8b 40 18 = Other ffffffff96ce7ffb: c3 = Ret ERROR: Bad RET compression (TNT=3DN) at 0xffffffff96ce7ffb Warning: 8 instruction trace errors Signed-off-by: Adrian Hunter Reviewed-by: Andi Kleen --- tools/perf/Documentation/perf-intel-pt.txt | 5 +- .../perf/util/intel-pt-decoder/intel-pt-log.c | 94 ++++++++++++++++++- .../perf/util/intel-pt-decoder/intel-pt-log.h | 3 +- tools/perf/util/intel-pt.c | 20 +++- 4 files changed, 117 insertions(+), 5 deletions(-) diff --git a/tools/perf/Documentation/perf-intel-pt.txt b/tools/perf/Docume= ntation/perf-intel-pt.txt index d5ddb968bcf4..92464a5d7eaf 100644 --- a/tools/perf/Documentation/perf-intel-pt.txt +++ b/tools/perf/Documentation/perf-intel-pt.txt @@ -989,10 +989,13 @@ must be preceded by either '+' or '-'. The flags supp= ort by Intel PT are: =20 -a Suppress logging of perf events +a Log all perf events + +e Output only on decoding errors (size configurable) +o Output to stdout instead of "intel_pt.log" =20 By default, logged perf events are filtered by any specified time ranges, = but -flag +a overrides that. +flag +a overrides that. The +e flag can be useful for analyzing errors. = By +default, the log size in that case is 16384 bytes, but can be altered by +linkperf:perf-config[1] e.g. perf config itrace.debug-log-buffer-size=3D30= 000 =20 In addition, the period of the "instructions" event can be specified. e.g. =20 diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-log.c b/tools/perf/u= til/intel-pt-decoder/intel-pt-log.c index 5f5dfc8753f3..ea96dcae187a 100644 --- a/tools/perf/util/intel-pt-decoder/intel-pt-log.c +++ b/tools/perf/util/intel-pt-decoder/intel-pt-log.c @@ -5,12 +5,16 @@ */ =20 #include +#include #include #include #include #include #include =20 +#include +#include + #include "intel-pt-log.h" #include "intel-pt-insn-decoder.h" =20 @@ -21,15 +25,20 @@ static FILE *f; static char log_name[MAX_LOG_NAME]; bool intel_pt_enable_logging; +static bool intel_pt_dump_log_on_error; +static unsigned int intel_pt_log_on_error_size; +static struct log_buf log_buf; =20 void *intel_pt_log_fp(void) { return f; } =20 -void intel_pt_log_enable(void) +void intel_pt_log_enable(bool dump_log_on_error, unsigned int log_on_error= _size) { intel_pt_enable_logging =3D true; + intel_pt_dump_log_on_error =3D dump_log_on_error; + intel_pt_log_on_error_size =3D log_on_error_size; } =20 void intel_pt_log_disable(void) @@ -74,6 +83,87 @@ static void intel_pt_print_no_data(uint64_t pos, int ind= ent) fprintf(f, " "); } =20 +#define DFLT_BUF_SZ (16 * 1024) + +struct log_buf { + char *buf; + size_t buf_sz; + size_t head; + bool wrapped; + FILE *backend; +}; + +static ssize_t log_buf__write(void *cookie, const char *buf, size_t size) +{ + struct log_buf *b =3D cookie; + size_t sz =3D size; + + if (!b->buf) + return size; + + while (sz) { + size_t space =3D b->buf_sz - b->head; + size_t n =3D min(space, sz); + + memcpy(b->buf + b->head, buf, n); + sz -=3D n; + buf +=3D n; + b->head +=3D n; + if (sz && b->head >=3D b->buf_sz) { + b->head =3D 0; + b->wrapped =3D true; + } + } + return size; +} + +static int log_buf__close(void *cookie) +{ + struct log_buf *b =3D cookie; + + zfree(&b->buf); + return 0; +} + +static FILE *log_buf__open(struct log_buf *b, FILE *backend, unsigned int = sz) +{ + cookie_io_functions_t fns =3D { + .write =3D log_buf__write, + .close =3D log_buf__close, + }; + FILE *file; + + memset(b, 0, sizeof(*b)); + b->buf_sz =3D sz; + b->buf =3D malloc(b->buf_sz); + b->backend =3D backend; + file =3D fopencookie(b, "a", fns); + if (!file) + zfree(&b->buf); + return file; +} + +static void log_buf__dump(struct log_buf *b) +{ + if (!b->buf) + return; + + fflush(f); + fprintf(b->backend, "Dumping debug log buffer (first line may be sliced)\= n"); + if (b->wrapped) + fwrite(b->buf + b->head, b->buf_sz - b->head, 1, b->backend); + fwrite(b->buf, b->head, 1, b->backend); + fprintf(b->backend, "End of debug log buffer dump\n"); + + b->head =3D 0; + b->wrapped =3D false; +} + +void intel_pt_log_dump_buf(void) +{ + log_buf__dump(&log_buf); +} + static int intel_pt_log_open(void) { if (!intel_pt_enable_logging) @@ -86,6 +176,8 @@ static int intel_pt_log_open(void) f =3D fopen(log_name, "w+"); else f =3D stdout; + if (f && intel_pt_dump_log_on_error) + f =3D log_buf__open(&log_buf, f, intel_pt_log_on_error_size); if (!f) { intel_pt_enable_logging =3D false; return -1; diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-log.h b/tools/perf/u= til/intel-pt-decoder/intel-pt-log.h index d900aab24b21..354d7d23fc81 100644 --- a/tools/perf/util/intel-pt-decoder/intel-pt-log.h +++ b/tools/perf/util/intel-pt-decoder/intel-pt-log.h @@ -14,9 +14,10 @@ struct intel_pt_pkt; =20 void *intel_pt_log_fp(void); -void intel_pt_log_enable(void); +void intel_pt_log_enable(bool dump_log_on_error, unsigned int log_on_error= _size); void intel_pt_log_disable(void); void intel_pt_log_set_name(const char *name); +void intel_pt_log_dump_buf(void); =20 void __intel_pt_log_packet(const struct intel_pt_pkt *packet, int pkt_len, uint64_t pos, const unsigned char *buf); diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c index c01ff8001501..b34cb3dec1aa 100644 --- a/tools/perf/util/intel-pt.c +++ b/tools/perf/util/intel-pt.c @@ -2419,6 +2419,8 @@ static int intel_pt_synth_error(struct intel_pt *pt, = int code, int cpu, pid_t pid, pid_t tid, u64 ip, u64 timestamp, pid_t machine_pid, int vcpu) { + bool dump_log_on_error =3D pt->synth_opts.log_plus_flags & AUXTRACE_LOG_F= LG_ON_ERROR; + bool log_on_stdout =3D pt->synth_opts.log_plus_flags & AUXTRACE_LOG_FLG_U= SE_STDOUT; union perf_event event; char msg[MAX_AUXTRACE_ERROR_MSG]; int err; @@ -2438,6 +2440,16 @@ static int intel_pt_synth_error(struct intel_pt *pt,= int code, int cpu, code, cpu, pid, tid, ip, msg, timestamp, machine_pid, vcpu); =20 + if (intel_pt_enable_logging && !log_on_stdout) { + FILE *fp =3D intel_pt_log_fp(); + + if (fp) + perf_event__fprintf_auxtrace_error(&event, fp); + } + + if (code !=3D INTEL_PT_ERR_LOST && dump_log_on_error) + intel_pt_log_dump_buf(); + err =3D perf_session__deliver_synth_event(pt->session, &event, NULL); if (err) pr_err("Intel Processor Trace: failed to deliver error event, error %d\n= ", @@ -4272,8 +4284,12 @@ int intel_pt_process_auxtrace_info(union perf_event = *event, goto err_delete_thread; } =20 - if (pt->synth_opts.log) - intel_pt_log_enable(); + if (pt->synth_opts.log) { + bool log_on_error =3D pt->synth_opts.log_plus_flags & AUXTRACE_LOG_FLG_O= N_ERROR; + unsigned int log_on_error_size =3D pt->synth_opts.log_on_error_size; + + intel_pt_log_enable(log_on_error, log_on_error_size); + } =20 /* Maximum non-turbo ratio is TSC freq / 100 MHz */ if (pt->tc.time_mult) { --=20 2.25.1