From nobody Tue Apr 7 16:28:58 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6239ECAAD6 for ; Fri, 26 Aug 2022 14:29:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344466AbiHZO3U (ORCPT ); Fri, 26 Aug 2022 10:29:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241450AbiHZO3D (ORCPT ); Fri, 26 Aug 2022 10:29:03 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B28E5A5C61; Fri, 26 Aug 2022 07:29:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1661524140; x=1693060140; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fKL2pKdfe49aKzGqeWYbXuxKM2r4HTWOwpLHntUQotA=; b=0dRFw1lMnqobDhE3UFjynYb4QbkkYo43tqkleTbSjAh4BQovZ7KmYB31 QtoMj4yDVx+vZ8cwH2LHRKjE5g9GQamdUPPiCynmu/2MwsQ1OVi7DtkS2 j68+HQO5ji5foTgKom0svCLTNEWOjr+qyLT1mpVvx/Wch/2ifqrFVc7/C VliCqzhdD8FQ3bEQYoAfIVrYR0xUPVk87dzBxQe/p3Mid0cTUKtDvMwSm QxE5mVlk4pmM8jjse82SejM5N0PHbZfmMSL7HH1Akds31tHZCa5qRNC2Q It81CjK0ivsN4rOwcD/GRGMyHFIlnQbCLvoma6TSB8oiX6RZiXgmEVWaw g==; X-IronPort-AV: E=Sophos;i="5.93,265,1654585200"; d="scan'208";a="110917618" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 26 Aug 2022 07:28:59 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 26 Aug 2022 07:28:59 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 26 Aug 2022 07:28:56 -0700 From: Conor Dooley To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Shravan Chippa CC: Paul Walmsley , Palmer Dabbelt , Albert Ou , Cyril Jean , Lewis Hanly , Vattipalli Praveen , Wolfgang Grandegger , , , Subject: [PATCH 6/9] riscv: dts: microchip: icicle: update pci address properties Date: Fri, 26 Aug 2022 15:28:04 +0100 Message-ID: <20220826142806.3658434-7-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220826142806.3658434-1-conor.dooley@microchip.com> References: <20220826142806.3658434-1-conor.dooley@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" For the v2022.09 reference design the PCI root port's data region has been moved to FIC1 from FIC0. This is a shorter path, allowing for higher clock rates and improved through-put. As a result, the address at which the PCIe's data region appears to the core complex has changed. The config region's address is unchanged. As FIC0 is no longer used, its clock can be removed too. Signed-off-by: Conor Dooley --- .../boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/ar= ch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi index a21440c8ee03..32d51c4a5b0c 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi @@ -2,6 +2,7 @@ /* Copyright (c) 2020-2021 Microchip Technology Inc */ =20 / { + compatible =3D "microchip,mpfs-icicle-reference-rtlv2209", "microchip,mpf= s-icicle-kit", "microchip,mpfs"; =20 @@ -38,13 +39,13 @@ fabric_clk1: fabric-clk1 { clock-frequency =3D <125000000>; }; =20 - pcie: pcie@2000000000 { + pcie: pcie@3000000000 { compatible =3D "microchip,pcie-host-1.0"; #address-cells =3D <0x3>; #interrupt-cells =3D <0x1>; #size-cells =3D <0x2>; device_type =3D "pci"; - reg =3D <0x20 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>; + reg =3D <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>; reg-names =3D "cfg", "apb"; bus-range =3D <0x0 0x7f>; interrupt-parent =3D <&plic>; @@ -54,9 +55,9 @@ pcie: pcie@2000000000 { <0 0 0 3 &pcie_intc 2>, <0 0 0 4 &pcie_intc 3>; interrupt-map-mask =3D <0 0 0 7>; - clocks =3D <&fabric_clk1>, <&fabric_clk1>, <&fabric_clk3>; - clock-names =3D "fic0", "fic1", "fic3"; - ranges =3D <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>; + clocks =3D <&fabric_clk1>, <&fabric_clk3>; + clock-names =3D "fic1", "fic3"; + ranges =3D <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>; dma-ranges =3D <0x02000000 0x0 0x00000000 0x0 0x00000000 0x1 0x00000000>; msi-parent =3D <&pcie>; msi-controller; --=20 2.36.1