From nobody Fri Sep 5 20:25:39 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B397DC48BEA for ; Tue, 23 Aug 2022 11:27:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357700AbiHWL0l (ORCPT ); Tue, 23 Aug 2022 07:26:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357793AbiHWLVJ (ORCPT ); Tue, 23 Aug 2022 07:21:09 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA1D08E0C8; Tue, 23 Aug 2022 02:22:58 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 3359AB81C65; Tue, 23 Aug 2022 09:22:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 979DFC433C1; Tue, 23 Aug 2022 09:22:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1661246576; bh=6zHqZXMWempoaeLli6tzl2Bf0VYZYarLg6U6NgevAP8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dVAx2PeZEYlKEVanhdfhuCdBNFiMtQpCokhd9YDd/pEmFk4XLVvS2aFeQSdiWTB/z LOAURSPn5IUHiKSSeEv8bGrNSvhjQTISxKFyYtpQvIy6y6cwa5oacQ2o44NFQvMoHI yBJWpfxeKknYDIEc1a0r6uBcFjxGPMUKVfBk+w4M= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Ralph Siemsen , Phil Edworthy , Geert Uytterhoeven , Sasha Levin Subject: [PATCH 5.4 153/389] clk: renesas: r9a06g032: Fix UART clkgrp bitsel Date: Tue, 23 Aug 2022 10:23:51 +0200 Message-Id: <20220823080121.990823861@linuxfoundation.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220823080115.331990024@linuxfoundation.org> References: <20220823080115.331990024@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Ralph Siemsen [ Upstream commit 2dee50ab9e72a3cae75b65e5934c8dd3e9bf01bc ] There are two UART clock groups, each having a mux to select its upstream clock source. The register/bit definitions for accessing these two muxes appear to have been reversed since introduction. Correct them so as to match the hardware manual. Fixes: 4c3d88526eba ("clk: renesas: Renesas R9A06G032 clock driver") Signed-off-by: Ralph Siemsen Reviewed-by: Phil Edworthy Link: https://lore.kernel.org/r/20220518182527.1693156-1-ralph.siemsen@lina= ro.org Signed-off-by: Geert Uytterhoeven Signed-off-by: Sasha Levin --- drivers/clk/renesas/r9a06g032-clocks.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r= 9a06g032-clocks.c index f2dc625b745d..80df4eb041cc 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -286,8 +286,8 @@ static const struct r9a06g032_clkdesc r9a06g032_clocks[= ] =3D { .name =3D "uart_group_012", .type =3D K_BITSEL, .source =3D 1 + R9A06G032_DIV_UART, - /* R9A06G032_SYSCTRL_REG_PWRCTRL_PG1_PR2 */ - .dual.sel =3D ((0xec / 4) << 5) | 24, + /* R9A06G032_SYSCTRL_REG_PWRCTRL_PG0_0 */ + .dual.sel =3D ((0x34 / 4) << 5) | 30, .dual.group =3D 0, }, { @@ -295,8 +295,8 @@ static const struct r9a06g032_clkdesc r9a06g032_clocks[= ] =3D { .name =3D "uart_group_34567", .type =3D K_BITSEL, .source =3D 1 + R9A06G032_DIV_P2_PG, - /* R9A06G032_SYSCTRL_REG_PWRCTRL_PG0_0 */ - .dual.sel =3D ((0x34 / 4) << 5) | 30, + /* R9A06G032_SYSCTRL_REG_PWRCTRL_PG1_PR2 */ + .dual.sel =3D ((0xec / 4) << 5) | 24, .dual.group =3D 1, }, D_UGATE(CLK_UART0, "clk_uart0", UART_GROUP_012, 0, 0, 0x1b2, 0x1b3, 0x1b4= , 0x1b5), --=20 2.35.1