From nobody Sat Apr 11 00:42:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 686EAC25B08 for ; Wed, 17 Aug 2022 16:14:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241016AbiHQQOW (ORCPT ); Wed, 17 Aug 2022 12:14:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240993AbiHQQN4 (ORCPT ); Wed, 17 Aug 2022 12:13:56 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A4639DB64; Wed, 17 Aug 2022 09:13:33 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E255D615BA; Wed, 17 Aug 2022 16:13:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 994C1C433D7; Wed, 17 Aug 2022 16:13:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1660752806; bh=FD9SlMuXmlO3EOLgvahsW7Sboc7tOAmKtseKYIHuBRo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ah5/K3cXDTS7baUu/TIrWjvNn+9m0c6m5JvUszJKBu0/TJl/x2/pDBmxiw6sfiGNQ S/7avkGq3x3P8dZf1nk411ED/E46+npxlrDFLYcykiJdSxFxotEHkFignzhkOHTbZZ v2r565TKUAQuvbOCwXCFYpIKfhevWvz2BjtM2HPYEAuGqkrMLKPhSEp4zaD0eu3snu 85sIdhoIkC2NT1fm/oSU+L5OLxu0My+ZwfvNhqaSITJ1y3kNB/xljyvDumwjpa80Ob yt+ID+1IY1R+gLK2/Jud9lBbo8BuflEkjxGZwgjHOXdkQeXFCDSasFcA8LNtFU0RCI xau/qaFtdJ8fw== From: guoren@kernel.org To: xianting.tian@linux.alibaba.com, palmer@dabbelt.com, heiko@sntech.de, guoren@kernel.org, conor.dooley@microchip.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, liaochang1@huawei.com, mick@ics.forth.gr, jszhang@kernel.org, Guo Ren , Will Deacon , AKASHI Takahiro Subject: [PATCH V2 1/2] riscv: kexec: Disable all interrupts in kexec crash path Date: Wed, 17 Aug 2022 12:12:57 -0400 Message-Id: <20220817161258.748836-2-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220817161258.748836-1-guoren@kernel.org> References: <20220817161258.748836-1-guoren@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Guo Ren If a crash happens on cpu3 and all interrupts are binding on cpu0, the bad irq routing will cause a crash kernel which can't receive any irq. Because crash kernel won't clean up all harts' PLIC enable bits in enable registers. This patch is similar to 9141a003a491 ("ARM: 7316/1: kexec: EOI active and mask all interrupts in kexec crash path") and 78fd584cdec0 ("arm64: kdump: implement machine_crash_shutdown()"), and PowerPC also has the same mechanism. Fixes: fba8a8674f68 ("RISC-V: Add kexec support") Signed-off-by: Guo Ren Signed-off-by: Guo Ren Cc: Will Deacon Cc: AKASHI Takahiro Cc: Nick Kossifidis Reviewed-by: Xianting Tian --- arch/riscv/kernel/machine_kexec.c | 35 +++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/riscv/kernel/machine_kexec.c b/arch/riscv/kernel/machine_= kexec.c index ee79e6839b86..db41c676e5a2 100644 --- a/arch/riscv/kernel/machine_kexec.c +++ b/arch/riscv/kernel/machine_kexec.c @@ -15,6 +15,8 @@ #include /* For unreachable() */ #include /* For cpu_down() */ #include +#include +#include =20 /* * kexec_image_info - Print received image details @@ -154,6 +156,37 @@ void crash_smp_send_stop(void) cpus_stopped =3D 1; } =20 +static void machine_kexec_mask_interrupts(void) +{ + unsigned int i; + struct irq_desc *desc; + + for_each_irq_desc(i, desc) { + struct irq_chip *chip; + int ret; + + chip =3D irq_desc_get_chip(desc); + if (!chip) + continue; + + /* + * First try to remove the active state. If this + * fails, try to EOI the interrupt. + */ + ret =3D irq_set_irqchip_state(i, IRQCHIP_STATE_ACTIVE, false); + + if (ret && irqd_irq_inprogress(&desc->irq_data) && + chip->irq_eoi) + chip->irq_eoi(&desc->irq_data); + + if (chip->irq_mask) + chip->irq_mask(&desc->irq_data); + + if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data)) + chip->irq_disable(&desc->irq_data); + } +} + /* * machine_crash_shutdown - Prepare to kexec after a kernel crash * @@ -169,6 +202,8 @@ machine_crash_shutdown(struct pt_regs *regs) crash_smp_send_stop(); =20 crash_save_cpu(regs, smp_processor_id()); + machine_kexec_mask_interrupts(); + pr_info("Starting crashdump kernel...\n"); } =20 --=20 2.36.1 From nobody Sat Apr 11 00:42:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2777FC25B08 for ; Wed, 17 Aug 2022 16:14:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241005AbiHQQOx (ORCPT ); Wed, 17 Aug 2022 12:14:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240988AbiHQQOU (ORCPT ); Wed, 17 Aug 2022 12:14:20 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C74239DFBF; Wed, 17 Aug 2022 09:13:35 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 27BF2B81E07; Wed, 17 Aug 2022 16:13:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0D579C433C1; Wed, 17 Aug 2022 16:13:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1660752811; bh=LXl+go5bmkvfxRHmkxel9Bk8bZk07HHkypr0/KGTHJc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fHCZJ6VZKF1rkv+gV8lLCm1zbHzD+b7SYkan1IdtpZI3QHsrgO1L6s3TJO1h5Am1Y Hgd1nrQALaTgIR/gW51Qmfbl7ufcQsoGuZnw5Pv+G6YVaL2IbjDBlVNRjS63dXQzQC xO55Vu0Mw0orhkHuYqkXD27Ib09Px/h31lS2JGOoM+B6kYJbvpWOA3Oe97mphhfKhi fZnd1wexZdnvwpE48Tew2AnNppHMMXz4y5N9pBhKatZTNfH/ovcx4l12mfHzEQ6XUb oKis+zlbSToDS0JueoxiKc/3mbmtG6uNlKFDQVJmWXT0GooWa6tSz0XBE9tI/6chQW dmhuaY4TD6+Gw== From: guoren@kernel.org To: xianting.tian@linux.alibaba.com, palmer@dabbelt.com, heiko@sntech.de, guoren@kernel.org, conor.dooley@microchip.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, liaochang1@huawei.com, mick@ics.forth.gr, jszhang@kernel.org, Guo Ren , AKASHI Takahiro Subject: [PATCH V2 2/2] riscv: kexec: Fixup crash_smp_send_stop with percpu crash_save_cpu Date: Wed, 17 Aug 2022 12:12:58 -0400 Message-Id: <20220817161258.748836-3-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220817161258.748836-1-guoren@kernel.org> References: <20220817161258.748836-1-guoren@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Guo Ren Current crash_smp_send_stop is the same as the generic one in kernel/panic and misses crash_save_cpu in percpu. This patch is inspired by 78fd584cdec0 ("arm64: kdump: implement machine_crash_shutdown()") and adds the same mechanism for riscv. Fixes: ad943893d5f1 ("RISC-V: Fixup schedule out issue in machine_crash_shu= tdown()") Signed-off-by: Guo Ren Signed-off-by: Guo Ren Cc: AKASHI Takahiro Reviewed-by: Xianting Tian --- arch/riscv/include/asm/smp.h | 6 +++ arch/riscv/kernel/machine_kexec.c | 19 ++----- arch/riscv/kernel/smp.c | 89 ++++++++++++++++++++++++++++++- 3 files changed, 96 insertions(+), 18 deletions(-) diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h index d3443be7eedc..8b40e15bea36 100644 --- a/arch/riscv/include/asm/smp.h +++ b/arch/riscv/include/asm/smp.h @@ -50,6 +50,12 @@ void riscv_set_ipi_ops(const struct riscv_ipi_ops *ops); /* Clear IPI for current CPU */ void riscv_clear_ipi(void); =20 +/* stop and save status for other CPUs */ +void crash_smp_send_stop(void); + +/* Check other CPUs stop or not */ +bool smp_crash_stop_failed(void); + /* Secondary hart entry */ asmlinkage void smp_callin(void); =20 diff --git a/arch/riscv/kernel/machine_kexec.c b/arch/riscv/kernel/machine_= kexec.c index db41c676e5a2..34c86d337448 100644 --- a/arch/riscv/kernel/machine_kexec.c +++ b/arch/riscv/kernel/machine_kexec.c @@ -140,22 +140,6 @@ void machine_shutdown(void) #endif } =20 -/* Override the weak function in kernel/panic.c */ -void crash_smp_send_stop(void) -{ - static int cpus_stopped; - - /* - * This function can be called twice in panic path, but obviously - * we execute this only once. - */ - if (cpus_stopped) - return; - - smp_send_stop(); - cpus_stopped =3D 1; -} - static void machine_kexec_mask_interrupts(void) { unsigned int i; @@ -230,6 +214,9 @@ machine_kexec(struct kimage *image) void *control_code_buffer =3D page_address(image->control_code_page); riscv_kexec_method kexec_method =3D NULL; =20 + WARN(smp_crash_stop_failed(), + "Some CPUs may be stale, kdump will be unreliable.\n"); + if (image->type !=3D KEXEC_TYPE_CRASH) kexec_method =3D control_code_buffer; else diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c index 760a64518c58..a75ad9c373cd 100644 --- a/arch/riscv/kernel/smp.c +++ b/arch/riscv/kernel/smp.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -27,6 +28,7 @@ enum ipi_message_type { IPI_RESCHEDULE, IPI_CALL_FUNC, IPI_CPU_STOP, + IPI_CPU_CRASH_STOP, IPI_IRQ_WORK, IPI_TIMER, IPI_MAX @@ -71,6 +73,22 @@ static void ipi_stop(void) wait_for_interrupt(); } =20 +#ifdef CONFIG_KEXEC_CORE +static atomic_t waiting_for_crash_ipi =3D ATOMIC_INIT(0); + +static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs) +{ + crash_save_cpu(regs, cpu); + + atomic_dec(&waiting_for_crash_ipi); + + local_irq_disable(); + + while(1) + wait_for_interrupt(); +} +#endif + static const struct riscv_ipi_ops *ipi_ops __ro_after_init; =20 void riscv_set_ipi_ops(const struct riscv_ipi_ops *ops) @@ -124,8 +142,9 @@ void arch_irq_work_raise(void) =20 void handle_IPI(struct pt_regs *regs) { - unsigned long *pending_ipis =3D &ipi_data[smp_processor_id()].bits; - unsigned long *stats =3D ipi_data[smp_processor_id()].stats; + unsigned int cpu =3D smp_processor_id(); + unsigned long *pending_ipis =3D &ipi_data[cpu].bits; + unsigned long *stats =3D ipi_data[cpu].stats; =20 riscv_clear_ipi(); =20 @@ -154,6 +173,13 @@ void handle_IPI(struct pt_regs *regs) ipi_stop(); } =20 + if (ops & (1 << IPI_CPU_CRASH_STOP)) { +#ifdef CONFIG_KEXEC_CORE + ipi_cpu_crash_stop(cpu, get_irq_regs()); +#endif + unreachable(); + } + if (ops & (1 << IPI_IRQ_WORK)) { stats[IPI_IRQ_WORK]++; irq_work_run(); @@ -176,6 +202,7 @@ static const char * const ipi_names[] =3D { [IPI_RESCHEDULE] =3D "Rescheduling interrupts", [IPI_CALL_FUNC] =3D "Function call interrupts", [IPI_CPU_STOP] =3D "CPU stop interrupts", + [IPI_CPU_CRASH_STOP] =3D "CPU stop (for crash dump) interrupts", [IPI_IRQ_WORK] =3D "IRQ work interrupts", [IPI_TIMER] =3D "Timer broadcast interrupts", }; @@ -235,6 +262,64 @@ void smp_send_stop(void) cpumask_pr_args(cpu_online_mask)); } =20 +#ifdef CONFIG_KEXEC_CORE +/* + * The number of CPUs online, not counting this CPU (which may not be + * fully online and so not counted in num_online_cpus()). + */ +static inline unsigned int num_other_online_cpus(void) +{ + unsigned int this_cpu_online =3D cpu_online(smp_processor_id()); + + return num_online_cpus() - this_cpu_online; +} + +void crash_smp_send_stop(void) +{ + static int cpus_stopped; + cpumask_t mask; + unsigned long timeout; + + /* + * This function can be called twice in panic path, but obviously + * we execute this only once. + */ + if (cpus_stopped) + return; + + cpus_stopped =3D 1; + + /* + * If this cpu is the only one alive at this point in time, online or + * not, there are no stop messages to be sent around, so just back out. + */ + if (num_other_online_cpus() =3D=3D 0) + return; + + cpumask_copy(&mask, cpu_online_mask); + cpumask_clear_cpu(smp_processor_id(), &mask); + + atomic_set(&waiting_for_crash_ipi, num_other_online_cpus()); + + pr_crit("SMP: stopping secondary CPUs\n"); + send_ipi_mask(&mask, IPI_CPU_CRASH_STOP); + + /* Wait up to one second for other CPUs to stop */ + timeout =3D USEC_PER_SEC; + while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--) + udelay(1); + + if (atomic_read(&waiting_for_crash_ipi) > 0) + pr_warn("SMP: failed to stop secondary CPUs %*pbl\n", + cpumask_pr_args(&mask)); +} + +bool smp_crash_stop_failed(void) +{ + return (atomic_read(&waiting_for_crash_ipi) > 0); +} +#endif + void smp_send_reschedule(int cpu) { send_ipi_single(cpu, IPI_RESCHEDULE); --=20 2.36.1