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[34.168.22.137]) by smtp.gmail.com with ESMTPSA id z5-20020a623305000000b005323a1a9fecsm8916650pfz.101.2022.08.16.14.50.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 14:50:26 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tinghan Shen , Tzung-Bi Shih , Xiang wangx Subject: [PATCH v6 3/7] platform/chrome: cros_typec_switch: Set EC retimer Date: Tue, 16 Aug 2022 21:48:31 +0000 Message-Id: <20220816214857.2088914-4-pmalani@chromium.org> X-Mailer: git-send-email 2.37.1.595.g718a3a8f04-goog In-Reply-To: <20220816214857.2088914-1-pmalani@chromium.org> References: <20220816214857.2088914-1-pmalani@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Invoke ChromeOS EC host commands to set EC-controlled retimer switches to the state the Type-C framework instructs. Signed-off-by: Prashant Malani Reviewed-by: Tzung-Bi Shih --- Changes since v5: - Change "Chrome OS" -> "ChromeOS". - Change "Type C" -> "Type-C". - Inline mux_params struct initialization. - Make cros_ec_cmd() invocation fit on 1 line. Changes since v4: - Update cros_ec_command() to cros_ec_cmd(). Changes since v3: - No changes. Changes since v2: - No changes. Changes since v1: - No changes. drivers/platform/chrome/cros_typec_switch.c | 53 ++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/drivers/platform/chrome/cros_typec_switch.c b/drivers/platform= /chrome/cros_typec_switch.c index db773bf57899..eae7d26416aa 100644 --- a/drivers/platform/chrome/cros_typec_switch.c +++ b/drivers/platform/chrome/cros_typec_switch.c @@ -9,7 +9,10 @@ #include #include #include +#include #include +#include +#include #include =20 #define DRV_NAME "cros-typec-switch" @@ -28,9 +31,57 @@ struct cros_typec_switch_data { struct cros_typec_port *ports[EC_USB_PD_MAX_PORTS]; }; =20 +static int cros_typec_cmd_mux_set(struct cros_typec_switch_data *sdata, in= t port_num, u8 index, + u8 state) +{ + struct ec_params_typec_control req =3D { + .port =3D port_num, + .command =3D TYPEC_CONTROL_COMMAND_USB_MUX_SET, + .mux_params =3D { + .mux_index =3D index, + .mux_flags =3D state, + }, + }; + + return cros_ec_cmd(sdata->ec, 0, EC_CMD_TYPEC_CONTROL, &req, sizeof(req),= NULL, 0); +} + +static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmo= de *alt) +{ + int ret =3D -EOPNOTSUPP; + + if (mode =3D=3D TYPEC_STATE_SAFE) + ret =3D USB_PD_MUX_SAFE_MODE; + else if (mode =3D=3D TYPEC_STATE_USB) + ret =3D USB_PD_MUX_USB_ENABLED; + else if (alt && alt->svid =3D=3D USB_TYPEC_DP_SID) + ret =3D USB_PD_MUX_DP_ENABLED; + + return ret; +} + +/* + * The ChromeOS EC treats both mode-switches and retimers as "muxes" for t= he purposes of the + * host command API. This common function configures and verifies the reti= mer/mode-switch + * according to the provided setting. + */ +static int cros_typec_configure_mux(struct cros_typec_switch_data *sdata, = int port_num, int index, + unsigned long mode, struct typec_altmode *alt) +{ + int ret =3D cros_typec_get_mux_state(mode, alt); + + if (ret < 0) + return ret; + + return cros_typec_cmd_mux_set(sdata, port_num, index, (u8)ret); +} + static int cros_typec_retimer_set(struct typec_retimer *retimer, struct ty= pec_retimer_state *state) { - return 0; + struct cros_typec_port *port =3D typec_retimer_get_drvdata(retimer); + + /* Retimers have index 1. */ + return cros_typec_configure_mux(port->sdata, port->port_num, 1, state->mo= de, state->alt); } =20 static void cros_typec_unregister_switches(struct cros_typec_switch_data *= sdata) --=20 2.37.1.595.g718a3a8f04-goog