From nobody Fri Oct 24 20:26:18 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD149C2BB43 for ; Mon, 15 Aug 2022 23:32:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353043AbiHOXb1 (ORCPT ); Mon, 15 Aug 2022 19:31:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343905AbiHOX0K (ORCPT ); Mon, 15 Aug 2022 19:26:10 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 77A7A47BBE; Mon, 15 Aug 2022 13:06:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 156EB6069F; Mon, 15 Aug 2022 20:06:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0F32BC433D6; Mon, 15 Aug 2022 20:06:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1660593977; bh=LbYr9atvpCd18aFJFyM1+zLJDnqYHvtoUfsb5FBaeuw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=h2nV5w0kTBGYmGhaMu4EQXQ4EdyR4k0QtAsjw1llYtinQv9K7Yhoe0X83EF2IfR/y E7Fc/Q1CwDrBPeS1/V5vPKCwPOwY85rAx6Z5NDlXdzBp0051ANTFzpe/srE+zP/wPt ZOJKLV8vCTOtcQTYJ+tl+82x4hvTfs8BuTGFA5sA= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Luwei Kang , Like Xu , "Peter Zijlstra (Intel)" , Paolo Bonzini , Sasha Levin Subject: [PATCH 5.18 1037/1095] KVM: x86/pmu: Introduce the ctrl_mask value for fixed counter Date: Mon, 15 Aug 2022 20:07:16 +0200 Message-Id: <20220815180511.988000689@linuxfoundation.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220815180429.240518113@linuxfoundation.org> References: <20220815180429.240518113@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Like Xu [ Upstream commit 2c985527dd8d283e786ad7a67e532ef7f6f00fac ] The mask value of fixed counter control register should be dynamic adjusted with the number of fixed counters. This patch introduces a variable that includes the reserved bits of fixed counter control registers. This is a generic code refactoring. Co-developed-by: Luwei Kang Signed-off-by: Luwei Kang Signed-off-by: Like Xu Acked-by: Peter Zijlstra (Intel) Message-Id: <20220411101946.20262-6-likexu@tencent.com> Signed-off-by: Paolo Bonzini Signed-off-by: Sasha Levin --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/vmx/pmu_intel.c | 6 +++++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 57550a427789..35c7a1fce8ea 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -508,6 +508,7 @@ struct kvm_pmu { unsigned nr_arch_fixed_counters; unsigned available_event_types; u64 fixed_ctr_ctrl; + u64 fixed_ctr_ctrl_mask; u64 global_ctrl; u64 global_status; u64 counter_bitmask[2]; diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index b82b6709d7a8..040d598622e3 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -395,7 +395,7 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, str= uct msr_data *msr_info) case MSR_CORE_PERF_FIXED_CTR_CTRL: if (pmu->fixed_ctr_ctrl =3D=3D data) return 0; - if (!(data & 0xfffffffffffff444ull)) { + if (!(data & pmu->fixed_ctr_ctrl_mask)) { reprogram_fixed_counters(pmu, data); return 0; } @@ -479,6 +479,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) struct kvm_cpuid_entry2 *entry; union cpuid10_eax eax; union cpuid10_edx edx; + int i; =20 pmu->nr_arch_gp_counters =3D 0; pmu->nr_arch_fixed_counters =3D 0; @@ -487,6 +488,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) pmu->version =3D 0; pmu->reserved_bits =3D 0xffffffff00200000ull; pmu->raw_event_mask =3D X86_RAW_EVENT_MASK; + pmu->fixed_ctr_ctrl_mask =3D ~0ull; =20 entry =3D kvm_find_cpuid_entry(vcpu, 0xa, 0); if (!entry || !vcpu->kvm->arch.enable_pmu) @@ -522,6 +524,8 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) setup_fixed_pmc_eventsel(pmu); } =20 + for (i =3D 0; i < pmu->nr_arch_fixed_counters; i++) + pmu->fixed_ctr_ctrl_mask &=3D ~(0xbull << (i * 4)); pmu->global_ctrl =3D ((1ull << pmu->nr_arch_gp_counters) - 1) | (((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED); pmu->global_ctrl_mask =3D ~pmu->global_ctrl; --=20 2.35.1