From nobody Mon Sep 29 21:14:07 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6577BC00140 for ; Mon, 15 Aug 2022 23:54:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354963AbiHOXvK (ORCPT ); Mon, 15 Aug 2022 19:51:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354862AbiHOXqe (ORCPT ); Mon, 15 Aug 2022 19:46:34 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D18CF8E45E; Mon, 15 Aug 2022 13:14:57 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0B2E4B80EAB; Mon, 15 Aug 2022 20:14:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 72ACCC433D6; Mon, 15 Aug 2022 20:14:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1660594494; bh=++0gQvoVEsES9czLKXdr0jf/8o4LNf21BoHpAo3XYVE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=1gWKuW0jFzmUvvcIVgw2hkX3632//DJGaV+7rYx4RGR0anQulJgsauZdI4aSnfnTS s0bgsZPQ9b/oIAWF2fGwofeTZfg4Tz5kYTZmMAjPHTXt4A+KmxcCjQf22seHaEDY23 4t1cfpBlu6yIQJFnX6mCUe3TjMlQLc/kP8C5YS0s= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Ezequiel Garcia , Nicolas Dufresne , Hans Verkuil , Mauro Carvalho Chehab , Sasha Levin Subject: [PATCH 5.19 0465/1157] media: hantro: Fix RK3399 H.264 format advertising Date: Mon, 15 Aug 2022 19:57:01 +0200 Message-Id: <20220815180458.209647716@linuxfoundation.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220815180439.416659447@linuxfoundation.org> References: <20220815180439.416659447@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Ezequiel Garcia [ Upstream commit 177d841fa19542eb35aa5ec9579c4abb989c9255 ] Commit 1f82f2df523cb ("media: hantro: Enable H.264 on Rockchip VDPU2") enabled H.264 on some SoCs with VDPU2 cores. This had the side-effect of exposing H.264 coded format as supported on RK3399. Fix this and clarify how the codec is explicitly disabled on RK3399 on this driver. Fixes: 1f82f2df523cb ("media: hantro: Enable H.264 on Rockchip VDPU2") Signed-off-by: Ezequiel Garcia Tested-by: Nicolas Dufresne Reviewed-by: Nicolas Dufresne Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Sasha Levin --- .../staging/media/hantro/rockchip_vpu_hw.c | 60 ++++++++++++++++--- 1 file changed, 53 insertions(+), 7 deletions(-) diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/stagi= ng/media/hantro/rockchip_vpu_hw.c index 098486b9ec27..26e16b5a6a70 100644 --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c @@ -182,7 +182,7 @@ static const struct hantro_fmt rk3288_vpu_dec_fmts[] = =3D { }, }; =20 -static const struct hantro_fmt rk3399_vpu_dec_fmts[] =3D { +static const struct hantro_fmt rockchip_vdpu2_dec_fmts[] =3D { { .fourcc =3D V4L2_PIX_FMT_NV12, .codec_mode =3D HANTRO_MODE_NONE, @@ -236,6 +236,47 @@ static const struct hantro_fmt rk3399_vpu_dec_fmts[] = =3D { }, }; =20 +static const struct hantro_fmt rk3399_vpu_dec_fmts[] =3D { + { + .fourcc =3D V4L2_PIX_FMT_NV12, + .codec_mode =3D HANTRO_MODE_NONE, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, + .step_height =3D MB_DIM, + }, + }, + { + .fourcc =3D V4L2_PIX_FMT_MPEG2_SLICE, + .codec_mode =3D HANTRO_MODE_MPEG2_DEC, + .max_depth =3D 2, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, + .step_height =3D MB_DIM, + }, + }, + { + .fourcc =3D V4L2_PIX_FMT_VP8_FRAME, + .codec_mode =3D HANTRO_MODE_VP8_DEC, + .max_depth =3D 2, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, + .step_height =3D MB_DIM, + }, + }, +}; + static irqreturn_t rockchip_vpu1_vepu_irq(int irq, void *dev_id) { struct hantro_dev *vpu =3D dev_id; @@ -548,8 +589,8 @@ const struct hantro_variant rk3288_vpu_variant =3D { =20 const struct hantro_variant rk3328_vpu_variant =3D { .dec_offset =3D 0x400, - .dec_fmts =3D rk3399_vpu_dec_fmts, - .num_dec_fmts =3D ARRAY_SIZE(rk3399_vpu_dec_fmts), + .dec_fmts =3D rockchip_vdpu2_dec_fmts, + .num_dec_fmts =3D ARRAY_SIZE(rockchip_vdpu2_dec_fmts), .codec =3D HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops =3D rk3399_vpu_codec_ops, @@ -560,6 +601,11 @@ const struct hantro_variant rk3328_vpu_variant =3D { .num_clocks =3D ARRAY_SIZE(rockchip_vpu_clk_names), }; =20 +/* + * H.264 decoding explicitly disabled in RK3399. + * This ensures userspace applications use the Rockchip VDEC core, + * which has better performance. + */ const struct hantro_variant rk3399_vpu_variant =3D { .enc_offset =3D 0x0, .enc_fmts =3D rockchip_vpu_enc_fmts, @@ -579,8 +625,8 @@ const struct hantro_variant rk3399_vpu_variant =3D { =20 const struct hantro_variant rk3568_vpu_variant =3D { .dec_offset =3D 0x400, - .dec_fmts =3D rk3399_vpu_dec_fmts, - .num_dec_fmts =3D ARRAY_SIZE(rk3399_vpu_dec_fmts), + .dec_fmts =3D rockchip_vdpu2_dec_fmts, + .num_dec_fmts =3D ARRAY_SIZE(rockchip_vdpu2_dec_fmts), .codec =3D HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops =3D rk3399_vpu_codec_ops, @@ -596,8 +642,8 @@ const struct hantro_variant px30_vpu_variant =3D { .enc_fmts =3D rockchip_vpu_enc_fmts, .num_enc_fmts =3D ARRAY_SIZE(rockchip_vpu_enc_fmts), .dec_offset =3D 0x400, - .dec_fmts =3D rk3399_vpu_dec_fmts, - .num_dec_fmts =3D ARRAY_SIZE(rk3399_vpu_dec_fmts), + .dec_fmts =3D rockchip_vdpu2_dec_fmts, + .num_dec_fmts =3D ARRAY_SIZE(rockchip_vdpu2_dec_fmts), .codec =3D HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops =3D rk3399_vpu_codec_ops, --=20 2.35.1