From nobody Mon Sep 29 21:14:10 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7401DC2BB47 for ; Mon, 15 Aug 2022 23:54:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354930AbiHOXvF (ORCPT ); Mon, 15 Aug 2022 19:51:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354831AbiHOXq3 (ORCPT ); Mon, 15 Aug 2022 19:46:29 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20224C2742; Mon, 15 Aug 2022 13:14:53 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 50E3860F5B; Mon, 15 Aug 2022 20:14:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1882BC433D6; Mon, 15 Aug 2022 20:14:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1660594491; bh=aeXWPXgldJRf24HpT2aI4fT3Rn29z75ACzJkUh8tH6o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ISkl663h0M1nlGez0IcYTm5y0YnHfX5UlUeTX7MG4cfXXQPLmydqaVP/Xvaa4yGPI 8YNN4/n9ZSy2E5LT0XCAsnG3k+2qtppXKPiJBfVSaRlYtZIOBvZMg3NomB30oH08ZE OG8Jyiggg87fuTOvou/UIQWCRPn/TwxI8GHRz02E= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Benjamin Gaignard , Hans Verkuil , Mauro Carvalho Chehab , Sasha Levin Subject: [PATCH 5.19 0464/1157] media: hantro: Be more accurate on pixel formats step_width constraints Date: Mon, 15 Aug 2022 19:57:00 +0200 Message-Id: <20220815180458.167176199@linuxfoundation.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220815180439.416659447@linuxfoundation.org> References: <20220815180439.416659447@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Benjamin Gaignard [ Upstream commit 135ad96cb4d6bd6dace030846fe5c7ea890411ab ] On Hantro G2 decoder on IMX8MQ strides requirements aren't the same for NV12_4L4 and NV12 pixel formats. The first one use a 4 bytes padding while the last one needs 16 bytes. To be sure to provide the correct stride in all cases we need: - to relax the constraints on codec formats so set step_width to 4 - use capture queue format and not the output queue format when applying the pixel format constraints. - put the correct step_width constraints on each pixel format. Move HEVC SPS validation in hantro_hevc.c to be able to perform it when setting sps control and when starting to decode the bitstream. Add a new test in HEVC SPS validation function to check if resolution is still matching the hardware constraints. With this SAODBLK_A_MainConcept_4 and SAODBLK_B_MainConcept_4 conformance tests files are correctly decoded with both NV12 and NV12_4L4 pixel formats. These two files have a resolution of 1016x760. Add defines for the various used resolutions. For other variants than Hantro G2 on IMX8M keep the same step_width to avoid regressions. Fluster HEVC test score is now 128/147 vs 126/147 with the both pixel formats as decoder output. Fluster VP9 test score stay at 147/303. [hverkuil: fix trivial checkpatch warnings] Signed-off-by: Benjamin Gaignard Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Sasha Levin --- drivers/staging/media/hantro/hantro_drv.c | 12 +- drivers/staging/media/hantro/hantro_hevc.c | 30 +++++ drivers/staging/media/hantro/hantro_hw.h | 14 +++ drivers/staging/media/hantro/hantro_v4l2.c | 2 +- drivers/staging/media/hantro/imx8m_vpu_hw.c | 80 ++++++++++---- .../staging/media/hantro/rockchip_vpu_hw.c | 104 ++++++++++++------ .../staging/media/hantro/sama5d4_vdec_hw.c | 40 +++++-- drivers/staging/media/hantro/sunxi_vpu_hw.c | 24 +++- 8 files changed, 223 insertions(+), 83 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/me= dia/hantro/hantro_drv.c index ac232b5f7825..01d33dcb0467 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -253,6 +253,11 @@ queue_init(void *priv, struct vb2_queue *src_vq, struc= t vb2_queue *dst_vq) =20 static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) { + struct hantro_ctx *ctx; + + ctx =3D container_of(ctrl->handler, + struct hantro_ctx, ctrl_handler); + if (ctrl->id =3D=3D V4L2_CID_STATELESS_H264_SPS) { const struct v4l2_ctrl_h264_sps *sps =3D ctrl->p_new.p_h264_sps; =20 @@ -268,12 +273,7 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) } else if (ctrl->id =3D=3D V4L2_CID_MPEG_VIDEO_HEVC_SPS) { const struct v4l2_ctrl_hevc_sps *sps =3D ctrl->p_new.p_hevc_sps; =20 - if (sps->bit_depth_luma_minus8 !=3D sps->bit_depth_chroma_minus8) - /* Luma and chroma bit depth mismatch */ - return -EINVAL; - if (sps->bit_depth_luma_minus8 !=3D 0) - /* Only 8-bit is supported */ - return -EINVAL; + return hantro_hevc_validate_sps(ctx, sps); } else if (ctrl->id =3D=3D V4L2_CID_STATELESS_VP9_FRAME) { const struct v4l2_ctrl_vp9_frame *dec_params =3D ctrl->p_new.p_vp9_frame; =20 diff --git a/drivers/staging/media/hantro/hantro_hevc.c b/drivers/staging/m= edia/hantro/hantro_hevc.c index f86c98e19177..bd924896e409 100644 --- a/drivers/staging/media/hantro/hantro_hevc.c +++ b/drivers/staging/media/hantro/hantro_hevc.c @@ -154,6 +154,32 @@ static int tile_buffer_reallocate(struct hantro_ctx *c= tx) return -ENOMEM; } =20 +int hantro_hevc_validate_sps(struct hantro_ctx *ctx, const struct v4l2_ctr= l_hevc_sps *sps) +{ + if (sps->bit_depth_luma_minus8 !=3D sps->bit_depth_chroma_minus8) + /* Luma and chroma bit depth mismatch */ + return -EINVAL; + if (sps->bit_depth_luma_minus8 !=3D 0) + /* Only 8-bit is supported */ + return -EINVAL; + + /* + * for tile pixel format check if the width and height match + * hardware constraints + */ + if (ctx->vpu_dst_fmt->fourcc =3D=3D V4L2_PIX_FMT_NV12_4L4) { + if (ctx->dst_fmt.width !=3D + ALIGN(sps->pic_width_in_luma_samples, ctx->vpu_dst_fmt->frmsize.step= _width)) + return -EINVAL; + + if (ctx->dst_fmt.height !=3D + ALIGN(sps->pic_height_in_luma_samples, ctx->vpu_dst_fmt->frmsize.ste= p_height)) + return -EINVAL; + } + + return 0; +} + int hantro_hevc_dec_prepare_run(struct hantro_ctx *ctx) { struct hantro_hevc_dec_hw_ctx *hevc_ctx =3D &ctx->hevc_dec; @@ -177,6 +203,10 @@ int hantro_hevc_dec_prepare_run(struct hantro_ctx *ctx) if (WARN_ON(!ctrls->sps)) return -EINVAL; =20 + ret =3D hantro_hevc_validate_sps(ctx, ctrls->sps); + if (ret) + return ret; + ctrls->pps =3D hantro_get_ctrl(ctx, V4L2_CID_MPEG_VIDEO_HEVC_PPS); if (WARN_ON(!ctrls->pps)) diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/med= ia/hantro/hantro_hw.h index 52a960f6fa4a..a2e0f0836281 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -18,9 +18,21 @@ #define DEC_8190_ALIGN_MASK 0x07U =20 #define MB_DIM 16 +#define TILE_MB_DIM 4 #define MB_WIDTH(w) DIV_ROUND_UP(w, MB_DIM) #define MB_HEIGHT(h) DIV_ROUND_UP(h, MB_DIM) =20 +#define FMT_MIN_WIDTH 48 +#define FMT_MIN_HEIGHT 48 +#define FMT_HD_WIDTH 1280 +#define FMT_HD_HEIGHT 720 +#define FMT_FHD_WIDTH 1920 +#define FMT_FHD_HEIGHT 1088 +#define FMT_UHD_WIDTH 3840 +#define FMT_UHD_HEIGHT 2160 +#define FMT_4K_WIDTH 4096 +#define FMT_4K_HEIGHT 2304 + #define NUM_REF_PICTURES (V4L2_HEVC_DPB_ENTRIES_NUM_MAX + 1) =20 struct hantro_dev; @@ -347,6 +359,8 @@ int hantro_hevc_dec_prepare_run(struct hantro_ctx *ctx); void hantro_hevc_ref_init(struct hantro_ctx *ctx); dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, int poc); int hantro_hevc_add_ref_buf(struct hantro_ctx *ctx, int poc, dma_addr_t ad= dr); +int hantro_hevc_validate_sps(struct hantro_ctx *ctx, const struct v4l2_ctr= l_hevc_sps *sps); + =20 static inline unsigned short hantro_vp9_num_sbs(unsigned short dimension) { diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/m= edia/hantro/hantro_v4l2.c index 22ad182ee972..29cc61d53b71 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.c +++ b/drivers/staging/media/hantro/hantro_v4l2.c @@ -259,7 +259,7 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, } else if (ctx->is_encoder) { vpu_fmt =3D ctx->vpu_dst_fmt; } else { - vpu_fmt =3D ctx->vpu_src_fmt; + vpu_fmt =3D fmt; /* * Width/height on the CAPTURE end of a decoder are ignored and * replaced by the OUTPUT ones. diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/= media/hantro/imx8m_vpu_hw.c index 9802508bade2..77f574fdfa77 100644 --- a/drivers/staging/media/hantro/imx8m_vpu_hw.c +++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c @@ -83,6 +83,14 @@ static const struct hantro_fmt imx8m_vpu_postproc_fmts[]= =3D { .fourcc =3D V4L2_PIX_FMT_YUYV, .codec_mode =3D HANTRO_MODE_NONE, .postprocessed =3D true, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, + .step_height =3D MB_DIM, + }, }, }; =20 @@ -90,17 +98,25 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] =3D= { { .fourcc =3D V4L2_PIX_FMT_NV12, .codec_mode =3D HANTRO_MODE_NONE, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, + .step_height =3D MB_DIM, + }, }, { .fourcc =3D V4L2_PIX_FMT_MPEG2_SLICE, .codec_mode =3D HANTRO_MODE_MPEG2_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 1920, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 1088, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -109,11 +125,11 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = =3D { .codec_mode =3D HANTRO_MODE_VP8_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 3840, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 2160, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -122,11 +138,11 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = =3D { .codec_mode =3D HANTRO_MODE_H264_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 3840, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 2160, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -137,6 +153,14 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_f= mts[] =3D { .fourcc =3D V4L2_PIX_FMT_NV12, .codec_mode =3D HANTRO_MODE_NONE, .postprocessed =3D true, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, + .step_height =3D MB_DIM, + }, }, }; =20 @@ -144,18 +168,26 @@ static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[= ] =3D { { .fourcc =3D V4L2_PIX_FMT_NV12_4L4, .codec_mode =3D HANTRO_MODE_NONE, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, + .step_width =3D TILE_MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, + .step_height =3D TILE_MB_DIM, + }, }, { .fourcc =3D V4L2_PIX_FMT_HEVC_SLICE, .codec_mode =3D HANTRO_MODE_HEVC_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 3840, - .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 2160, - .step_height =3D MB_DIM, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, + .step_width =3D TILE_MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, + .step_height =3D TILE_MB_DIM, }, }, { @@ -163,12 +195,12 @@ static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[= ] =3D { .codec_mode =3D HANTRO_MODE_VP9_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 3840, - .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 2160, - .step_height =3D MB_DIM, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, + .step_width =3D TILE_MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, + .step_height =3D TILE_MB_DIM, }, }, }; diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/stagi= ng/media/hantro/rockchip_vpu_hw.c index fc96501f3bc8..098486b9ec27 100644 --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c @@ -63,6 +63,14 @@ static const struct hantro_fmt rockchip_vpu1_postproc_fm= ts[] =3D { .fourcc =3D V4L2_PIX_FMT_YUYV, .codec_mode =3D HANTRO_MODE_NONE, .postprocessed =3D true, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, + .step_height =3D MB_DIM, + }, }, }; =20 @@ -70,17 +78,25 @@ static const struct hantro_fmt rk3066_vpu_dec_fmts[] = =3D { { .fourcc =3D V4L2_PIX_FMT_NV12, .codec_mode =3D HANTRO_MODE_NONE, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, + .step_height =3D MB_DIM, + }, }, { .fourcc =3D V4L2_PIX_FMT_H264_SLICE, .codec_mode =3D HANTRO_MODE_H264_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 1920, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 1088, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -89,11 +105,11 @@ static const struct hantro_fmt rk3066_vpu_dec_fmts[] = =3D { .codec_mode =3D HANTRO_MODE_MPEG2_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 1920, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 1088, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -102,11 +118,11 @@ static const struct hantro_fmt rk3066_vpu_dec_fmts[] = =3D { .codec_mode =3D HANTRO_MODE_VP8_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 1920, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 1088, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -116,17 +132,25 @@ static const struct hantro_fmt rk3288_vpu_dec_fmts[] = =3D { { .fourcc =3D V4L2_PIX_FMT_NV12, .codec_mode =3D HANTRO_MODE_NONE, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_4K_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_4K_HEIGHT, + .step_height =3D MB_DIM, + }, }, { .fourcc =3D V4L2_PIX_FMT_H264_SLICE, .codec_mode =3D HANTRO_MODE_H264_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 4096, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_4K_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 2304, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_4K_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -135,11 +159,11 @@ static const struct hantro_fmt rk3288_vpu_dec_fmts[] = =3D { .codec_mode =3D HANTRO_MODE_MPEG2_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 1920, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 1088, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -148,11 +172,11 @@ static const struct hantro_fmt rk3288_vpu_dec_fmts[] = =3D { .codec_mode =3D HANTRO_MODE_VP8_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 3840, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 2160, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -162,17 +186,25 @@ static const struct hantro_fmt rk3399_vpu_dec_fmts[] = =3D { { .fourcc =3D V4L2_PIX_FMT_NV12, .codec_mode =3D HANTRO_MODE_NONE, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, + .step_height =3D MB_DIM, + }, }, { .fourcc =3D V4L2_PIX_FMT_H264_SLICE, .codec_mode =3D HANTRO_MODE_H264_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 1920, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 1088, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -181,11 +213,11 @@ static const struct hantro_fmt rk3399_vpu_dec_fmts[] = =3D { .codec_mode =3D HANTRO_MODE_MPEG2_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 1920, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_FHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 1088, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_FHD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -194,11 +226,11 @@ static const struct hantro_fmt rk3399_vpu_dec_fmts[] = =3D { .codec_mode =3D HANTRO_MODE_VP8_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 3840, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 2160, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, .step_height =3D MB_DIM, }, }, diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/stagi= ng/media/hantro/sama5d4_vdec_hw.c index b2fc1c5613e1..b205e2db5b04 100644 --- a/drivers/staging/media/hantro/sama5d4_vdec_hw.c +++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c @@ -16,6 +16,14 @@ static const struct hantro_fmt sama5d4_vdec_postproc_fmt= s[] =3D { .fourcc =3D V4L2_PIX_FMT_YUYV, .codec_mode =3D HANTRO_MODE_NONE, .postprocessed =3D true, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_HD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_HD_HEIGHT, + .step_height =3D MB_DIM, + }, }, }; =20 @@ -23,17 +31,25 @@ static const struct hantro_fmt sama5d4_vdec_fmts[] =3D { { .fourcc =3D V4L2_PIX_FMT_NV12, .codec_mode =3D HANTRO_MODE_NONE, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_HD_WIDTH, + .step_width =3D MB_DIM, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_HD_HEIGHT, + .step_height =3D MB_DIM, + }, }, { .fourcc =3D V4L2_PIX_FMT_MPEG2_SLICE, .codec_mode =3D HANTRO_MODE_MPEG2_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 1280, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_HD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 720, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_HD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -42,11 +58,11 @@ static const struct hantro_fmt sama5d4_vdec_fmts[] =3D { .codec_mode =3D HANTRO_MODE_VP8_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 1280, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_HD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 720, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_HD_HEIGHT, .step_height =3D MB_DIM, }, }, @@ -55,11 +71,11 @@ static const struct hantro_fmt sama5d4_vdec_fmts[] =3D { .codec_mode =3D HANTRO_MODE_H264_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 1280, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_HD_WIDTH, .step_width =3D MB_DIM, - .min_height =3D 48, - .max_height =3D 720, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_HD_HEIGHT, .step_height =3D MB_DIM, }, }, diff --git a/drivers/staging/media/hantro/sunxi_vpu_hw.c b/drivers/staging/= media/hantro/sunxi_vpu_hw.c index c0edd5856a0c..fbeac81e59e1 100644 --- a/drivers/staging/media/hantro/sunxi_vpu_hw.c +++ b/drivers/staging/media/hantro/sunxi_vpu_hw.c @@ -14,6 +14,14 @@ static const struct hantro_fmt sunxi_vpu_postproc_fmts[]= =3D { .fourcc =3D V4L2_PIX_FMT_NV12, .codec_mode =3D HANTRO_MODE_NONE, .postprocessed =3D true, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, + .step_width =3D 32, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, + .step_height =3D 32, + }, }, }; =20 @@ -21,17 +29,25 @@ static const struct hantro_fmt sunxi_vpu_dec_fmts[] =3D= { { .fourcc =3D V4L2_PIX_FMT_NV12_4L4, .codec_mode =3D HANTRO_MODE_NONE, + .frmsize =3D { + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, + .step_width =3D 32, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, + .step_height =3D 32, + }, }, { .fourcc =3D V4L2_PIX_FMT_VP9_FRAME, .codec_mode =3D HANTRO_MODE_VP9_DEC, .max_depth =3D 2, .frmsize =3D { - .min_width =3D 48, - .max_width =3D 3840, + .min_width =3D FMT_MIN_WIDTH, + .max_width =3D FMT_UHD_WIDTH, .step_width =3D 32, - .min_height =3D 48, - .max_height =3D 2160, + .min_height =3D FMT_MIN_HEIGHT, + .max_height =3D FMT_UHD_HEIGHT, .step_height =3D 32, }, }, --=20 2.35.1