From nobody Mon Sep 29 21:27:54 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D086FC00140 for ; Mon, 15 Aug 2022 22:59:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233251AbiHOW72 (ORCPT ); Mon, 15 Aug 2022 18:59:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48196 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352288AbiHOW5S (ORCPT ); Mon, 15 Aug 2022 18:57:18 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 612C962AB8; Mon, 15 Aug 2022 12:56:13 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CF0E260FB5; Mon, 15 Aug 2022 19:56:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B9706C433D6; Mon, 15 Aug 2022 19:56:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1660593372; bh=GHUg3/3om1y16xLkY9xRDeAEW++BDx8eOg8B/6QwxXw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XE4YExgQp5ux6gHuT8VD0lJsvFG7iYR4Fp7K7M6s5L6+N2Hmh7CCpkbALcvK8ItCf /4BrVUObhab+SEAJDaiTtSIRXOhXHGRByR2fwlOFKsD9rXjeOEX7cChNNLUCbf4T+H WKSdHxDL3sXupwm017ENM299/yhArmJ1pLiFbx/g= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Dmitry Baryshkov , Bjorn Andersson , Sasha Levin Subject: [PATCH 5.19 0258/1157] arm64: dts: qcom: msm8996: correct #clock-cells for QMP PHY nodes Date: Mon, 15 Aug 2022 19:53:34 +0200 Message-Id: <20220815180449.897779983@linuxfoundation.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220815180439.416659447@linuxfoundation.org> References: <20220815180439.416659447@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Dmitry Baryshkov [ Upstream commit b874fff9a7683df30e5aff16d5a85b1f8a43aa5d ] The commit 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node") moved the '#clock-cells' properties to the child nodes. However it missed the fact that the property must have been set to <0> (as all pipe clocks use of_clk_hw_simple_get as the xlate function. Also the mentioned commit didn't add '#clock-cells' properties to second and third PCIe PHY nodes. Correct both these mistakes: - Set '#clock-cells' to <0>, - Add the property to pciephy_1 and pciephy_2 nodes. Fixes: 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP= PHY child node") Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220620071936.1558906-3-dmitry.baryshkov@l= inaro.org Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qc= om/msm8996.dtsi index 9932186f7ceb..b670d0412760 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -609,7 +609,7 @@ pciephy_0: phy@35000 { <0x00035400 0x1dc>; #phy-cells =3D <0>; =20 - #clock-cells =3D <1>; + #clock-cells =3D <0>; clock-output-names =3D "pcie_0_pipe_clk_src"; clocks =3D <&gcc GCC_PCIE_0_PIPE_CLK>; clock-names =3D "pipe0"; @@ -623,6 +623,7 @@ pciephy_1: phy@36000 { <0x00036400 0x1dc>; #phy-cells =3D <0>; =20 + #clock-cells =3D <0>; clock-output-names =3D "pcie_1_pipe_clk_src"; clocks =3D <&gcc GCC_PCIE_1_PIPE_CLK>; clock-names =3D "pipe1"; @@ -636,6 +637,7 @@ pciephy_2: phy@37000 { <0x00037400 0x1dc>; #phy-cells =3D <0>; =20 + #clock-cells =3D <0>; clock-output-names =3D "pcie_2_pipe_clk_src"; clocks =3D <&gcc GCC_PCIE_2_PIPE_CLK>; clock-names =3D "pipe2"; @@ -2769,7 +2771,7 @@ ssusb_phy_0: phy@7410200 { <0x07410600 0x1a8>; #phy-cells =3D <0>; =20 - #clock-cells =3D <1>; + #clock-cells =3D <0>; clock-output-names =3D "usb3_phy_pipe_clk_src"; clocks =3D <&gcc GCC_USB3_PHY_PIPE_CLK>; clock-names =3D "pipe0"; --=20 2.35.1